set-9

401. In modern computers bipolar semiconductor chips are often used in the arithmetic logic unit. What material is used for the slower and less expensive primary storage section?

1. Gallium arsenide (GaAs)

2. Silicon

3. Metal oxide semiconductor

4. Gallium arsenide chips

Show me the answer

Answer: 3. Metal oxide semiconductor

Explanation:

• Metal oxide semiconductor (MOS) technology is used for slower and less expensive primary storage, such as DRAM, due to its cost-effectiveness and scalability.

402. Which type of memory chips are likely to be used in the primary storage of the future generation of computers?

1. Selenium chips

2. Bio chips

3. Optical chips

4. Gallium arsenide chips

Show me the answer

Answer: 3. Optical chips

Explanation:

• Optical chips, which use light instead of electricity, are a promising technology for future primary storage due to their potential for high speed and low power consumption.

403. How many bits can be stored in the 8K capital?

1. 8000

2. 4000

3. 8192

4. 4096

Show me the answer

Answer: 3. 8192

Explanation:

• 8K (kilobytes) is equivalent to 8192 bytes, and since each byte is 8 bits, the total number of bits is 8192 * 8 = 65536 bits.

404. If a computer has a 1024 K memory, then what does the letter K stands for?

1. Kilometer

2. 1024

3. Thousand

4. Core

Show me the answer

Answer: 2. 1024

Explanation:

• In computing, "K" stands for 1024 (2^10), not 1000, as memory sizes are based on binary multiples.

405. What was the amount of memory required by the earliest operating system called dos 1.0?

1. 4K

2. 16K

3. 8K

4. 32K

Show me the answer

Answer: 3. 8K

Explanation:

• DOS 1.0 required a minimum of 8K of memory to operate, making it suitable for early personal computers with limited resources.

406. The storage device which is used to compensate for the difference in rates of flow of data from one device to another is called

1. Cache

2. Buffer

3. Concentrator

4. I/O device

Show me the answer

Answer: 2. Buffer

Explanation:

• A buffer is used to temporarily store data to compensate for differences in data flow rates between devices, ensuring smooth data transfer.

407. As a secondary storage medium, what is the most important advantage of a video disk?

1. Laser disk

2. Durability

3. Potential capacity

4. Cost effectiveness

Show me the answer

Answer: 3. Potential capacity

Explanation:

• Video disks offer high potential capacity, making them suitable for storing large amounts of data, such as video and multimedia content.

408. What is the size of optical compact disk which is used for recording high quality music?

1. 4.7-inch

2. 5½ inch

3. 3½ inch

4. 8 inch

Show me the answer

Answer: 1. 4.7-inch

Explanation:

• The standard size for optical compact disks (CDs) used for recording high-quality music is 4.7 inches in diameter.

409. Which part of the diskette never be touched?

1. Hub

2. Oval slot

3. Hole in the center

4. Corner

Show me the answer

Answer: 2. Oval slot

Explanation:

• The oval slot on a diskette should never be touched, as it exposes the magnetic surface, which can be easily damaged.

410. Memory is

1. A device that performs a sequence of operations specified by instruction in memory

2. The device where information in stored

3. A sequence of instruction

4. Typically characterized by interactive processing and time-slicing of the CPU's time to allow quick response to each user

Show me the answer

Answer: 2. The device where information in stored

Explanation:

• Memory is a device where information is stored, allowing the CPU to access and process data as needed.

411. Virtual memory

1. Is a method of memory allocation by which the program is subdivided into equal portions, 8 pages and core is subdivided into equal portions

2. Consists of those addresses that may be generated by a processor during execution of a computation

3. Is a method of allocating processor time

4. Allows multiple programs to reside in separate areas of core at a time

Show me the answer

Answer: 2. Consists of those addresses that may be generated by a processor during execution of a computation

Explanation:

• Virtual memory consists of addresses that may be generated by a processor during execution, allowing programs to use more memory than physically available.

412. AROM is used to store the table for multiplication of two 8 -bit unsigned integers. The size of ROM required is

1. 256K x 6

2. 4K x 16

3. 64K x 8

4. 64K x 16

Show me the answer

Answer: 3. 64K x 8

Explanation:

• To store the multiplication table for two 8-bit unsigned integers, a 64K x 8 ROM is required, as it can store 65536 (2^16) entries, each 8 bits wide.

413. The controller uses ______ to help with the transfers when handling network interfaces.

1. Input Buffer Storage

2. Bridge circuits

3. Signal enhancers

4. All of the above

Show me the answer

Answer: 1. Input Buffer Storage

Explanation:

• Input buffer storage is used by the controller to temporarily hold data during transfers, ensuring smooth communication between network interfaces.

414. To overcome the conflict over the possession of the BUS we use ______.

1. Optimizers

2. Multiple BUS structure

3. BUS arbitrators

4. None of the above

Show me the answer

Answer: 3. BUS arbitrators

Explanation:

• BUS arbitrators are used to resolve conflicts over bus access, ensuring fair and efficient sharing of the bus among multiple devices.

415. The seek time of a disk is 30 ms. It rotates at the rate of 30 rotations/second. The capacity of each track is 300 words. The access time is (approximately)

1. 62 ms

2. 50 ms

3. 60 ms

4. 47 ms

Show me the answer

Answer: 4. 47 ms

Explanation:

• The access time is calculated as the sum of seek time (30 ms) and rotational latency (16.67 ms, since 30 rotations/second = 33.33 ms per rotation, and average latency is half of that). Thus, 30 + 16.67 ≈ 47 ms.

416. How many RAM chips of size (256K x 1 bit) are required to build 1 M byte memory?

1. 8

2. 24

3. 10

4. 32

Show me the answer

Answer: 4. 32

Explanation:

• To build 1M byte memory using 256K x 1 bit chips, you need 32 chips (1M byte = 8M bits, and 256K x 1 bit chips provide 256K bits each, so 8M / 256K = 32).

417. If each address space represents one byte of storage space, how many address lines are needed to access RAM chips arranged in a 4 x 6 array, where each chip is 8K x 4 bits?

1. 13

2. 16

3. 15

4. 17

Show me the answer

Answer: 4. 17

Explanation:

• Each chip is 8K x 4 bits, so 8K = 8192 bytes. For a 4x6 array, the total memory is 4 * 6 * 8192 = 196608 bytes. To address this, you need 17 address lines (2^17 = 131072, which is sufficient).

418. In a memory system, four 256 x 8 PROM chips are used to make total memory of size 1024 x 4. What is the number of address bus lines?

1. 4

2. 10

3. 8

4. 16

Show me the answer

Answer: 2. 10

Explanation:

• Four 256 x 8 PROM chips make a total memory of 1024 x 4, requiring 10 address lines (2^10 = 1024).

419. Consider a high speed 40 ns memory cache with a successful hit ratio of 80%. The regular memory has an access time of 100 ns. What is the average effective time for CPU to access memory?

1. 52 ns

2. 70 ns

3. 60 ns

4. 80 ns

Show me the answer

Answer: 1. 52 ns

Explanation:

• The average effective access time is calculated as (Hit ratio * Cache access time) + (Miss ratio * Memory access time) = (0.8 * 40) + (0.2 * 100) = 32 + 20 = 52 ns.

420. What is the hit ratio of a cache if a system performs memory access at 30 nano seconds with the cache and 150 nano seconds without it? Assume that the each uses 20 nano sec memory, choose the closest approximate

1. 81%

2. 92%

3. 75%

4. 87%

Show me the answer

Answer: 2. 92%

Explanation:

• The hit ratio can be calculated using the formula: Hit ratio = (Memory access time without cache - Memory access time with cache) / (Cache access time - Memory access time without cache). Plugging in the values: (150 - 30) / (20 - 150) ≈ 92%.

421. Consider a disk with the following characteristics

1. Track size: 10,000 bytes

2. Rotational latency: 10 ms / revaluation

3. Block size: 1,000 bytes

4. What is the maximum transfer rate per track measured in bits per second as is conventional for this disk unit?

5. 400 Mbps

6. 6,400 Mbps

7. 8 Mbps

8. 4,250 Mbps

Show me the answer

Answer: 3. 8 Mbps

Explanation:

• The maximum transfer rate per track is calculated as (Track size / Rotational latency) = (10,000 bytes / 10 ms) = 1,000,000 bytes per second = 8 Mbps (since 1 byte = 8 bits).

422. Increasing the RAM of a computer typically improves the performance because:

1. Virtual memory increases

2. Larger RAMs are faster

3. Fewer page faults occurs

4. Fewer segmentation faults occur

Show me the answer

Answer: 3. Fewer page faults occurs

Explanation:

• Increasing RAM reduces the number of page faults, as more data can be stored in physical memory, reducing the need to access slower secondary storage.

423. Which of the following requires a device driver?

1. Register

2. Cache

3. Main memory

4. Disk

Show me the answer

Answer: 4. Disk

Explanation:

• Disks require device drivers to manage communication between the operating system and the disk hardware.

424. Which one of the following statements is false?

1. Virtual memory implements the translation of a programs address space into physical memory address

2. Virtual memory allows each program to exceed the size of the primary memory

3. Virtual memory increases the degree of multiprogramming

4. Virtual memory reduces the context switching overhead

Show me the answer

Answer: 4. Virtual memory reduces the context switching overhead

Explanation:

• Virtual memory does not reduce context switching overhead; it may even increase it due to the need to manage page tables and swap space.

425. The advantage of CMOS technology over a MOS is

1. Lower power dissipation

2. Greater speed

3. Smaller chip size

4. All of the above

Show me the answer

Answer: 4. All of the above

Explanation:

• CMOS technology offers lower power dissipation, greater speed, and smaller chip size compared to traditional MOS technology.

426. The advantage of synchronous circuits over asynchronous one is...

1. Faster operation

2. Better noise immunity

3. Both A and B

4. Lower hardware equipment

Show me the answer

Answer: 3. Both A and B

Explanation:

• Synchronous circuits offer faster operation and better noise immunity compared to asynchronous circuits, making them more reliable and efficient.

427. Which of the following is not a form of memory?

1. Instruction cache

2. Instruction register

3. Instruction code

4. Translation lookaside buffer

Show me the answer

Answer: 3. Instruction code

Explanation:

• Instruction code is not a form of memory; it refers to the binary representation of instructions executed by the CPU.

428. In 2's complement, addition overflow

1. Is tagged whenever there is a carry for sign bit addition

2. Cannot occur when a positive value is added to a negative value

3. Is flagged when the carries from sign bit and previous bit match

4. None of the above

Show me the answer

Answer: 3. Is flagged when the carries from sign bit and previous bit match

Explanation:

• In 2's complement addition, overflow is flagged when the carries from the sign bit and the previous bit match, indicating an incorrect result.

429. The performance of the pipelined processor suffers if...

1. The pipeline stage has different delay

2. Consecutive instructions depend on each other

3. The pipeline sages share hardware resources

4. All of the above

Show me the answer

Answer: 4. All of the above

Explanation:

• Pipeline performance suffers if stages have different delays, instructions are dependent, or stages share hardware resources, leading to stalls or bottlenecks.

430. In absolute addressing mode...

1. The operand is inside the instruction

2. The address of the operand is inside the instruction

3. The register containing the address of the operand is specified in the instruction

4. Location of the operand is implicit

Show me the answer

Answer: 2. The address of the operand is inside the instruction

Explanation:

• In absolute addressing mode, the address of the operand is directly specified in the instruction, allowing direct access to memory locations.

431. A processor needs software interrupt to

1. Test the interrupt system of the processor

2. Implement co routines

3. Obtain system services which need execution of privileged instructions

4. Return from subroutine

Show me the answer

Answer: 3. Obtain system services which need execution of privileged instructions

Explanation:

• Software interrupts are used by a processor to obtain system services that require the execution of privileged instructions, such as accessing hardware resources.

432. Horizontal microprogramming...

1. Does not require use of signal decoders

2. Results in larger sized micro-instructions than vertical micro-programming

3. Use one bit for each control signal

4. All of the above

Show me the answer

Answer: 4. All of the above

Explanation:

• Horizontal microprogramming uses one bit for each control signal, resulting in larger micro-instructions and eliminating the need for signal decoders.

433. The main difference (s) between a CISC and RISC processor is/are that a RISC processor typically has

1. A fewer instruction

2. A fewer addressing mode

3. A more register, an ease to implement using hardwired control logic

4. All of the above

Show me the answer

Answer: 4. All of the above

Explanation:

• RISC processors typically have fewer instructions, fewer addressing modes, more registers, and are easier to implement using hardwired control logic compared to CISC processors.

434. The exponent of a floating-point number is represented in excess -N code so that

1. The dynamic range is large

2. The precision is high

3. The smallest number is represented by all zeros

4. Overflow is avoided

Show me the answer

Answer: 3. The smallest number is represented by all zeros

Explanation:

• The exponent in floating-point numbers is represented in excess-N code so that the smallest number is represented by all zeros, simplifying comparisons and arithmetic operations.

435. If negative numbers are stored in 2's complement form, the range of numbers that can be stored in 8 bits is......

1. -128 to +128

2. -128 to +127

3. -127 to +128

4. -127 to +127

Show me the answer

Answer: 2. -128 to +127

Explanation:

• In 2's complement form, an 8-bit number can represent values from -128 to +127, as the most significant bit is used to indicate the sign.

436. On receiving an interrupt from an I/O device, the CPU

1. Halts for a pre-determined time

2. Hands over control of address bus and data bus to the interrupting device

3. Branches off to the interrupt service routine immediately

4. Branches off to the interrupt service routine after completion of the current instruction

Show me the answer

Answer: 4. Branches off to the interrupt service routine after completion of the current instruction

Explanation:

• The CPU typically completes the current instruction before branching to the interrupt service routine to ensure the integrity of the program state.

437. In serial communication, an extra clock is needed

1. To synchronize the devices

2. For programmed baud rate control

3. To make efficient use of RS-232

4. None of the above

Show me the answer

Answer: 1. To synchronize the devices

Explanation:

• In serial communication, an extra clock is needed to synchronize the transmitting and receiving devices, ensuring accurate data transfer.

438. Which of the following rules regarding the addition of 2 given numbers is correct, if negative numbers are represented in 2's complement form?

1. Add sign bit and discard carry, if any.

2. Add sign bit and add carry, if any.

3. Don't add sign bit and discard carry, if any.

4. Don't add sign bit and add carry, if any.

Show me the answer

Answer: 4. Don't add sign bit and add carry, if any.

Explanation:

• In 2's complement addition, the sign bit is not added separately, and the carry is added to the result if it occurs, ensuring correct arithmetic operations.

439. The difference between 80486 and 80386 is/are...

1. Presence of floating-point co-processor

2. Speed of operation

3. Presence of 8 K cache on chip, presence of memory controller

4. All of the above

Show me the answer

Answer: 4. All of the above

Explanation:

• The 80486 includes a floating-point co-processor, operates at higher speeds, and has an 8K on-chip cache and memory controller, distinguishing it from the 80386.

440. In virtual memory system, the addresses used by the programmer belongs to

1. Memory space

2. Physical addresses

3. Address space

4. Main memory address

Show me the answer

Answer: 3. Address space

Explanation:

• In a virtual memory system, the addresses used by the programmer belong to the address space, which is mapped to physical memory by the memory management unit.

441. The method for updating the main memory as soon as word is removed from the cache is called

1. Write-through

2. Write-back

3. Protected-write

4. Cache write

Show me the answer

Answer: 2. Write-back

Explanation:

• The write-back method updates main memory only when a word is removed from the cache, reducing the number of memory writes and improving performance.

442. Which is true for a typical RISC architecture?

1. Micro programmed control unit

2. Instruction takes multiple cycles

3. Have fewer register in CPU

4. Emphasis on optimizing instruction pipelines.

Show me the answer

Answer: 4. Emphasis on optimizing instruction pipelines.

Explanation:

• RISC architectures emphasize optimizing instruction pipelines to improve performance, often using hardwired control units and single-cycle instructions.

443. After reset, CPU begins execution of instruction from memory address

1. 0101H

2. 8000H

3. 0000H

4. FFFFH

Show me the answer

Answer: 3. 0000H

Explanation:

• After a reset, the CPU typically begins execution from memory address 0000H, where the bootloader or initial program is stored.

444. In 8085 microprocessors how many I/O devices can be interfaced in I/O mapped I/O technique?

1. Either 256 input devices or 256 output devices.

2. 256 I/O devices.

3. 256 input devices & 256 output devices.

4. 512 input-output devices.

Show me the answer

Answer: 2. 256 I/O devices.

Explanation:

• In I/O mapped I/O technique, the 8085 microprocessor can interface up to 256 I/O devices, using 8-bit addressing.

445. DMA interface unit eliminates the need to use CPU registers to transfer data from

1. MAR to MBR

2. I/O units to memory

3. MBR to MAR

4. Memory to I/O units

Show me the answer

Answer: 2. I/O units to memory

Explanation:

• The DMA (Direct Memory Access) interface unit allows data to be transferred directly between I/O units and memory without involving the CPU registers.

446. How many 128 x 8 RAM chips are needed to provide a memory capacity of 2048 bytes?

1. 8

2. 16

3. 24

4. 32

Show me the answer

Answer: 2. 16

Explanation:

• To provide 2048 bytes of memory using 128 x 8 RAM chips, you need 16 chips (2048 bytes / 128 bytes per chip = 16).

447. What is the bit storage capacity of a ROM with a 512 x 4-organization?

1. 2049

2. 2048

3. 2047

4. 2046

Show me the answer

Answer: 2. 2048

Explanation:

• A ROM with a 512 x 4 organization has a bit storage capacity of 512 * 4 = 2048 bits.

448. How many different addresses are required by the memories that contain 16K words?

1. 16,380

2. 16,382

3. 16,384

4. 16,386

Show me the answer

Answer: 3. 16,384

Explanation:

• A memory containing 16K words requires 16,384 unique addresses (16K = 16 * 1024 = 16,384).

449. The content of a 4-bit register is initially 1101. The register is shifted 2 times to the right with the serial input being 1011101. What is the content of the register after each shift?

1. 1110,0111

2. 0001,1000

3. 1101,1011

4. 1001,1001

Show me the answer

Answer: 1. 1110,0111

Explanation:

• After two right shifts with the serial input 1011101, the register content changes to 1110 and then 0111.

450. ABCD - seven segment decoder / driver in connected to an LED display. Which segments are illuminated for the input code DCBA = 0001?

1. b,c

2. c,b

3. a,b,c

4. a,b,c,d

Show me the answer

Answer: 1. b,c

Explanation:

• For the input code DCBA = 0001, segments b and c are illuminated in a seven-segment display, representing the digit "1".