ECL (Emitter-Coupled Logic) is the fastest logic family due to its non-saturating operation.
252. If the input to a T-flip-flop is a 100 Hz signal, the final output of the three T-flip-flops in cascade is:
1000 Hz
333 Hz
500 Hz
12.5 Hz
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Answer: 4. 12.5 Hz
Explanation:
Each T-flip-flop divides the frequency by 2, so three flip-flops divide the frequency by ( 2^3 = 8 ), resulting in ( 100 \text{ Hz} / 8 = 12.5 \text{ Hz} ).
253. Which of the following memory is volatile memory?
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Explanation:
RAM (Random Access Memory) is volatile, meaning it loses its data when power is turned off.
254. -8 is equal to the signed binary number:
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Explanation:
In 8-bit signed binary, -8 is represented as 10001000.
255. De Morgan's first theorem shows the equivalence of:
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Explanation:
De Morgan's first theorem states that ( \overline{A + B} = \overline{A} \cdot \overline{B} ), which is equivalent to a NOR gate being the same as a bubbled AND gate.
256. The digital logic family which has the lowest propagation delay time is:
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Explanation:
ECL (Emitter-Coupled Logic) has the lowest propagation delay among the given options.
257. The device which changes from serial data to parallel data is:
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Explanation:
A demultiplexer converts serial data into parallel data.
258. A device which converts BCD to Seven Segment is called:
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Explanation:
A BCD-to-Seven Segment decoder converts BCD input into the corresponding Seven Segment display output.
259. In a JK Flip-Flop, toggle means:
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Explanation:
Toggling in a JK Flip-Flop means changing the output to the opposite state (from 0 to 1 or from 1 to 0).
260. The access time of ROM using bipolar transistors is about:
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Explanation:
The access time of ROM using bipolar transistors is typically in the nanosecond (nsec) range.
261. The A/D converter whose conversion time is independent of the number of bits is:
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Explanation:
Parallel conversion A/D converters have a conversion time that is independent of the number of bits.
262. When signed numbers are used in binary arithmetic, which notation has a unique representation for zero?
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Explanation:
In 2's complement representation, zero has a unique representation (all bits 0).
263. A hexadecimal odometer displays F52F. The next reading will be:
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Explanation:
The next reading after F52F is F530.
264. Most digital computers do not have floating-point hardware because:
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Explanation:
Floating-point hardware is expensive, so many systems rely on software for floating-point operations.
265. In digital ICs, Schottky transistors are preferred over normal transistors because of their:
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Explanation:
Schottky transistors have a lower propagation delay, making them faster.
266. The following switching functions are to be implemented using a Decoder:
( f_1 = \sum m(1, 2, 4, 8, 10, 14) )
( f_2 = \sum m(2, 5, 9, 11) )
( f_3 = \sum m(2, 4, 5, 6, 7) )
The minimum configuration of the decoder should be:
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Explanation:
A 4-to-16 line decoder is required to handle the given minterms.
267. A 4-bit synchronous counter uses flip-flops with propagation delay times of 15 ns each. The maximum possible time required for a change of state is:
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Explanation:
In a synchronous counter, all flip-flops change state simultaneously, so the maximum delay is equal to the propagation delay of one flip-flop (15 ns).
268. Words having 8-bits are to be stored into computer memory. The number of lines required for writing into memory are:
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Explanation:
An 8-bit word requires 8 lines for writing into memory.
269. In a successive-approximation A/D converter, offset voltage equal to 1/2 LSB is added to the D/A converter's output. This is done to:
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Explanation:
Adding an offset voltage of 1/2 LSB reduces the maximum quantization error.
270. The decimal equivalent of the binary number 11010 is:
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Explanation:
The binary number 11010 converts to the decimal number 26.
271. The 1's complement representation of the decimal number -17 using 8-bit representation is:
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Explanation:
The 1's complement of -17 is obtained by inverting all bits of the binary representation of 17.
272. The excess-3 code of the decimal number 26 is:
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Explanation:
The excess-3 code of 26 is obtained by adding 3 to each digit and converting to binary.
273. How many AND gates are required to realize ( Y = CD + EF + G )?
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Explanation:
Three AND gates are required for the terms ( CD ), ( EF ), and ( G ).
274. How many select lines will a 16-to-1 multiplexer have?