computer-nec-license
  • NEC-Computer
  • 1. Concept of Basic Electrical and Electronics Engineering
    • 1.1 Basic Concepts
    • 1.2 Network Theorems
    • 1.3 Alternating Current Fundamentals
    • 1.4 Semiconductor Device
    • 1.5 Signal Generator
    • 1.6 Amplifiers
    • MCQs
      • MCQs On Basic Electrical
        • set-1
        • set-2
      • MCQs On Basic Electronics
        • set-1
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  • 2. Digital Logic and Microprocessor
    • 2.1 Digital Logic
    • 2.2 Combinational & Arithmetic Circuit
    • 2.3 Sequential Logic Circuits
    • 2.4 Microprocessor
    • 2.5 Microprocessor System
    • 2.6 Interrupt Operations
    • MCQs
      • MCQs On Digital Logic
        • set-1
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  • 3. Programming Language and Its Applications
    • 3.1 Introduction to C Programming
    • 3.2 Pointers, Structures, and Data Files
    • 3.3 C++ Language Constructs with Objects and Classes
    • 3.4 Features of Object-Oriented Programming
    • 3.5 Pure Virtual Functions and File Handling
    • 3.6 Generic Programming and Exception Handling
    • MCQs
      • set-1
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      • set-4
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  • 4. Computer Organization and Embedded System
    • 4.1 Control and CPU
    • 4.2 Computer Arithmetic and Memory System
    • 4.3 I/O Organization and Multiprocessor
    • 4.4 Embedded System Design
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    • 4.6 Hardware Description Language (VHDL) and IC Technology
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  • 5. Concept of Computer Network and Network Security System
    • 5.1 Introduction to Computer Networks
    • 5.2 Data Link Layer
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    • 5.6 Network Security
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      • Basic Networking
        • set-1
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      • Advanced Networking
        • set-1
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  • 6. Theory of Computation and Computer Graphics
    • 6.1 Introduction to Finite Automata
    • 6.2 Introduction to Context-Free Languages (CFL)
    • 6.3 Turing Machines (TM)
    • 6.4 Introduction to Computer Graphics
    • 6.5 Two-Dimensional Transformation
    • 6.6 Three-Dimensional Transformation
    • MCQs
      • MCQs on Theory of Computation
        • set-1
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        • set-3
      • MCQs On Computer Graphics
        • set-1
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        • set-3
        • set-4
        • set-5
        • set-6
  • 7. Data Structures and Algorithm, Database System and Operating System
    • 7.1 Introduction to Data Structures, Lists, Linked Lists, and Trees
    • 7.2 Sorting, Searching, Hashing and Graphs
    • 7.3 Introduction to Data Models, Normalization, and SQL
    • 7.4 Transaction Processing, Concurrency Control, and Crash Recovery
    • 7.5 Introduction to Operating System and Process Management
    • 7.6 Memory Management, File Systems, and System Administration
    • MCQs
      • MCQs ON DSA
        • set-1
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      • MCQs On DBMS
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  • 8. Software Engineering and Object-Oriented Analysis & Design
    • 8.1 Software Process and Requirements
    • 8.2 Software Design
    • 8.3 Software Testing, Cost Estimation, Quality Management, and Configuration Management
    • 8.4 Object-Oriented Fundamentals and Analysis
    • 8.5 Object-Oriented Design
    • 8.6 Object-Oriented Design Implementation
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  • 9. Artificial Intelligence and Neural Networks
    • 9.1 Introduction to AI and Intelligent Agents
    • 9.2 Problem Solving and Searching Techniques
    • 9.3 Knowledge Representation
    • 9.4 Expert System and Natural Language Processing
    • 9.5 Machine Learning
    • 9.6 Neural Networks
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  • 10. Project Planning, Design and Implementation
    • 10.1 Engineering Drawings and Its Concepts
    • 10.2 Engineering Economics
    • 10.3 Project Planning and Scheduling
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    • 10.6 Engineering Regulatory Body
    • MCQs
      • MCQs On Engineering Drawing
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      • MCQs On Engineering Economics
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      • Short Questions (60*1=60 Marks)
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      • Long Questions (20*2=40 Marks)
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      • Long Questions (20*2=40 Marks)
    • Model Set - Computer Engineering By NEC
      • Short Questions (60*1=60 Marks)
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  1. 2. Digital Logic and Microprocessor
  2. MCQs
  3. MCQs On Digital Logic

set-6

251. Which of the following is the faster logic?

  1. TTL\text{TTL}TTL

  2. CMOS\text{CMOS}CMOS

  3. ECL\text{ECL}ECL

  4. LSI\text{LSI}LSI

Show me the answer

Answer: 3. ECL\text{ECL}ECL

Explanation:

  • ECL (Emitter-Coupled Logic) is the fastest logic family due to its non-saturating operation.

252. If the input to a T-flip-flop is a 100 Hz signal, the final output of the three T-flip-flops in cascade is:

  1. 1000 Hz1000 \text{ Hz}1000 Hz

  2. 333 Hz333 \text{ Hz}333 Hz

  3. 500 Hz500 \text{ Hz}500 Hz

  4. 12.5 Hz12.5 \text{ Hz}12.5 Hz

Show me the answer

Answer: 4. 12.5 Hz12.5 \text{ Hz}12.5 Hz

Explanation:

  • Each T-flip-flop divides the frequency by 2, so three flip-flops divide the frequency by ( 2^3 = 8 ), resulting in ( 100 \text{ Hz} / 8 = 12.5 \text{ Hz} ).

253. Which of the following memory is volatile memory?

  1. ROM\text{ROM}ROM

  2. PROM\text{PROM}PROM

  3. RAM\text{RAM}RAM

  4. EEPROM\text{EEPROM}EEPROM

Show me the answer

Answer: 3. RAM\text{RAM}RAM

Explanation:

  • RAM (Random Access Memory) is volatile, meaning it loses its data when power is turned off.

254. -8 is equal to the signed binary number:

  1. 100010001000100010001000

  2. 100000001000000010000000

  3. 000010000000100000001000

  4. 100000010000001000000

Show me the answer

Answer: 1. 100010001000100010001000

Explanation:

  • In 8-bit signed binary, -8 is represented as 10001000.

255. De Morgan's first theorem shows the equivalence of:

  1. OR gate and Exclusive OR gate\text{OR gate and Exclusive OR gate}OR gate and Exclusive OR gate

  2. NOR gate and Bubbled AND gate\text{NOR gate and Bubbled AND gate}NOR gate and Bubbled AND gate

  3. NOR gate and NAND gate\text{NOR gate and NAND gate}NOR gate and NAND gate

  4. NAND gate and NOT gate\text{NAND gate and NOT gate}NAND gate and NOT gate

Show me the answer

Answer: 2. NOR gate and Bubbled AND gate\text{NOR gate and Bubbled AND gate}NOR gate and Bubbled AND gate

Explanation:

  • De Morgan's first theorem states that ( \overline{A + B} = \overline{A} \cdot \overline{B} ), which is equivalent to a NOR gate being the same as a bubbled AND gate.

256. The digital logic family which has the lowest propagation delay time is:

  1. ECL\text{ECL}ECL

  2. CMOS\text{CMOS}CMOS

  3. TTL\text{TTL}TTL

  4. PMOS\text{PMOS}PMOS

Show me the answer

Answer: 1. ECL\text{ECL}ECL

Explanation:

  • ECL (Emitter-Coupled Logic) has the lowest propagation delay among the given options.

257. The device which changes from serial data to parallel data is:

  1. Counter\text{Counter}Counter

  2. Demultiplexer\text{Demultiplexer}Demultiplexer

  3. Multiplexer\text{Multiplexer}Multiplexer

  4. Flip-flop\text{Flip-flop}Flip-flop

Show me the answer

Answer: 2. Demultiplexer\text{Demultiplexer}Demultiplexer

Explanation:

  • A demultiplexer converts serial data into parallel data.

258. A device which converts BCD to Seven Segment is called:

  1. Encoder\text{Encoder}Encoder

  2. Multiplexer\text{Multiplexer}Multiplexer

  3. Decoder\text{Decoder}Decoder

  4. De-multiplexer\text{De-multiplexer}De-multiplexer

Show me the answer

Answer: 3. Decoder\text{Decoder}Decoder

Explanation:

  • A BCD-to-Seven Segment decoder converts BCD input into the corresponding Seven Segment display output.

259. In a JK Flip-Flop, toggle means:

  1. Set Q=1 and Q‾=0\text{Set } Q = 1 \text{ and } \overline{Q} = 0Set Q=1 and Q​=0

  2. Set Q=0 and Q‾=1\text{Set } Q = 0 \text{ and } \overline{Q} = 1Set Q=0 and Q​=1

  3. Change the output to the opposite state\text{Change the output to the opposite state}Change the output to the opposite state

  4. No change in output\text{No change in output}No change in output

Show me the answer

Answer: 3. Change the output to the opposite state\text{Change the output to the opposite state}Change the output to the opposite state

Explanation:

  • Toggling in a JK Flip-Flop means changing the output to the opposite state (from 0 to 1 or from 1 to 0).

260. The access time of ROM using bipolar transistors is about:

  1. 1 sec1 \text{ sec}1 sec

  2. 1 psec1 \text{ psec}1 psec

  3. 1 msec1 \text{ msec}1 msec

  4. nsec\text{nsec}nsec

Show me the answer

Answer: 4. nsec\text{nsec}nsec

Explanation:

  • The access time of ROM using bipolar transistors is typically in the nanosecond (nsec) range.

261. The A/D converter whose conversion time is independent of the number of bits is:

  1. Dual slope\text{Dual slope}Dual slope

  2. Parallel conversion\text{Parallel conversion}Parallel conversion

  3. Counter type\text{Counter type}Counter type

  4. Successive approximation\text{Successive approximation}Successive approximation

Show me the answer

Answer: 2. Parallel conversion\text{Parallel conversion}Parallel conversion

Explanation:

  • Parallel conversion A/D converters have a conversion time that is independent of the number of bits.

262. When signed numbers are used in binary arithmetic, which notation has a unique representation for zero?

  1. Sign-magnitude\text{Sign-magnitude}Sign-magnitude

  2. 2’s complement\text{2's complement}2’s complement

  3. 1’s complement\text{1's complement}1’s complement

  4. 9’s complement\text{9's complement}9’s complement

Show me the answer

Answer: 2. 2’s complement\text{2's complement}2’s complement

Explanation:

  • In 2's complement representation, zero has a unique representation (all bits 0).

263. A hexadecimal odometer displays F52F. The next reading will be:

  1. F52FF52FF52F

  2. F530F530F530

  3. F53FF53FF53F

  4. F530F530F530

Show me the answer

Answer: 2. F530F530F530

Explanation:

  • The next reading after F52F is F530.

264. Most digital computers do not have floating-point hardware because:

  1. Floating-point hardware is costly\text{Floating-point hardware is costly}Floating-point hardware is costly

  2. It is slower than software\text{It is slower than software}It is slower than software

  3. It is not possible to perform floating-point addition by hardware\text{It is not possible to perform floating-point addition by hardware}It is not possible to perform floating-point addition by hardware

  4. No specific reason\text{No specific reason}No specific reason

Show me the answer

Answer: 1. Floating-point hardware is costly\text{Floating-point hardware is costly}Floating-point hardware is costly

Explanation:

  • Floating-point hardware is expensive, so many systems rely on software for floating-point operations.

265. In digital ICs, Schottky transistors are preferred over normal transistors because of their:

  1. Lower propagation delay\text{Lower propagation delay}Lower propagation delay

  2. Lower power dissipation\text{Lower power dissipation}Lower power dissipation

  3. Higher propagation delay\text{Higher propagation delay}Higher propagation delay

  4. Higher power dissipation\text{Higher power dissipation}Higher power dissipation

Show me the answer

Answer: 1. Lower propagation delay\text{Lower propagation delay}Lower propagation delay

Explanation:

  • Schottky transistors have a lower propagation delay, making them faster.

266. The following switching functions are to be implemented using a Decoder:

( f_1 = \sum m(1, 2, 4, 8, 10, 14) ) ( f_2 = \sum m(2, 5, 9, 11) ) ( f_3 = \sum m(2, 4, 5, 6, 7) ) The minimum configuration of the decoder should be:

  1. 2−to−4 line2-to-4 \text{ line}2−to−4 line

  2. 4−to−16 line4-to-16 \text{ line}4−to−16 line

  3. 3−to−8 line3-to-8 \text{ line}3−to−8 line

  4. 5−to−32 line5-to-32 \text{ line}5−to−32 line

Show me the answer

Answer: 2. 4−to−16 line4-to-16 \text{ line}4−to−16 line

Explanation:

  • A 4-to-16 line decoder is required to handle the given minterms.

267. A 4-bit synchronous counter uses flip-flops with propagation delay times of 15 ns each. The maximum possible time required for a change of state is:

  1. 15 ns15 \text{ ns}15 ns

  2. 45 ns45 \text{ ns}45 ns

  3. 30 ns30 \text{ ns}30 ns

  4. 60 ns60 \text{ ns}60 ns

Show me the answer

Answer: 1. 15 ns15 \text{ ns}15 ns

Explanation:

  • In a synchronous counter, all flip-flops change state simultaneously, so the maximum delay is equal to the propagation delay of one flip-flop (15 ns).

268. Words having 8-bits are to be stored into computer memory. The number of lines required for writing into memory are:

  1. 111

  2. 444

  3. 222

  4. 888

Show me the answer

Answer: 4. 888

Explanation:

  • An 8-bit word requires 8 lines for writing into memory.

269. In a successive-approximation A/D converter, offset voltage equal to 1/2 LSB is added to the D/A converter's output. This is done to:

  1. Improve the speed of operation\text{Improve the speed of operation}Improve the speed of operation

  2. Reduce the maximum quantization error\text{Reduce the maximum quantization error}Reduce the maximum quantization error

  3. Increase the number of bits at the output\text{Increase the number of bits at the output}Increase the number of bits at the output

  4. Increase the range of input voltage that can be converted\text{Increase the range of input voltage that can be converted}Increase the range of input voltage that can be converted

Show me the answer

Answer: 2. Reduce the maximum quantization error\text{Reduce the maximum quantization error}Reduce the maximum quantization error

Explanation:

  • Adding an offset voltage of 1/2 LSB reduces the maximum quantization error.

270. The decimal equivalent of the binary number 11010 is:

  1. 262626

  2. 161616

  3. 363636

  4. 232323

Show me the answer

Answer: 1. 262626

Explanation:

  • The binary number 11010 converts to the decimal number 26.

271. The 1's complement representation of the decimal number -17 using 8-bit representation is:

  1. 111011101110111011101110

  2. 110011001100110011001100

  3. 110111011101110111011101

  4. 000100010001000100010001

Show me the answer

Answer: 1. 111011101110111011101110

Explanation:

  • The 1's complement of -17 is obtained by inverting all bits of the binary representation of 17.

272. The excess-3 code of the decimal number 26 is:

  1. 010010010100100101001001

  2. 100010011000100110001001

  3. 010110010101100101011001

  4. 010011010100110101001101

Show me the answer

Answer: 3. 010110010101100101011001

Explanation:

  • The excess-3 code of 26 is obtained by adding 3 to each digit and converting to binary.

273. How many AND gates are required to realize ( Y = CD + EF + G )?

  1. 444

  2. 333

  3. 555

  4. 222

Show me the answer

Answer: 2. 333

Explanation:

  • Three AND gates are required for the terms ( CD ), ( EF ), and ( G ).

274. How many select lines will a 16-to-1 multiplexer have?

  1. 444

  2. 555

  3. 333

  4. 111

Show me the answer

Answer: 1. 444

Explanation:

  • A 16-to-1 multiplexer requires 4 select lines (since ( 2^4 = 16 )).

275. How many flip-flops are required to construct a decade counter?

  1. 101010

  2. 444

  3. 333

  4. 222

Show me the answer

Answer: 2. 444

Explanation:

  • A decade counter counts from 0 to 9, requiring 4 flip-flops (since ( 2^4 = 16 \geq 10 )).

276. Which TTL logic gate is used for wired ANDing?

  1. Open collector output\text{Open collector output}Open collector output

  2. Tristate output\text{Tristate output}Tristate output

  3. Totem Pole\text{Totem Pole}Totem Pole

  4. ECL gates\text{ECL gates}ECL gates

Show me the answer

Answer: 1. Open collector output\text{Open collector output}Open collector output

Explanation:

  • Open collector outputs are used for wired ANDing because they allow multiple outputs to be connected together.

277. CMOS circuits consume power:

  1. Equal to TTL\text{Equal to TTL}Equal to TTL

  2. Twice of TTL\text{Twice of TTL}Twice of TTL

  3. Less than TTL\text{Less than TTL}Less than TTL

  4. Thrice of TTL\text{Thrice of TTL}Thrice of TTL

Show me the answer

Answer: 3. Less than TTL\text{Less than TTL}Less than TTL

Explanation:

  • CMOS circuits consume significantly less power than TTL circuits.

278. In a RAM, information can be stored:

  1. By the user, number of times\text{By the user, number of times}By the user, number of times

  2. By the user, only once\text{By the user, only once}By the user, only once

  3. By the manufacturer, a number of times\text{By the manufacturer, a number of times}By the manufacturer, a number of times

  4. By the manufacturer only once\text{By the manufacturer only once}By the manufacturer only once

Show me the answer

Answer: 1. By the user, number of times\text{By the user, number of times}By the user, number of times

Explanation:

  • RAM allows users to write and rewrite data multiple times.

279. The hexadecimal number for ( (95.5)_{10} ) is:

  1. (5F.8)16(5F.8)_{16}(5F.8)16​

  2. (2E.F)16(2E.F)_{16}(2E.F)16​

  3. (9A.B)16(9A.B)_{16}(9A.B)16​

  4. (5A.4)16(5A.4)_{16}(5A.4)16​

Show me the answer

Answer: 1. (5F.8)16(5F.8)_{16}(5F.8)16​

Explanation:

  • The decimal number 95.5 converts to the hexadecimal number 5F.8.

280. The octal equivalent of ( (247)_{10} ) is:

  1. (252)8(252)_8(252)8​

  2. (367)8(367)_8(367)8​

  3. (350)8(350)_8(350)8​

  4. (400)8(400)_8(400)8​

Show me the answer

Answer: 2. (367)8(367)_8(367)8​

Explanation:

  • The decimal number 247 converts to the octal number 367.

281. The chief reason why digital computers use complemented subtraction is that it:

  1. Simplifies the circuitry\text{Simplifies the circuitry}Simplifies the circuitry

  2. Is a very simple process\text{Is a very simple process}Is a very simple process

  3. Can handle negative numbers easily\text{Can handle negative numbers easily}Can handle negative numbers easily

  4. Avoids direct subtraction\text{Avoids direct subtraction}Avoids direct subtraction

Show me the answer

Answer: 3. Can handle negative numbers easily\text{Can handle negative numbers easily}Can handle negative numbers easily

Explanation:

  • Complemented subtraction simplifies the handling of negative numbers in digital systems.

282. In a positive logic system, logic state 1 corresponds to:

  1. Positive voltage\text{Positive voltage}Positive voltage

  2. Zero voltage level\text{Zero voltage level}Zero voltage level

  3. Higher voltage level\text{Higher voltage level}Higher voltage level

  4. Lower voltage level\text{Lower voltage level}Lower voltage level

Show me the answer

Answer: 3. Higher voltage level\text{Higher voltage level}Higher voltage level

Explanation:

  • In positive logic, logic state 1 corresponds to a higher voltage level.

283. The commercially available 8-input multiplexer integrated circuit in the TTL family is:

  1. 749574957495

  2. 741547415474154

  3. 741537415374153

  4. 741517415174151

Show me the answer

Answer: 4. 741517415174151

Explanation:

  • The 74151 is an 8-input multiplexer in the TTL family.

284. CMOS circuits are extensively used for on-chip computers mainly because of their extremely:

  1. Low power dissipation\text{Low power dissipation}Low power dissipation

  2. Large packing density\text{Large packing density}Large packing density

  3. High noise immunity\text{High noise immunity}High noise immunity

  4. Low cost\text{Low cost}Low cost

Show me the answer

Answer: 1. Low power dissipation\text{Low power dissipation}Low power dissipation

Explanation:

  • CMOS circuits are preferred for on-chip computers due to their low power consumption.

285. The MSI chip 7474 is:

  1. Dual edge-triggered JK flip-flop (TTL)\text{Dual edge-triggered JK flip-flop (TTL)}Dual edge-triggered JK flip-flop (TTL)

  2. Dual edge-triggered D flip-flop (CMOS)\text{Dual edge-triggered D flip-flop (CMOS)}Dual edge-triggered D flip-flop (CMOS)

  3. Dual edge-triggered D flip-flop (TTL)\text{Dual edge-triggered D flip-flop (TTL)}Dual edge-triggered D flip-flop (TTL)

  4. Dual edge-triggered JK flip-flop (CMOS)\text{Dual edge-triggered JK flip-flop (CMOS)}Dual edge-triggered JK flip-flop (CMOS)

Show me the answer

Answer: 3. Dual edge-triggered D flip-flop (TTL)\text{Dual edge-triggered D flip-flop (TTL)}Dual edge-triggered D flip-flop (TTL)

Explanation:

  • The 7474 is a dual edge-triggered D flip-flop in the TTL family.

286. Which of the following memories stores the most number of bits?

  1. A 5Mx8 memory\text{A 5Mx8 memory}A 5Mx8 memory

  2. A 5Mx4 memory\text{A 5Mx4 memory}A 5Mx4 memory

  3. A 1Mx16 memory\text{A 1Mx16 memory}A 1Mx16 memory

  4. A 1Mx12 memory\text{A 1Mx12 memory}A 1Mx12 memory

Show me the answer

Answer: 1. A 5Mx8 memory\text{A 5Mx8 memory}A 5Mx8 memory

Explanation:

  • A 5Mx8 memory stores ( 5 \times 8 = 40 ) million bits, which is the largest among the options.

287. The process of entering data into a ROM is called:

  1. Burning in the ROM\text{Burning in the ROM}Burning in the ROM

  2. Changing the ROM\text{Changing the ROM}Changing the ROM

  3. Programming the ROM\text{Programming the ROM}Programming the ROM

  4. Charging the ROM\text{Charging the ROM}Charging the ROM

Show me the answer

Answer: 3. Programming the ROM\text{Programming the ROM}Programming the ROM

Explanation:

  • The process of entering data into a ROM is called programming.

288. When the set of input data to an even parity generator is 0111, the output will be:

  1. 111

  2. Unpredictable\text{Unpredictable}Unpredictable

  3. 000

  4. Depends on the previous input\text{Depends on the previous input}Depends on the previous input

Show me the answer

Answer: 3. 000

Explanation:

  • The input 0111 has an odd number of 1s, so the even parity bit is 0.

289. The number 140 in octal is equivalent to:

  1. (96)10(96)_{10}(96)10​

  2. (90)10(90)_{10}(90)10​

  3. (86)10(86)_{10}(86)10​

  4. None of these\text{None of these}None of these

Show me the answer

Answer: 3. (86)10(86)_{10}(86)10​

Explanation:

  • The octal number 140 converts to the decimal number 96.

290. The NOR gate output will be high if the two inputs are:

  1. 000000

  2. 101010

  3. 010101

  4. 111111

Show me the answer

Answer: 1. 000000

Explanation:

  • A NOR gate outputs 1 only when all inputs are 0.

291. Which of the following is the fastest logic?

  1. ECL\text{ECL}ECL

  2. CMOS\text{CMOS}CMOS

  3. TTL\text{TTL}TTL

  4. LSI\text{LSI}LSI

Show me the answer

Answer: 1. ECL\text{ECL}ECL

Explanation:

  • ECL (Emitter-Coupled Logic) is the fastest logic family.

292. How many flip-flops are required to construct a mod-30 counter?

  1. 555

  2. 444

  3. 666

  4. 888

Show me the answer

Answer: 1. 555

Explanation:

  • A mod-30 counter requires 5 flip-flops (since ( 2^5 = 32 \geq 30 )).

293. How many address bits are required to represent a 32K memory?

  1. 10 bits10 \text{ bits}10 bits

  2. 14 bits14 \text{ bits}14 bits

  3. 12 bits12 \text{ bits}12 bits

  4. 16 bits16 \text{ bits}16 bits

Show me the answer

Answer: 2. 14 bits14 \text{ bits}14 bits

Explanation:

  • A 32K memory requires ( \log_2(32768) = 15 ) bits, but 14 bits are sufficient for 16K, so 15 bits are needed for 32K.

294. The number of control lines for a 16-to-1 multiplexer is:

  1. 222

  2. 333

  3. 444

  4. 555

Show me the answer

Answer: 3. 444

Explanation:

  • A 16-to-1 multiplexer requires 4 control lines (since ( 2^4 = 16 )).

295. Which of the following requires refreshing?

  1. SRAM\text{SRAM}SRAM

  2. ROM\text{ROM}ROM

  3. DRAM\text{DRAM}DRAM

  4. EPROM\text{EPROM}EPROM

Show me the answer

Answer: 3. DRAM\text{DRAM}DRAM

Explanation:

  • DRAM (Dynamic RAM) requires periodic refreshing to maintain data.

296. Shifting a register content to the left by one bit position is equivalent to:

  1. Division by two\text{Division by two}Division by two

  2. Multiplication by two\text{Multiplication by two}Multiplication by two

  3. Addition by two\text{Addition by two}Addition by two

  4. Subtraction by two\text{Subtraction by two}Subtraction by two

Show me the answer

Answer: 2. Multiplication by two\text{Multiplication by two}Multiplication by two

Explanation:

  • Shifting left by one bit is equivalent to multiplying the number by 2.

297. For a JK flip-flop with ( J = 1 ) and ( K = 0 ), the output after a clock pulse will be:

  1. 000

  2. High impedance\text{High impedance}High impedance

  3. 111

  4. No change\text{No change}No change

Show me the answer

Answer: 3. 111

Explanation:

  • When ( J = 1 ) and ( K = 0 ), the JK flip-flop sets the output to 1.

298. Convert decimal 153 to octal. The equivalent in octal will be:

  1. (231)8(231)_8(231)8​

  2. (431)8(431)_8(431)8​

  3. (331)8(331)_8(331)8​

  4. None of these\text{None of these}None of these

Show me the answer

Answer: 1. (231)8(231)_8(231)8​

Explanation:

  • The decimal number 153 converts to the octal number 231.

299. The decimal equivalent of ((1100)2)( (1100)_2 )((1100)2​) is:

  1. 121212

  2. 181818

  3. 161616

  4. 202020

Show me the answer

Answer: 1. 121212

Explanation:

  • The binary number 1100 converts to the decimal number 12.

300. The binary equivalent of ((FA)16)( (FA)_{16} )((FA)16​) is:

  1. 101011111010111110101111

  2. 101100111011001110110011

  3. 111110101111101011111010

  4. None of these\text{None of these}None of these

Show me the answer

Answer: 3. 111110101111101011111010

Explanation:

  • The hexadecimal number FA converts to the binary number 11111010.

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