2.3 Sequential Logic Circuits
Last updated
Last updated
Introduction
There are two different types of digital circuits, combinational and sequential circuits. The combinational circuit generates an output signal based on its current input state. It does not need any kind of triggering pulse called a clock pulse. Whereas the sequential circuit changes output in the presence of the clock pulse.
A sequential circuit generates output based on its previous output state and current input state. It consists of a combinational circuit with a memory unit such as a flip-flop or latch. Flip-flops are edge-sensitive and latches are level-sensitive. The memory unit is used to provide feedback.
Edge triggering and level triggering are two different types of triggering methods used in digital circuits. It enables the circuit to initiate the output signal transition from one state to another. These both kinds of triggering are equally important and used to date.
RS Flip-Flop
An RS (Reset-Set) flip-flop is a basic bistable multivibrator that stores a single bit of data. It has two inputs:
Set (S): Used to set the output to 1
Reset (R): Used to reset the output to 0
The two outputs are:
Q: Normal output
Q' (Q bar): Inverted output
Working Principle:
When S = 1 and R = 0, Q becomes 1 (set state).
When S = 0 and R = 1, Q becomes 0 (reset state).
When S = 0 and R = 0, the output remains unchanged.
When S = 1 and R = 1, this state is invalid and should be avoided.
Truth Table:
0
0
No Change
No Change
0
1
0 (Reset)
1
1
0
1 (Set)
0
1
1
Invalid
Invalid
Implementation: An RS flip-flop can be built using either NOR gates or NAND gates.
Gated Flip-Flops
A gated flip-flop is an RS flip-flop with an additional Enable (G) input. This input acts as a control signal, ensuring that the flip-flop only operates when enabled.
Working Principle:
When G = 1, the flip-flop functions as a normal RS flip-flop.
When G = 0, the flip-flop holds its previous state, regardless of S and R inputs.
Truth Table:
0
X
X
No Change
No Change
1
0
0
No Change
No Change
1
0
1
0 (Reset)
1
1
1
0
1 (Set)
0
1
1
1
Invalid
Invalid
Circuit Implementation: Gated flip-flops are implemented by adding AND gates before the inputs of an RS flip-flop.
Edge-Triggered Flip-Flops
An edge-triggered flip-flop changes state only on a clock signal transition, either rising edge (0 → 1) or falling edge (1 → 0). This ensures precise timing in synchronous circuits.
Types:
Positive Edge-Triggered Flip-Flop: Activates on the rising edge.
Negative Edge-Triggered Flip-Flop: Activates on the falling edge.
Truth Table (Positive Edge-Triggered D Flip-Flop):
↑
0
0
1
↑
1
1
0
Working Principle:
Data is captured only at the exact moment of a clock edge.
This prevents unwanted changes between clock pulses.
Usage: Edge-triggered flip-flops are widely used in processors, registers, and counters to ensure accurate data storage and transfer.
Master-Slave Flip-Flops
A master-slave flip-flop consists of two flip-flops connected in series:
Master flip-flop: Captures input when the clock is HIGH.
Slave flip-flop: Updates output when the clock goes LOW.
This design helps to avoid timing issues and race conditions in sequential circuits.
Working Principle:
The master stores data during the clock pulse (HIGH state).
The slave transfers data to the output on the next clock pulse (LOW state).
Truth Table (Master-Slave D Flip-Flop):
0
X
No Change
No Change
↑
0
0
Previous State
↓
0
Previous State
0
↑
1
1
Previous State
↓
1
Previous State
1
Advantages:
Prevents glitches by separating input capture and output changes.
Ensures stable and synchronized outputs.
Used in shift registers and counters.
These flip-flops form the foundation of digital circuit design, ensuring proper data flow and synchronization in modern computing systems.
Registers are crucial in digital circuits as temporary storage elements. They hold binary data for a short time, often used for fast data manipulation and communication between different components in a system.
The key types of registers are:
Shift Registers:
Shift registers move binary data either to the left or right by a certain number of positions. Each shift operation moves data by one bit at a time.
How it works: The bits of data in a shift register move through a series of flip-flops or memory cells. The shift can occur in two main directions:
Left Shift: Data is moved towards the most significant bit (MSB) end, and new data enters from the least significant bit (LSB) end.
Right Shift: Data is moved towards the least significant bit (LSB) end, and new data enters from the MSB end.
Use Cases: Shift registers are used in applications that involve serial-to-parallel or parallel-to-serial data conversion.
Applications:
Data transfer (serial to parallel or vice versa).
Temporary data storage.
Used in ADC/DAC for converting data.
Pulse shaping in signal processing.
Parallel Registers:
These registers store multiple bits of data at the same time. Each bit of data is stored in a separate memory cell (flip-flop).
How it works: Data is written to or read from the entire register simultaneously. A parallel register can hold n bits of data, with each bit in a different position.
Use Cases: Parallel registers are useful in applications where you need to access multiple bits of data simultaneously, such as in multi-bit digital systems.
Applications:
Fast data storage and transfer.
Simultaneous data writing/reading.
Input/output operations in digital systems.
Serial Registers:
Serial registers store data one bit at a time in sequence, unlike parallel registers, which store multiple bits.
How it works: In serial registers, data is shifted into or out of the register one bit at a time, and each bit is processed in sequence.
Use Cases: Serial registers are commonly used in systems where data transfer occurs bit by bit over a single data line, such as in shift registers or serial communication protocols (e.g., UART, SPI).
Applications:
Data transfer in serial communication (e.g., UART, SPI).
Sequential data storage.
Signal processing in systems with limited I/O.
Asynchronous Counters
Asynchronous counters, often called ripple counters, work in a way where each flip-flop (FF) in the counter is triggered by the output of the previous flip-flop. Here's a more detailed explanation:
Sequential Triggering: In an asynchronous counter, the flip-flops are not triggered by the same clock signal at the same time. Instead, each flip-flop is triggered by the output of the preceding flip-flop. The first flip-flop receives the clock signal directly, and each subsequent flip-flop gets triggered by the output of the previous one.
Ripple Effect: This sequential triggering creates what is called the ripple effect. The ripple effect occurs because the change in the state of each flip-flop "ripples" through the counter, triggering the next flip-flop. This leads to a slight delay in the operation because each flip-flop waits for the previous one to update before changing its state.
Slower Operation: Since the flip-flops are not all triggered simultaneously, the counter is slower in operation, especially as the number of bits in the counter increases. Each flip-flop has to wait for the previous one to change before it can update, leading to propagation delay across the flip-flops.
Example (4-bit Asynchronous Binary Counter):
For a 4-bit binary counter, it counts from 0000 to 1111.
The first flip-flop (representing the least significant bit) toggles on each clock pulse, and each subsequent flip-flop toggles based on the output of the flip-flop before it.
This sequential triggering leads to delays, making it slower than synchronous counters.
Synchronous Counters
Synchronous counters, on the other hand, are faster and more efficient because all the flip-flops are triggered simultaneously by the same clock signal. Here's how they work:
Simultaneous Triggering: In a synchronous counter, all flip-flops are connected to the same clock pulse. This means that they all toggle (change state) at the same time, and there is no waiting for one flip-flop to trigger the next.
No Ripple Effect: Since all flip-flops receive the clock pulse at the same time, there is no ripple effect. The counter operates in a more synchronized manner, which speeds up the overall counting process.
Faster Operation: Because there is no delay between the flip-flops, synchronous counters are much faster than asynchronous counters. The entire counter changes its state in one clock cycle, making it more suitable for high-speed applications.
Example (4-bit Synchronous Binary Counter):
For a 4-bit binary counter, all flip-flops toggle on the same clock signal, so the counter counts from 0000 to 1111 without the delays caused by the ripple effect.
Each flip-flop is controlled by the same clock, and the counting happens in a synchronous manner, making the operation faster than in an asynchronous counter.
Flip-flops store and change data based on inputs, used in sequential logic circuits. RS, gated, edge-triggered, and master-slave flip-flops serve different purposes in timing and data synchronization. Registers, including shift registers, store and transfer data, while counters (asynchronous and synchronous) count in binary, with synchronous ones being faster.
