computer-nec-license
  • NEC-Computer
  • 1. Concept of Basic Electrical and Electronics Engineering
    • 1.1 Basic Concepts
    • 1.2 Network Theorems
    • 1.3 Alternating Current Fundamentals
    • 1.4 Semiconductor Device
    • 1.5 Signal Generator
    • 1.6 Amplifiers
    • MCQs
      • MCQs On Basic Electrical
        • set-1
        • set-2
      • MCQs On Basic Electronics
        • set-1
        • set-2
  • 2. Digital Logic and Microprocessor
    • 2.1 Digital Logic
    • 2.2 Combinational & Arithmetic Circuit
    • 2.3 Sequential Logic Circuits
    • 2.4 Microprocessor
    • 2.5 Microprocessor System
    • 2.6 Interrupt Operations
    • MCQs
      • MCQs On Digital Logic
        • set-1
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        • set-7
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      • MCQs On Microprocessor
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        • set-6
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  • 3. Programming Language and Its Applications
    • 3.1 Introduction to C Programming
    • 3.2 Pointers, Structures, and Data Files
    • 3.3 C++ Language Constructs with Objects and Classes
    • 3.4 Features of Object-Oriented Programming
    • 3.5 Pure Virtual Functions and File Handling
    • 3.6 Generic Programming and Exception Handling
    • MCQs
      • set-1
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      • set-3
      • set-4
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  • 4. Computer Organization and Embedded System
    • 4.1 Control and CPU
    • 4.2 Computer Arithmetic and Memory System
    • 4.3 I/O Organization and Multiprocessor
    • 4.4 Embedded System Design
    • 4.5 Real-Time Operating and Control Systems
    • 4.6 Hardware Description Language (VHDL) and IC Technology
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    • 5.1 Introduction to Computer Networks
    • 5.2 Data Link Layer
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    • 5.4 Transport Layer
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    • 5.6 Network Security
    • MCQs
      • Basic Networking
        • set-1
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      • Advanced Networking
        • set-1
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        • set-3
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        • set-6
  • 6. Theory of Computation and Computer Graphics
    • 6.1 Introduction to Finite Automata
    • 6.2 Introduction to Context-Free Languages (CFL)
    • 6.3 Turing Machines (TM)
    • 6.4 Introduction to Computer Graphics
    • 6.5 Two-Dimensional Transformation
    • 6.6 Three-Dimensional Transformation
    • MCQs
      • MCQs on Theory of Computation
        • set-1
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        • set-3
      • MCQs On Computer Graphics
        • set-1
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        • set-3
        • set-4
        • set-5
        • set-6
  • 7. Data Structures and Algorithm, Database System and Operating System
    • 7.1 Introduction to Data Structures, Lists, Linked Lists, and Trees
    • 7.2 Sorting, Searching, Hashing and Graphs
    • 7.3 Introduction to Data Models, Normalization, and SQL
    • 7.4 Transaction Processing, Concurrency Control, and Crash Recovery
    • 7.5 Introduction to Operating System and Process Management
    • 7.6 Memory Management, File Systems, and System Administration
    • MCQs
      • MCQs ON DSA
        • set-1
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      • MCQs On DBMS
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  • 8. Software Engineering and Object-Oriented Analysis & Design
    • 8.1 Software Process and Requirements
    • 8.2 Software Design
    • 8.3 Software Testing, Cost Estimation, Quality Management, and Configuration Management
    • 8.4 Object-Oriented Fundamentals and Analysis
    • 8.5 Object-Oriented Design
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  • 9. Artificial Intelligence and Neural Networks
    • 9.1 Introduction to AI and Intelligent Agents
    • 9.2 Problem Solving and Searching Techniques
    • 9.3 Knowledge Representation
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  • 10. Project Planning, Design and Implementation
    • 10.1 Engineering Drawings and Its Concepts
    • 10.2 Engineering Economics
    • 10.3 Project Planning and Scheduling
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    • 10.6 Engineering Regulatory Body
    • MCQs
      • MCQs On Engineering Drawing
        • set-1
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      • MCQs On Engineering Economics
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      • Short Questions (60*1=60 Marks)
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      • Long Questions (20*2=40 Marks)
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      • Short Questions (60*1=60 Marks)
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    • Model Set - Computer Engineering By NEC
      • Short Questions (60*1=60 Marks)
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  1. 2. Digital Logic and Microprocessor
  2. MCQs
  3. MCQs On Digital Logic

set-5

201. A combinational logic circuit which generates a particular binary word or number is:

  1. Decoder\text{Decoder}Decoder

  2. Encoder\text{Encoder}Encoder

  3. Multiplexer\text{Multiplexer}Multiplexer

  4. De-multiplexer\text{De-multiplexer}De-multiplexer

Show me the answer

Answer: 2. Encoder\text{Encoder}Encoder

Explanation:

  • An encoder generates a specific binary word or number based on the input signals.

202. Parallel adders are:

  1. Combinational logic circuits\text{Combinational logic circuits}Combinational logic circuits

  2. Sequential logic circuits\text{Sequential logic circuits}Sequential logic circuits

  3. Both of the above\text{Both of the above}Both of the above

  4. None of the above\text{None of the above}None of the above

Show me the answer

Answer: 1. Combinational logic circuits\text{Combinational logic circuits}Combinational logic circuits

Explanation:

  • Parallel adders are combinational circuits that perform addition without any memory or feedback.

203. A de-multiplexer is also known as:

  1. Data selector\text{Data selector}Data selector

  2. Multiplexer\text{Multiplexer}Multiplexer

  3. Data distributor\text{Data distributor}Data distributor

  4. Encoder\text{Encoder}Encoder

Show me the answer

Answer: 3. Data distributor\text{Data distributor}Data distributor

Explanation:

  • A de-multiplexer distributes a single input signal to one of many output lines, hence it is also called a data distributor.

204. A multiplexer is known as:

  1. Coder\text{Coder}Coder

  2. Data selector\text{Data selector}Data selector

  3. Decoder\text{Decoder}Decoder

  4. Encoder\text{Encoder}Encoder

Show me the answer

Answer: 2. Data selector\text{Data selector}Data selector

Explanation:

  • A multiplexer selects one of many input signals and forwards it to a single output line, hence it is also called a data selector.

205. A flip-flop can store:

  1. One bit of data\text{One bit of data}One bit of data

  2. Three bits of data\text{Three bits of data}Three bits of data

  3. Two bits of data\text{Two bits of data}Two bits of data

  4. Any number of bits of data\text{Any number of bits of data}Any number of bits of data

Show me the answer

Answer: 1. One bit of data\text{One bit of data}One bit of data

Explanation:

  • A flip-flop is a basic memory element that can store one bit of data (either 0 or 1).

206. Which of the following input combinations is not allowed in an SR flip-flop?

  1. S=0,R=0S=0, R=0S=0,R=0

  2. S=1,R=0S=1, R=0S=1,R=0

  3. S=0,R=1S=0, R=1S=0,R=1

  4. S=1,R=1S=1, R=1S=1,R=1

Show me the answer

Answer: 4. S=1,R=1S=1, R=1S=1,R=1

Explanation:

  • The input combination ( S=1, R=1 ) is invalid in an SR flip-flop because it leads to an indeterminate state.

207. When an inverter is placed between both inputs of an SR flip-flop, the resulting flip-flop is:

  1. JK flip-flop\text{JK flip-flop}JK flip-flop

  2. T flip-flop\text{T flip-flop}T flip-flop

  3. D flip-flop\text{D flip-flop}D flip-flop

  4. Master-slave JK flip-flop\text{Master-slave JK flip-flop}Master-slave JK flip-flop

Show me the answer

Answer: 3. D flip-flop\text{D flip-flop}D flip-flop

Explanation:

  • Placing an inverter between the inputs of an SR flip-flop converts it into a D flip-flop, where the input is directly passed to the output on a clock edge.

208. The clock signals are used in sequential logic circuits to:

  1. Tell the time of the day\text{Tell the time of the day}Tell the time of the day

  2. Tell how much time has elapsed since the system was turned on\text{Tell how much time has elapsed since the system was turned on}Tell how much time has elapsed since the system was turned on

  3. Carry serial data signals\text{Carry serial data signals}Carry serial data signals

  4. Synchronize events in various parts of a system\text{Synchronize events in various parts of a system}Synchronize events in various parts of a system

Show me the answer

Answer: 4. Synchronize events in various parts of a system\text{Synchronize events in various parts of a system}Synchronize events in various parts of a system

Explanation:

  • Clock signals are used to synchronize the operations of sequential logic circuits, ensuring proper timing and coordination.

209. What logic function is obtained by adding an inverter to the output of an AND gate?

  1. OR\text{OR}OR

  2. XOR\text{XOR}XOR

  3. NAND\text{NAND}NAND

  4. NOR\text{NOR}NOR

Show me the answer

Answer: 3. NAND\text{NAND}NAND

Explanation:

  • Adding an inverter to the output of an AND gate results in a NAND gate, which performs the NOT-AND operation.

210. The simplified form of the Boolean expression ( (X + Y + XY)(X + Z) ) is:

  1. X+Y+ZX + Y + ZX+Y+Z

  2. X+YZX + YZX+YZ

  3. XY+YZXY + YZXY+YZ

  4. XZ+YXZ + YXZ+Y

Show me the answer

Answer: 2. X+YZX + YZX+YZ

Explanation:

  • The expression simplifies to ( X + YZ ) using Boolean algebra rules.

211. The highest decimal number that can be represented with 10 binary digits is:

  1. 102310231023

  2. 512512512

  3. 102410241024

  4. 204820482048

Show me the answer

Answer: 1. 102310231023

Explanation:

  • With 10 binary digits, the highest decimal number that can be represented is ( 2^{10} - 1 = 1023 ).

212. What is the hexadecimal equivalent of the binary number 10101111?

  1. AFAFAF

  2. 8C8C8C

  3. OFOFOF

  4. AlloftheaboveAll of the aboveAlloftheabove

Show me the answer

Answer: 1. AFAFAF

Explanation:

  • The binary number 10101111 converts to the hexadecimal number AF.

213. Which of the following logic families has the highest noise immunity?

  1. RTL\text{RTL}RTL

  2. TTL\text{TTL}TTL

  3. DTL\text{DTL}DTL

  4. HTL\text{HTL}HTL

Show me the answer

Answer: 4. HTL\text{HTL}HTL

Explanation:

  • HTL (High-Threshold Logic) has the highest noise immunity due to its higher voltage levels.

214. Pick up the wrong logical expression:

  1. 1+0=0+1=11 + 0 = 0 + 1 = 11+0=0+1=1

  2. X+Y=X⋅YX + Y = X \cdot YX+Y=X⋅Y

  3. 0+0=1⋅1=00 + 0 = 1 \cdot 1 = 00+0=1⋅1=0

  4. X+0=XX + 0 = XX+0=X

Show me the answer

Answer: 2. X+Y=X⋅YX + Y = X \cdot YX+Y=X⋅Y

Explanation:

  • The expression ( X + Y = X \cdot Y ) is incorrect because OR and AND operations are not equivalent.

215. In a four-input NAND gate, all but one input is 1. The output is:

  1. 444

  2. 111

  3. 000

  4. Undefined\text{Undefined}Undefined

Show me the answer

Answer: 3. 000

Explanation:

  • In a NAND gate, if any input is 0, the output is 1. However, if all inputs are 1, the output is 0.

216. In a four-input AND gate, all but one input is 1. The output is:

  1. 000

  2. 111

  3. Undefined\text{Undefined}Undefined

  4. 444

Show me the answer

Answer: 1. 000

Explanation:

  • In an AND gate, if any input is 0, the output is 0.

217. According to the Idempotent law, ( X + X = ):

  1. 111

  2. XXX

  3. 000

  4. X⋅XX \cdot XX⋅X

Show me the answer

Answer: 2. XXX

Explanation:

  • The Idempotent law states that ( X + X = X ).

218. According to the Idempotent law, ( X \cdot X = ):

  1. 111

  2. XXX

  3. 000

  4. X+XX + XX+X

Show me the answer

Answer: 2. XXX

Explanation:

  • The Idempotent law states that ( X \cdot X = X ).

219. The output will be one in case any input is one in the case of:

  1. OR gate\text{OR gate}OR gate

  2. NAND gate\text{NAND gate}NAND gate

  3. AND gate\text{AND gate}AND gate

  4. NOT gate\text{NOT gate}NOT gate

Show me the answer

Answer: 1. OR gate\text{OR gate}OR gate

Explanation:

  • In an OR gate, the output is 1 if any input is 1.

220. Which of the following circuits is known as a half adder?

  1. EXCLUSIVE AND circuit\text{EXCLUSIVE AND circuit}EXCLUSIVE AND circuit

  2. INCLUSIVE OR circuit\text{INCLUSIVE OR circuit}INCLUSIVE OR circuit

  3. Flip-flop circuit\text{Flip-flop circuit}Flip-flop circuit

  4. EXCLUSIVE OR circuit\text{EXCLUSIVE OR circuit}EXCLUSIVE OR circuit

Show me the answer

Answer: 4. EXCLUSIVE OR circuit\text{EXCLUSIVE OR circuit}EXCLUSIVE OR circuit

Explanation:

  • A half adder consists of an XOR gate for the sum and an AND gate for the carry.

221. Which of the following functions is referred to as the complementary function?

  1. OR function\text{OR function}OR function

  2. NAND function\text{NAND function}NAND function

  3. NOT function\text{NOT function}NOT function

  4. AND function\text{AND function}AND function

Show me the answer

Answer: 3. NOT function\text{NOT function}NOT function

Explanation:

  • The NOT function is the complementary function, as it inverts the input.

222. Which of the following statements illustrates the distributive law?

  1. (A+B)+C=A+(B+C)=A+B+C(A + B) + C = A + (B + C) = A + B + C(A+B)+C=A+(B+C)=A+B+C

  2. (A⋅B)⋅C=A⋅(B⋅C)=A⋅B⋅C(A \cdot B) \cdot C = A \cdot (B \cdot C) = A \cdot B \cdot C(A⋅B)⋅C=A⋅(B⋅C)=A⋅B⋅C

  3. A+B=B+AA + B = B + AA+B=B+A

  4. A⋅(B+C)=(A⋅B)+(A⋅C)A \cdot (B + C) = (A \cdot B) + (A \cdot C)A⋅(B+C)=(A⋅B)+(A⋅C)

Show me the answer

Answer: 4. A⋅(B+C)=(A⋅B)+(A⋅C)A \cdot (B + C) = (A \cdot B) + (A \cdot C)A⋅(B+C)=(A⋅B)+(A⋅C)

Explanation:

  • The distributive law states that ( A \cdot (B + C) = (A \cdot B) + (A \cdot C) ).

223. Which of the following is termed as the minimum error code?

  1. Binary code\text{Binary code}Binary code

  2. Excess-3 code\text{Excess-3 code}Excess-3 code

  3. Gray code\text{Gray code}Gray code

  4. Octal code\text{Octal code}Octal code

Show me the answer

Answer: 3. Gray code\text{Gray code}Gray code

Explanation:

  • Gray code is designed to minimize errors in digital communication, as only one bit changes between consecutive values.

224. For which of the following flip-flops is the output clearly defined for all combinations of two inputs?

  1. D-type flip-flop\text{D-type flip-flop}D-type flip-flop

  2. JK flip-flop\text{JK flip-flop}JK flip-flop

  3. R-S flip-flop\text{R-S flip-flop}R-S flip-flop

  4. T flip-flop\text{T flip-flop}T flip-flop

Show me the answer

Answer: 2. JK flip-flop\text{JK flip-flop}JK flip-flop

Explanation:

  • The JK flip-flop has a defined output for all input combinations, including the toggle state.

225. A 4-bit shift register can be made by using:

  1. 3 JK flip-flops3 \text{ JK flip-flops}3 JK flip-flops

  2. 5 JK flip-flops5 \text{ JK flip-flops}5 JK flip-flops

  3. 4 JK flip-flops4 \text{ JK flip-flops}4 JK flip-flops

  4. 8 JK flip-flops8 \text{ JK flip-flops}8 JK flip-flops

Show me the answer

Answer: 3. 4 JK flip-flops4 \text{ JK flip-flops}4 JK flip-flops

Explanation:

  • A 4-bit shift register requires 4 flip-flops, one for each bit.

226. Which of the following statements is false?

  1. A⋅B‾=A‾+B‾\overline{A \cdot B} = \overline{A} + \overline{B}A⋅B=A+B

  2. A+B‾=A‾⋅B‾\overline{A + B} = \overline{A} \cdot \overline{B}A+B​=A⋅B

  3. A+B=A‾⋅B‾A + B = \overline{A} \cdot \overline{B}A+B=A⋅B

  4. A+A=AA + A = AA+A=A

Show me the answer

Answer: 3. A+B=A‾⋅B‾A + B = \overline{A} \cdot \overline{B}A+B=A⋅B

Explanation:

  • The statement ( A + B = \overline{A} \cdot \overline{B} ) is false according to De Morgan's laws.

227. The minimum form of the expression ( (A + B)(A + B + C) ) is:

  1. A+CA + CA+C

  2. A+BA + BA+B

  3. A+B+CA + B + CA+B+C

  4. A+BCA + BCA+BC

Show me the answer

Answer: 4. A+BCA + BCA+BC

Explanation:

  • The expression simplifies to ( A + BC ) using Boolean algebra.

228. One's complement of 1011.01 is:

  1. 0100.100100.100100.10

  2. 1011.101011.101011.10

  3. 0100.110100.110100.11

  4. 0100.010100.010100.01

Show me the answer

Answer: 1. 0100.100100.100100.10

Explanation:

  • The one's complement is obtained by inverting all the bits.

229. The NAND gate output will be low if the two inputs are:

  1. 000000

  2. 101010

  3. 010101

  4. 111111

Show me the answer

Answer: 4. 111111

Explanation:

  • A NAND gate outputs 0 only when all inputs are 1.

230. What is the binary equivalent of the decimal number 368?

  1. 101110000101110000101110000

  2. 111010000111010000111010000

  3. 110110000110110000110110000

  4. 111100000111100000111100000

Show me the answer

Answer: 1. 101110000101110000101110000

Explanation:

  • The binary equivalent of 368 is 101110000.

231. The decimal equivalent of the hexadecimal number 1A53 is:

  1. 679367936793

  2. 697369736973

  3. 673967396739

  4. 637963796379

Show me the answer

Answer: 1. 679367936793

Explanation:

  • The hexadecimal number 1A53 converts to the decimal number 6793.

232. The octal equivalent of the decimal number 324.987 is:

  1. 504.771504.771504.771

  2. 815.234815.234815.234

  3. 640.781640.781640.781

  4. 90.98790.98790.987

Show me the answer

Answer: 1. 504.771504.771504.771

Explanation:

  • The decimal number 324.987 converts to the octal number 504.771.

233. The simplification of the Boolean expression ( (A \cdot B \cdot C) + (A \cdot B \cdot \overline{C}) ) is:

  1. 000

  2. AAA

  3. A⋅BA \cdot BA⋅B

  4. B⋅CB \cdot CB⋅C

Show me the answer

Answer: 3. A⋅BA \cdot BA⋅B

Explanation:

  • The expression simplifies to ( A \cdot B ) using Boolean algebra.

234. The number of control lines for an 8-to-1 multiplexer is:

  1. 222

  2. 444

  3. 333

  4. 555

Show me the answer

Answer: 3. 333

Explanation:

  • An 8-to-1 multiplexer requires 3 control lines (since ( 2^3 = 8 )).

235. How many flip-flops are required for a mod-16 counter?

  1. 555

  2. 333

  3. 444

  4. 666

Show me the answer

Answer: 3. 444

Explanation:

  • A mod-16 counter requires 4 flip-flops (since ( 2^4 = 16 )).

236. EPROM contents can be erased by exposing it to:

  1. Ultraviolet light\text{Ultraviolet light}Ultraviolet light

  2. Burst of microwaves\text{Burst of microwaves}Burst of microwaves

  3. Infrared rays\text{Infrared rays}Infrared rays

  4. Intense heat radiations\text{Intense heat radiations}Intense heat radiations

Show me the answer

Answer: 1. Ultraviolet light\text{Ultraviolet light}Ultraviolet light

Explanation:

  • EPROMs are erased by exposing them to ultraviolet light.

237. The hexadecimal number 'A0' has the decimal value equivalent to:

  1. 808080

  2. 100100100

  3. 256256256

  4. 160160160

Show me the answer

Answer: 4. 160160160

Explanation:

  • The hexadecimal number A0 converts to the decimal number 160.

238. The Gray code for decimal number 6 is equivalent to:

  1. 110011001100

  2. 010101010101

  3. 100110011001

  4. 011001100110

Show me the answer

Answer: 4. 011001100110

Explanation:

  • The Gray code for decimal 6 is 0110.

239. The Boolean expression ( A \cdot B + A \cdot \overline{B} + \overline{A} \cdot B ) is equivalent to:

  1. A+BA + BA+B

  2. A⋅BA \cdot BA⋅B

  3. A‾+B‾\overline{A} + \overline{B}A+B

  4. A⊕BA \oplus BA⊕B

Show me the answer

Answer: 1. A+BA + BA+B

Explanation:

  • The expression simplifies to ( A + B ) using Boolean algebra.

240. The 2's complement of the binary number 1101101 is:

  1. 001001100100110010011

  2. 001001000100100010010

  3. 001000100100010010001

  4. 001000000100000010000

Show me the answer

Answer: 1. 001001100100110010011

Explanation:

  • The 2's complement of 1101101 is 0010011.

241. The digital logic family which has minimum power dissipation is:

  1. TTL\text{TTL}TTL

  2. DTL\text{DTL}DTL

  3. RTL\text{RTL}RTL

  4. CMOS\text{CMOS}CMOS

Show me the answer

Answer: 4. CMOS\text{CMOS}CMOS

Explanation:

  • CMOS logic has the lowest power dissipation among the given options.

242. The output of a logic gate is 1 when all its inputs are at logic 0. The gate is either:

  1. NAND or EX-OR\text{NAND or EX-OR}NAND or EX-OR

  2. AND or EX-OR\text{AND or EX-OR}AND or EX-OR

  3. OR or EX-NOR\text{OR or EX-NOR}OR or EX-NOR

  4. NOR or EX-NOR\text{NOR or EX-NOR}NOR or EX-NOR

Show me the answer

Answer: 4. NOR or EX-NOR\text{NOR or EX-NOR}NOR or EX-NOR

Explanation:

  • A NOR gate outputs 1 when all inputs are 0, and an EX-NOR gate outputs 1 when all inputs are equal.

243. Data can be changed from special code to temporal code by using:

  1. Shift registers\text{Shift registers}Shift registers

  2. Combinational circuits\text{Combinational circuits}Combinational circuits

  3. Counters\text{Counters}Counters

  4. Multiplexers\text{Multiplexers}Multiplexers

Show me the answer

Answer: 1. Shift registers\text{Shift registers}Shift registers

Explanation:

  • Shift registers are used to convert data from parallel to serial form or vice versa.

244. A ring counter consisting of five flip-flops will have:

  1. 5 states5 \text{ states}5 states

  2. 32 states32 \text{ states}32 states

  3. 10 states10 \text{ states}10 states

  4. Infinite states\text{Infinite states}Infinite states

Show me the answer

Answer: 1. 5 states5 \text{ states}5 states

Explanation:

  • A ring counter with 5 flip-flops has 5 unique states.

245. The speed of conversion is maximum in:

  1. Successive-approximation A/D converter\text{Successive-approximation A/D converter}Successive-approximation A/D converter

  2. Parallel-comparator A/D converter\text{Parallel-comparator A/D converter}Parallel-comparator A/D converter

  3. Counter-ramp A/D converter\text{Counter-ramp A/D converter}Counter-ramp A/D converter

  4. Dual-slope A/D converter\text{Dual-slope A/D converter}Dual-slope A/D converter

Show me the answer

Answer: 2. Parallel-comparator A/D converter\text{Parallel-comparator A/D converter}Parallel-comparator A/D converter

Explanation:

  • Parallel-comparator A/D converters have the fastest conversion speed.

246. The 2's complement of the number 1101101 is:

  1. 001001100100110010011

  2. 001001000100100010010

  3. 001000100100010010001

  4. 001000000100000010000

Show me the answer

Answer: 1. 001001100100110010011

Explanation:

  • The 2's complement of 1101101 is 0010011.

247. The correction to be applied in a decimal adder to the generated sum is:

  1. A+BA + BA+B

  2. A⋅BA \cdot BA⋅B

  3. A‾+B‾\overline{A} + \overline{B}A+B

  4. A‾⋅B‾\overline{A} \cdot \overline{B}A⋅B

Show me the answer

Answer: 2. A⋅BA \cdot BA⋅B

Explanation:

  • The correction term in a decimal adder is ( A \cdot B ).

248. When simplified with Boolean algebra, ( (x + y)(x + z) ) simplifies to:

  1. xxx

  2. x+yzx + yzx+yz

  3. x+y+zx + y + zx+y+z

  4. x(y+z)x(y + z)x(y+z)

Show me the answer

Answer: 2. x+yzx + yzx+yz

Explanation:

  • The expression simplifies to ( x + yz ) using Boolean algebra.

249. The gates required to build a half adder are:

  1. EX-OR gate and NOR gate\text{EX-OR gate and NOR gate}EX-OR gate and NOR gate

  2. EX-OR gate and AND gate\text{EX-OR gate and AND gate}EX-OR gate and AND gate

  3. EX-OR gate and OR gate\text{EX-OR gate and OR gate}EX-OR gate and OR gate

  4. Four NAND gates\text{Four NAND gates}Four NAND gates

Show me the answer

Answer: 2. EX-OR gate and AND gate\text{EX-OR gate and AND gate}EX-OR gate and AND gate

Explanation:

  • A half adder consists of an EX-OR gate for the sum and an AND gate for the carry.

250. The code where all successive numbers differ from their preceding number by a single bit is:

  1. Binary code\text{Binary code}Binary code

  2. Excess-3 code\text{Excess-3 code}Excess-3 code

  3. BCD code\text{BCD code}BCD code

  4. Gray code\text{Gray code}Gray code

Show me the answer

Answer: 4. Gray code\text{Gray code}Gray code

Explanation:

  • Gray code ensures that only one bit changes between consecutive numbers.

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