MCQs
1. A time-sharing system implies:
More than one processor in the memory
More than one program in the memory
More than one memory in the system
None of above
2. A multiprocessor computer is of the type:
SISD
MIMD
SIMD
All of the above
3. Microprocessor is a device which has at least:
Memory
Registers
I/O devices
CPU
4. A supercomputer has the capabilities of execution:
Pipeline instruction
Floating point arithmetic operation
Vector instruction
All of the above
5. The maximum stages in pipelining architecture are:
4
6
2
5
6. Instruction pipelining has minimum stages:
4
6
2
3
7. Systems do not have parallel processing capabilities are:
SISD
MIMD
SIMD
All of the above
8. Memory access in RISC architecture is limited to instructions:
CALL & RET
STA & LDA
PUSH & POP
MOV & JMP
9. Interrupt which are initiated by an I/O device are:
Internal
Software
External
All of the above
10. Interrupt which are initiated by an instruction are:
Hardware
Internal
External
Software
11. States bit of the CPU are stored in a flag:
Carry
Zero
Sign
All of the above
12. The effective address is the address of the operand in an instruction of type:
Immediate
Register
Indirect
Computational
13. Program counter of a CPU stores the address of the instruction:
Currently executed
Just executed
To be executed next
None of the above
14. A stack-organized computer has:
Three-address instruction
One-address instruction
Two-address instruction
Zero-address instruction
15. The operation performed on stack are:
IN & OUT
PUSH & POP
CALL & RET
POP & OUT
16. The stack is the list of type:
LIFO
FILO
LILO
All of the above
17. A microprocessor consists of:
Control unit
ALU
Program counter
All of the above
18. A microprocessor sequencer performs the operation:
Read
Execute
Write
Read and execute
19. A microprogram written as a string of 0's and 1's is a:
Symbolic microinstruction
Binary microprogram
Binary microinstruction
All of the above
20. The branch logic that provides decision-making capabilities in the control unit is known as:
Controlled transfer
Unconditional transfer
Conditional transfer
None of the above
21. A control unit whose binary control variables are stored in memory is known as:
Hardwired control unit
Software control unit
Micro-programmed control unit
Hardware control unit
22. During execution, subroutine return address is stored in:
Control address register
Stack pointer
Subroutine address
Memory location
23. The next address generator is sometimes called a:
Instruction sequence
Micro program sequence
Program sequence
Translator
24. The control data register holds the present microinstruction and is sometimes called:
Instruction register
Sequence register
Microinstruction register
Pipeline register
25. A memory that is a part of a control unit is referred to as:
External memory
Cache memory
Internal memory
Control memory
26. Whenever POP H instruction is executed:
Data byte in the HL pair are stored on the stack
Two data bytes at the top of the stack are transferred to the HP register pair
Two data bytes at the top of the stack are transferred to the program counter
Two data bytes from the HL register that were previously stored on the stack are transferred back to the HL pointer
27. When the RET instruction at the end of a subroutine is executed:
The information where the stack is initialized is transferred to the stack pointer
The memory address of the RET instructions is transferred to the program counter
Two data bytes stored in the top two locations of the stack are transferred to the program counter
Two data bytes stored in the top two locations of the stack are transferred to the stack pointer
28. When a subroutine is called, the address of the instruction following the CALL is stored in/on the:
Stack pointer
Program counter
Accumulator
Stack
29. A stack pointer is:
A 16-bit register in the microprocessor that indicates the beginning of the stack memory
A register that decodes and executes 16-bit arithmetic expressions
The first memory locations where a subroutine address is stored
A register in which flag bits are stored
30. A stack is:
An 8-bit register in the microprocessor
A set of memory locations in R/WM reserved for storing information temporarily during the execution of a program
A 16-bit memory address stored in the program counter
A 16-bit register in the microprocessor
31. A third and last component of CPU is:
ALU
Supervisor – control unit
Input device
Register unit
32. The section of the CPU that selects, interprets, and sees to the execution of program instructions is:
Memory
Control unit
Register unit
ALU
33. A device used to bring information into a computer is:
ALU
Control unit
Input device
Output device
34. A microprocessor is a..... on a chip:
Computer
ALU
CPU
Control unit
35. Part of the computer where the data and instructions are held is:
Register unit
Memory unit
Accumulator
CPU
36. Backing storage is so named because:
It is always kept at the back of the CPU
It backs up the computer's main memory
It lags behind the main memory
It is slow and backward
37. The ALU and control unit of most of the microcomputers are combined and manufactured on a single silicon chip. What is it called?
Monochip
ALU
Microprocessor
Control unit
38. Which of the following code used in present-day computing was developed by IBM corporation?
ASCII
Baudot code
Hollerith code
EBCDIC CODE
39. Which parts of the computer are used for calculating and comparing?
Disk unit
ALU
Control unit
Modem
40. Instruction LXI in 8085 loads:
Stack pointer
None of the above
Register pair
All of the above
41. A CALL instruction is always encountered by instructions:
IN
OUT
RET
INTR
42. In I/O mapped I/O 8085 duplicates the I/O address on:
Address and data line
Lower byte of address and control line
Lower and higher byte of address
Higher byte of address and data line
43. Address and data line in 8085 are:
Separate lines
Only lower byte of address is multiplexed
Common line
Shared line
44. The 16-bit register in 8085 is:
General purpose register
Stack pointer and program counter
Accumulator
All of the above
45. Microprocessor 8085 can address location up to:
32K
64K
128K
1M
46. Pipeline processing implements:
Fetch instructions
Fetch operand
Decode instruction
All of the above
47. Pipeline strategy is called implement:
Instruction execution
Instruction decoding
Instruction pre-fetch
Instruction manipulation
48. Intel 80486 pipelining implements stages:
6
5
4
3
49. Pipeline processing uses the technique:
Sharing the memory
Pre-fetching
Bit slicing
Parallel processing
50. Micro instructions are stored in:
Computer memory
Secondary storage
Primary memory
Control memory
51. Hardwired control unit is implemented by:
Software routines
Stacks
Logic circuits
Registers
52. Control unit operation is performed:
Hardwired control only
Micro program control only
Hardwired or micro program control
None of the above
53. Micro instructions are stored in the:
Internal storage
Cache
External storage
Control memory
54. The registers are essential to instruction execution:
Program counter
Memory buffer register
Instruction register
All of the above
55. In immediate addressing the operand is placed:
In the CPU register
After op-code in the instruction
In the memory
In the stack
56. The most common addressing technique employed by a CPU is:
Immediate
Indirect
Direct
All of the above
57. CPU does not perform the operation:
Data transfer
Arithmetic operation
Logic operation
All of the above
58. Branch instructions are used to:
Manipulate numeric data
Transfer control
Logical data
Manage data
59. Arithmetic instructions provide:
Data processing capabilities
Computational capabilities
Data storage capabilities
Control capabilities
60. The ALU of a central processing unit does the essential math work for the computer. What does the control unit do?
Communicates its results
Activates the output device
Monitors the flow of information
Control the printer
61. Which type of computers use the 8-bit code called EBCDIC?
Minicomputers
Mainframe
Microcomputers
Supercomputers
62. The ALU of a computer responds to the commands coming from:
Primary memory
External memory
Control section
Cache memory
63. The microprocessor of a computer cannot operate on any information if that information is not in its:
Secondary storage
ALU
Main storage
Logic unit
64. Who coordinates the sequencing of events within the central processor or computer?
Logic unit
Register unit
Arithmetical unit
Control unit
65. A computer program that converts an entire program into machine language at one time is called a/an:
Interpreter
Compiler
Simulator
Commander
66. What is meant by a dedicated computer?
Which is used by one person only
Which is assigned one and only one task
Which does one kind of software
Which is meant for application software only
67. A complete microcomputer system consists of:
Microprocessor
Peripheral equipment
Memory
All of the above
68. Which major development led to the production of microcomputers?
Magnetic tapes
Logic gates
Floppy disks
Integrated circuits
69. The word size of a microprocessor refers to:
The amount of information that can be stored in a byte
The amount of information that can be stored in a cycle
The number of machine operations performed in a second
The maximum length of an English word that can be input to a computer
70. One computer that is not considered a portable computer is:
Minicomputer
Notebook computer
Laptop computer
All of the above
71. Which of the following require large computer memory?
Imaging
Voice
Graphics
All of the above
72. A computer enthusiast is:
User friendly
Computer
A hacker
All of the above
73. Most of the inexpensive personal computers do not have any disk or diskette drive. What is the name of such computers?
Home computers
Dedicated computers
Diskless computers
None of the above
74. A computer has no more sense than a light
Bulb
Switch
Pen
Pad
75. How many address lines are needed to address each memory locations in a 2048x4 memory chip?
10
8
11
12
76. The stack pointer in the 8085 microprocessor is a
16-bit register that points to stack memory locations
16-bit accumulator
Memory locations in the stack
Flag register used for the stack
77. Which of the following registers is used to keep track of address of the memory location where the next instruction is located?
Memory address register
Instruction register
Memory data register
Program counter
78. Which of the following registers is loaded with the content of memory location pointed by the PC?
Memory address register
Instruction register
Memory data register
Program counter
79. In which addressing mode, the effective address of the operand is generated by adding a constant value to the contents of a register?
Absolute mode
Immediate mode
Indirect mode
Index mode
81. Super computers are primarily useful for
Input-output intensive processing
Data-retrieval operations
Mathematical-intensive scientific applications
All of the above
82. The heart of any computer is the
CPU
I/O units
Memory
Disks
83. The central processing unit (CPU) consists of:
Input, output and processing
Control unit, primary storage, and secondary storage
Control unit, arithmetical logic unit, and primary storage
None of the above
84. Which is not an input device?
CRT
Optical scanners
Voice recognition
COM (Computer Output Microfilm)
85. The ascending order of a data hierarchy is:
Bit-bytes-field-record-file-database
Bytes-bit-fields-record-file-database
Bit-bytes-record-field-file-database
Bytes-bit-record-fields-file-database
86. What is the control unit's function in the CPU?
To transfer data to primary storage
To store program instruction
To perform logic operations
To decode program instructions
87. The most common input device used today is
Motherboard
Scanner
Track ball
Keyboard
88. Which is not a factor when categorizing a computer?
Speed of the output device
Amount of main memory the CPU can use
Cost of the system
Where is was purchased
89. Which is not true for primary storage?
Information must be transferred to primary storage
It is relatively more expensive
It allows very fast access to data
All of the above
90. Which is the most powerful type of computer?
Microcomputer
Mainframe computer
Minicomputer
Super computer
91. Which kind of storage device can be carried around?
Floppy disk
System cabinet
Hard disk
Hard disk drive
92. Which kind of devices allows the user to add components and capabilities to a computer system?
System board
Input devices
Storage devices
Expansion slots
93. Group of instructions that direct a computer is called
Storage
Logic
Memory
Program
94. The basic components of a modern digital computer are:
Input device
Central processing unit
Output device
All of the above
95. A collection of eight bits is called:
Byte
Record
Word
File
96. Processor of all computer, whether micro, mini or mainframe must have
ALU
Control unit
Primary storage
All of the above
97. Where does a computer add and compare data?
Hard disk
CPU chip
Floppy disk
Memory chip
98. If a particular idea can be implemented in hardware or software, the factor(s) that favor hardware implementation is/are
Cost-effectiveness
Reliability
Speed of operation
Frequent changes expected
99. Tera is 2 to the power of
32
40
30
25
100. Von Neumann architecture is
SISD
MIMD
SIMD
MISD
101. To achieve parallelism, one needs a minimum of
2 processors
4 processors
3 processors
None of the above
102. SIMD can be used for
Railway reservation
Matrix multiplication
Weather forecasting
Both B and C
103. A typical application of MIMD is
Railway reservation
Matrix multiplication
Weather forecasting
All of the above
104. Let * be defined as ab=a+b. Let m=ab. The value of m*a is
a+b
0
a
1
105. RST 7.5 interrupt in 8085 microprocessor executes services from interrupt vector location
0000h
003Ch
0075h
0034h
106. Three main components of a digital computer system are
Memory, I/O, DMA
Memory, CPU, I/O
ALU, CPU, memory
Control circuits, ALU, registers
107. Micro program is
The name of a source program in micro computers
The set of instructions indicating the primitive operations in a system
A primitive form of macros used in assembly language programming
A program of very small size
108. A toggle operation cannot be performed using a single
NOR gate
NAND gate
AND gate
XOR gate
109. 'n' flip-flops will divide the clock frequency by a factor of
(N^2)
(2^N)
(N)
Log(N)
110. Most of the digital computers do not have floating-point hardware because
It is costly
It is slower than software
Floating-point addition cannot be performed by hardware
None of the above
111. An assembler that runs on one machine but produces machine code for another machine is called.
Simulator
Cross-compiler
Emulator
Boot-strap loader
112. Which of the following is not typically found in the status register of a microprocessor?
Overflow
Negative result
Zero result
None of the above
113. When even-parity ASCII text is transmitted asynchronously at a rate of 10 character per second over a line, what percentage of the received bits actually contain data (as opposed to overhead)?
7/11
700/11
8/11
80/11
114. A subtractor is not usually present in a computer because
It is expensive
It is not possible to design it
The adder will take care of subtraction
None of the above
115. Let an (a_{n-1}, \ldots, a_1) be the binary representation of an integer b. The integer b is divisible by 3 if
The number of one’s is divisible by 3
The number of one’s is divisible by 3 but not by 9
The number of zeroes is divisible by 3
The difference of alternate sum, i.e., ((a_0 + a_2 + \ldots) - (a_1 + a_2 + \ldots)) is divisible by 3
116. Which of the following 4-bit numbers equals its 2’s complement?
1010
1000
No such no. exists
None of the above
117. Which of the following 4-bit numbers equals its 1’s complement?
1010
No such number exists
1000
None of the above
118. FFFF will be the last memory location in a memory of size
1 K
16 K
32 K
64 K
119. If you want to design a boundary counter, you should a prefer a flip flop of
D-type
Latch
SR-type
JK type
120. Suppose the largest n-bit binary number 'd' digits in decimal representation. Which of the following relations between 'n' and 'd' is approximately correct?
D=2^n
D<n log (10^2)
N=2^d
D>n log(10^2)
121. A computer uses 8-digit mantissa and 2-digit exponent. If a=0.052 and b=28E+11, then b+a-b will
Result in an overflow error
0
Results in an underflow error
5.28E+11
122. Which of the following binary numbers are not divisible by 4?
10101010101010
1110001110001
100101100
Both A and C
123. A computer with a 32-bit wide data bus uses 4K x8 static RAM memory chips. The smallest memory this computer can have is
32 Kb
16 Kb
8 Kb
24 Kb
124. Which of the following instructions requires the greatest number of T-states?
MOV A, B
LDAX B
MOV A, M
DAD D
125. The 8085 microprocessor enters into wait state after the recognition of
HOLD
*RESET-IN
*READY
INTER
126. Maximum number of I/O devices that can be addressed by Intel 8085 is
65,536
512
255
256
127. The microprocessor may be made to exit from HALT state by asserting
RESET
Any of the five interrupt lines
READY LINE
Option (A) or option (B) or HOLD line
128. The number of RAM chips of size (256 K x 1) required to build a 1 M byte memory is
8
10
32
24
129. The instruction used to shift right the accumulator contents by one bit through the carry flag bit is
RLC
RRC
RAL
RAR
130. The stack is nothing but a set of
Reserved ROM address spaces
Reserved I/O address space
Reserved RAM address spaces
None of the above
131. The execution of RST instructions causes the stack pointer to
Increment by two
Remain unaffected
Decrement by two
None of the above
132. Which one of the following instructions may be used to clear the accumulator content (i.e. A=00h) irrespective of its initial value?
CLR A
SUB A
ORA A
MOV A, 00h
133. The only interrupt that is edgetriggered is
INTR
RST 7.5
TRAP
RST 5.5
134. Which of the following peripheral ICs is used to interface keyboard and display?
8251
8259
8279
8253
135. The contents of the A15-A8(higher order address lines) while executing "IN addr" instructions are
Same as the contents of A7-A0
All bits reset (i.e. 00h)
Irrelevant
All bits set (i.e. FFh)
136. Which one of the following instructions will never affect the zero flag?
DCR reg
DCX rp
ORA reg
XRA reg
137. Which one of the following interrupts is non-mask able?
TRAP
INTER
RST 7.5
RST 6.5
138. RST 3 instruction will cause the processor to branch to the location
0000h
0024h
0018h
8018h
139. The minimum number of bits required to represent a character from ASCII code set is
2
7
5
8
140. S0 and S1 pins are used for
Serial communication
Acknowledgement the interrupt
Indicating the processor's status
None of the above
141. Pick out the matching pair
READY; RIM
SID; SIM
HOLD; DMA
S0, S1; WAIT states
142. Which of the following is unipolar, difficult to fabricate, has very high speed and offers good resistance to radiation?
ECL
TTL
GaAs
CMOS
143. Multiplexing of data/address lines in 8085 microprocessor reduces the instructions execution time. This statement is
True
Most likely to be true
False
None of the above
144. The number of flip-flops needed to construct a binary modulo N counter is
N
N^2
2^N
Log_2 N
145. To change an upper-case character to a lower-case character in ASCII, the correct mast and operation should be
0100000 and NOR
0100000 and NAND
0100000 and OR
1011111 and NAND
146. PCHL is an instruction in 8085 which transfers the contents of the register pair HL to PC. This is not a commonly used instruction as it changes the flow of control in a rather unstructured fashion. This instruction cannot be used in implementing
If.....then......else statement
Case.....structure
While......do construct
Call....statements
147. In an 11-bit computer instruction format, the size of address field is 4 bits. The computer uses expanding OP code technique and has 5 two-address instructions and .32 one-address instructions. The number of zero address instructions it can support is
256
16
2048
272
148. Which of the following instructions may be used to save the accumulator value onto the stack?
PUSH PSW
PUSH SP
PUSH A
POP PSW
149. Which of the following statements is true?
ROM is a read/write memory
PC points to the last instruction that was executed
Stack works on the principle of LIFO
All instructions affect the flag
150. A single instruction to clear the lower four bits of the accumulator in 8085 assembly language is
XRI OFH
XRI FOH
ANI FOH
ANI OFH
151. In a vectored interrupt
The branch address is assigned to a fixed location in memory.
The interrupting source supplies the branch information to the processor through an interrupt vector.
The branch address is obtained from a register in the processor.
None of the above.
152. A sequence of two instructions that multiplies the contents of the DE register pair by 2 and stores the result in the HL register pair (in 8085 assembly language) is
XCHG and DAD B
XTHL and DAD H
PCHL and DAD D
XCHG and DAD H
153. The most relevant addressing mode to write position-independent code is
Direct mode
Relative mode
Indirect mode
Indexed mode
154. Which of the following are CISC machines?
IBM 360
68030
80386
All of the above
155. The working of a staircase switch is a typical example of the logical operation
OR
Exclusive-OR
NOR
Exclusive-NOR
156. Which of the following are typical characteristics of a RISC machine?
Instruction taking multiple cycles
Multiple register sets
Highly pipelined
Both 2 and 3
157. A microprogrammed control unit
Is faster than a hardwired control unit
Facilitates easy implementation of new instructions
Is useful when very small programs are to be run
Usually refers to the control unit of a microprocessor
158. Parallel printer uses
RS-232C interfaces
Handshake mode
Centronics interface
Both 2 and 3
159. The ASCII code 56 represents the character
V
A
8
Carriage return
160. The number of possible Boolean functions that can be defined for n Boolean variables over n-valued Boolean algebra is
( 2^{n^2} )
( 2^{n^2} )
( n^{2^n} )
( n^{n^2} )
161. The advantage of a single bus over a multi-bus is the
Low cost
Flexibility in attaching peripheral devices
Both 1 and 2
High operating speed
162. Which of the following rules regarding the addition of 2 given numbers is correct, if negative numbers are represented in 2's complement form?
Add sign bit and discard carry, if any.
Add sign bit and add carry, if any.
Do not add sign bit and discard carry, if any.
Do not add sign bit and add carry, if any.
163. When INTR is encountered, the processor branches to the memory location, which is
0024H
Determined by the "call address" instruction issued by the I/O device
Determined by the "RST N" instructions issued by the I/O device
Both 2 and 3
164. In which of the following instructions does bus idle situation occur?
EI
INX H
DAD rp
DAA
165. Any instruction should have at least
2 operands
3 operands
1 operand
None of the above
166. If the cache needs an access time of 20ns and the main memory 120 ns, then the average access time of a CPU is (assume hit-ratio is 80%)
30ns
35ns
40ns
45ns
167. The number of clock cycles necessary to complete 1 fetch cycle in 8085 (excluding wait state) is
3 or 4
4 or 6
4 or 5
3 or 5
168. The seek time of a disk is 30ms. It rotates at the rate of 30 rotations per second. Each track has a capacity of 300 words. The access time is approximately
47ms
60ms
50ms
62ms
169. Motorola's 68040 is comparable to
8085
80386
80286
80486
170. The possible number of Boolean functions of 3 variables X, Y, and Z such that f(X, Y, Z) = F(X', Y', Z') is
8
64
16
32
171. Which of the following interrupts is both level and edge sensitive?
RST 5.5
RST 7.5
INTR
TRAP
172. The difference between 80486 and 80386 is/are
Presence of floating-point co-processor
Speed of operation
Presence of 8 K cache on chip
All of the above
173. The addressing mode used in the instruction PUSH B is
Direct
Register direct
Register
Immediate
174. Which of the following architecture is/are not suitable for realizing SIMD?
Vector processor
Von Neumann
Array processor
All of the above
175. The total number of possible Boolean functions involving 'n' Boolean variables is
Infinitely many
( n^2 )
( n^n )
None of the above
176. If ((11A1B)_8 = (12C9)_16) (C stands for decimal 12), then the value of A and B are:
5,1
5,7
7,5
None of the above
177. Which of the following operations(s) is/are not closed as regards to computers?
Addition
Multiplication
Subtraction
All of the above
178. Which of the following units can be used to measure the speed of a computer?
SYPS
FLOPS
MIPS
Both 2 and 3
179. If A XOR B = C, THEN
A XOR B = B
A XOR B XOR C = 0
B XOR C = A
All of the above
180. Addressing capability of 8086/88 are
64 K
2 MB
512 K
1 MB
181. Bubble memories are preferable to floppy disks because
Of their higher transfer rate
Of their reliability
They consume less power
Both 2 and 3
182. The XOR operation is
Commutative
Associative
Both 1 and 2
Distributive over AND operator
183. Which of the following logic families is well suited for high-speed operation?
TTL
MOS
ECL
CMOS
184. Which of the following does not have 8 data lines?
8085
8088
8086
Z-80
185. Negative numbers cannot be represented in
Signed magnitude form
2's complement form
1's complement form
None of the above
186. The addressing mode used in an instruction of the form ADD X, Y is
Absolute
Index
Indirect
None of the above
187. Which of the following are registers?
Accumulator
Program counter
Stack pointer
All of the above
188. IBM developed a bus standard for their line of computers ‘PC AT’ called______.
IB bus
ISA
M-bus
None of these
189. Which of the following is the programmable internal timer?
8251
8253
8250
8275
190. Bipolar devices are desirable in the fabrication of which of the following components?
Main memory
Microprogram memory
Cache memory
All of the above
191. A+B can be implemented by
NAND gates alone
NOR gate alone
Both 1 and 2
None of the above
192. Which of the following are the correct statements?
Bus is a group of information-carrying wires
Bus is needed to achieve reasonable speed of operation
Bus can carry data or address lines, a bus can be shared by more than one device
All of the above
193. A number system uses 20 as the radix. The excess code that is necessary for its equivalent binary-coded representation is
4
6
5
7
194. Any given truth table can be represented by a
Karnaugh map
Sum of product of Boolean expressions
Product of sum of Boolean expressions
All of the above
195. Which of the following remarks about PLA is/are true?
It produces product of sum as the output
It produces sum of products as the output
It is general
Both 2 and 3
196. The first operating system used in microprocessor is
Zenix
CP/M
DOS
Multics
197. Which of the following does not need extra hardware for DRAM refreshing?
8085
Z-80
Motorola-6800
None of the above
198. The advantage of MOS devices over bipolar devices is
It allows higher bit densities and also cost-effective
It is easy to fabricate
Its higher impedance
All of the above
199. Which of the following comments about the Program Counter (PC) are true?
It is a register
It is a cell in ROM
During execution of the current instruction, its content changes
Both 1 and 3
200. Choose the correct statements from the following
By scanning a bit pattern, one can say whether it represents data or form
Whether a given piece of information is data or not depends on the particular applications
Positive number cannot be represented in 1's complement form
Both 2 and 3
201. Property of locality of reference may fail if a program has
Many conditional jumps
Many operands
Many unconditional jumps
All of the above
202. In Reverse Polish notation, expression AB+CD is written as
AB*CD++
ABCD+
A*BCD++
ABCD+
203. SIMD represents an organization that______.
Refers to a computer system capable of processing several programs at the same time.
Represents organization of single computer containing a control unit, processor unit and a memory unit.
Includes many processing units under the supervision of a common control unit
None of the above
204. Floating point representation is used to store
Boolean values
Real integers
Whole numbers
Integers
205. Suppose that a bus has 16 data lines and required 4 cycles of 250 nano seconds each to transfer data. The bandwidth of this bus would be 2 Megabytes/sec. If the cycle time of the bus was reduced to 125 nsecs and the number of cycles required for transfer stayed the same what would the bandwidth of the bus?
1 Megabyte/sec
8 Megabytes/sec
4 Megabytes/sec
2 Megabytes/sec
206. Assembly language
Uses alphabetic codes in place of binary numbers used in machine language
Is the easiest language to write programs
Need not be translated into machine language
None of the above
207. In computers, subtraction is generally carried out by
9's complement
1's complement
10's complement
2's complement
208. The amount of time required to read a block of data from a disk into memory is composed of seek time, rotational latency, and transfer time. Rotational latency refers to
The time it takes for the platter to make a full rotation
The time it takes for the read-write head to move into position over the appropriate track
The time it takes for the platter to rotate the correct sector under the head
None of the above
209. What characteristic of RAM memory makes it not suitable for permanent storage?
Too slow
It is volatile
Unreliable
Too bulky
210. Computers use addressing mode techniques for:
Giving programming versatility to the user by providing facilities as pointers to memory counters for loop control
To reduce no. of bits in the field of instruction
Specifying rules for modifying or interpreting address field of the instruction
All the above
211. The circuit used to store one bit of data is known as
Register
Decoder
Encoder
Flip-flop
212. (2FAOC)16 is equivalent to:
(195 084)10
Both A and B
(001011111010 0000 1100)
None of these
213. The average time required to reach a storage location in memory and obtain its contents is called the:
Seek time
Turnaround time
Access time
Transfer time
214. Which of the following is not a weighted code?
Decimal number system
Binary Number System
Excess-3 code
None of the above
215. ______ register keeps track of the instructions stored in program stored in memory.
AR (Address Register)
PC (Program Counter)
XR (Index Register)
AC (Accumulator)
216. The addressing mode used in an instruction of the form ADD X Y, is
Absolute
Index
Indirect
None of the above
217. In a memory-mapped I/O system, which of the following will not be there?
LDA
ADD
IN
OUT
218. In a vectored interrupt:
The branch address is assigned to a fixed location in memory
The interrupting source supplies the branch information to the processor through an interrupt vector
The branch address is obtained from a register in the processor
None of the above
219. Cache memory acts between
CPU and RAM
CPU and HARDSIK
RAM and ROM
None of the above
220. Write Through technique is used in which memory for updating the data:
Virtual memory
Auxiliary memory
Main memory
Cache memory
221. Generally Dynamic RAM is used as main memory in a computer system as it
Consumes less power
Has lower cell density
Has higher speed
Needs refreshing circuitry
222. In signed-magnitude binary division, if the dividend is (11100)₂ and divisor is (10011)₂ then the result is
(00100)₂
(11001)₂
(10100)₂
(01100)₂
223. Virtual memory consists up:
Static RAM
Magnetic memory
Dynamic RAM
None of the above
224. In a program using subroutine call instruction, it is necessary
Initialize program counter
Reset the microprocessor
Clear the accumulator
Clear the instruction register
225. When CPU is executing a Program that is part of the Operating System, it is said to be in
Interrupt mode
Half mode
System mode
Simplex mode
226. A-Flip Flop can be converted into T-Flip Flop by using additional logic circuit
D = T . Qn
D = T . Qn
D = T
D = TAQn
227. Logic X-OR operation of (4ACO) H& (B53F) H results
AACB
FFFF
0000
ABCD
228. An n-bit microprocessor has
n-bit program counter
n-bit ALU
n-bit address register
n-bit instruction register
229. Cache memory works on the principle of:
Locality of data
Locality of reference
Locality of memory
Locality of reference and memory
230. The main memory in a Personal Computer (PC) is made of:
Cache memory
Dynamic RAM
Static RAM
Both 2 and 3
231. The circuit converting binary data into decimal is
Encoder
Decoder
Multiplexer
Code converter
232. PSW is saved in stack when there is a
Interrupt recognized
Execution of CALL instruction
Execution of RST instruction
All of these
233. A combinational logic circuit which sends data coming from a single source to two or more separate destinations is:
Decoder
Multiplexer
Encoder
Demultiplexer
234. In which addressing mode the operand is given explicitly in the instruction:
Absolute
Indirect
Immediate
Direct
235. The gray code equivalent of (1011)₂ is
1101
1110
1010
1111
236. A system program that translates and executes an instruction simultaneously is:
Compiler
Assembler
Interpreter
Operating system
237. When necessary, the results are transferred from the CPU to main memory by
I/O devices
Shift registers
CPU
None of the above
238. A successive A/D converter is:
A medium speed converter
A low speed converter
A high-speed converter
None of these
239. The memory unit that communicates directly with the CPU is called the
Main memory
Shared memory
Secondary memory
Auxiliary memory
240. The average time required to reach a storage location in memory and obtains its content is called:
Latency time
Turnaround time
Access time
Response time
241. A k-bit field can specify:
3(^k) register
K(^2) register
2(^k) register
K(^3) register
242. The time interval between the adjacent bits is called:
Word-time
Turnaround time
Bit-time
Slice time
243. A group of bits that tell the computer to perform a specific operation is known as:
Instruction code
Accumulator
Micro–operation
Register
244. The load instruction is mostly used to designate a transfer from memory to a processor register known as:
Accumulator
Program counter
Instruction register
Memory address register
245. The communication between the components in a microcomputer takes place via:
I/O bus
Address bus
Data bus
Control lines
246. An instruction pipeline can be implemented by means of:
LIFO buffer
Stack
FIFO buffer
None of above
247. Data input command is a just the opposite of a:
Test command
Data output
Control command
Data channel
248. The operation executed on data stored in registers is called:
Macro–operation
Bit-operation
Micro–operation
Byte-operation
249. MRI indicates:
Memory Reference Information
Memory Register Instruction
Memory Reference Instruction
Memory Register Information
250. Self-contained sequence of instructions that performs a given computational task is:
Function
Subroutine
Procedure
Routine
251. What is the purpose of an instruction register (IR) in a computer system?
To hold the address of the next instruction to be executed.
To hold the current instruction being executed.
To hold the data being processed by the ALU.
To hold the results of ALU operations.
252. What is a control unit in a computer system responsible for?
Performing arithmetic and logical operations.
Storing and retrieving data.
Coordinating the activities of other computer components.
Processing data into useful information.
253. What type of computer organization uses a Harvard architecture?
Von Neumann.
Harvard.
Princeton.
RISC.
254. What is the purpose of a cache in a computer system?
To store frequently used data for quick access.
To store data that is no longer needed.
To store the results of arithmetic operations.
To store the instructions being executed.
255. What is an embedded system?
A computer system designed for use in automobiles.
A computer system designed for use in space missions.
A computer system integrated into a device to perform specific tasks.
A computer system designed for use in scientific experiments.
256. What is the purpose of a microcontroller in an embedded system?
To control the flow of data in the system.
To perform arithmetic and logical operations.
To coordinate the activities of other embedded system components.
To process data into useful information.
257. What is the difference between an embedded system and a general-purpose computer?
An embedded system is designed for a specific task, while a general-purpose computer is not.
A general-purpose computer has a larger memory than an embedded system.
An embedded system has a faster processing speed than a general-purpose computer.
A general-purpose computer has more input/output devices than an embedded system.
258. What is the purpose of an interrupt in a computer system?
To stop the current instruction from being executed.
To start the execution of a new instruction.
To store the results of arithmetic operations.
To store the instructions being executed.
259. What is the difference between a hard real-time system and a soft real-time system?
A hard real-time system has more stringent timing requirements than a soft real-time system.
A soft real-time system has more stringent timing requirements than a hard real-time system.
A hard real-time system is used in embedded systems, while a soft real-time system is not.
A soft real-time system is used in embedded systems, while a hard real-time system is not.
260. What is the purpose of a timer in an embedded system?
To measure the amount of time that has elapsed.
To coordinate the activities of other embedded system components.
To perform arithmetic and logical operations.
To process data into useful information.
261. What is the difference between a microprocessor and a microcontroller?
A microprocessor is used in general-purpose computers, while a microcontroller is used in embedded systems.
A microcontroller is used in general-purpose computers, while a microprocessor is used in embedded systems.
A microprocessor has more processing power than a microcontroller.
A microcontroller has more processing power than a microprocessor.
262. What is the purpose of a watchdog timer in an embedded system?
To monitor the performance of the system and reset it if necessary.
To measure the amount of time that has elapsed.
To coordinate the activities of other embedded system components.
To process data into useful information.
263. What is the purpose of an ADC (analog-to-digital converter) in an embedded system?
To convert analog signals into digital signals for processing by the system.
To convert digital signals into analog signals for output by the system.
To store the results of arithmetic operations.
To store the instructions being executed.
264. What is the purpose of a DMA (direct memory access) controller in a computer system?
To allow direct transfer of data between memory and I/O devices.
To monitor the performance of the system and reset it if necessary.
To convert analog signals into digital signals for processing by the system.
To store the results of arithmetic operations.
265. What is the purpose of a bus in a computer system?
To provide a communication path between the different components of the system.
To store the results of arithmetic operations.
To store the instructions being executed.
To monitor the performance of the system and reset it if necessary.
266. What is the difference between a serial bus and a parallel bus?
A serial bus transfers data one bit at a time, while a parallel bus transfers multiple bits at once.
A parallel bus transfers data one bit at a time, while a serial bus transfers multiple bits at once.
A serial bus is faster than a parallel bus.
A parallel bus is faster than a serial bus.
267. What is the purpose of a multiplexer (MUX) in a computer system?
To select one of multiple input signals for output.
To monitor the performance of the system and reset it if necessary.
To store the results of arithmetic operations.
To store the instructions being executed.
268. What is the purpose of a demultiplexer (DEMUX) in a computer system?
To distribute a single input signal to multiple outputs.
To monitor the performance of the system and reset it if necessary.
To store the results of arithmetic operations.
To store the instructions being executed.
269. What is the purpose of a decoder in a computer system?
To translate binary code into a form that can be executed by the system.
To monitor the performance of the system and reset it if necessary.
To store the results of arithmetic operations.
To store the instructions being executed.
270. What is the purpose of a ROM (read-only memory) in a computer system?
To store data that cannot be changed.
To store data that can be changed.
To store the results of arithmetic operations.
To store the instructions being executed.
271. What is the function of an Arithmetic and Logic Unit (ALU)?
To perform arithmetic and logical operations on data.
To store data.
To process data into useful information.
To coordinate the activities of other computer components.
272. What is an instruction format in a computer system?
The format in which instructions are stored in memory.
The format in which data is stored in memory.
The format in which results of arithmetic operations are stored in memory.
The format in which addresses are stored in memory.
273. What is an addressing mode in a computer system?
The way in which memory addresses are generated to access data.
The way in which data is stored in memory.
The way in which results of arithmetic operations are stored in memory.
The way in which instructions are stored in memory.
274. What is the purpose of a data transfer instruction in a computer system?
To transfer data from one location to another.
To perform arithmetic and logical operations on data.
To process data into useful information.
To coordinate the activities of other computer components.
275. What is the purpose of a data manipulation instruction in a computer system?
To manipulate data in memory.
To transfer data from one location to another.
To perform arithmetic and logical operations on data.
To process data into useful information.
276. What is the difference between a load instruction and a store instruction in a computer system?
A load instruction transfers data from memory to a register, while a store instruction transfers data from a register to memory.
A store instruction transfers data from memory to a register, while a load instruction transfers data from a register to memory.
A load instruction performs arithmetic operations on data, while a store instruction does not.
A store instruction performs arithmetic operations on data, while a load instruction does not.
277. What is an immediate addressing mode?
The mode in which an immediate value is used as an operand.
The mode in which a memory address is used as an operand.
The mode in which a register is used as an operand.
The mode in which a constant value is used as an operand.
278. What is a register indirect addressing mode?
The mode in which an immediate value is used as an operand.
The mode in which a memory address is used as an operand.
The mode in which a register is used to hold the memory address of the operand.
The mode in which a constant value is used as an operand.
279. What is a base relative addressing mode?
The mode in which a register is used as a base address and an offset is added to access the operand.
The mode in which a memory address is used as a base address and an immediate value is added to access the operand.
The mode in which a register is used as a base address and another register is used as an offset to access the operand.
The mode in which an immediate value is used as a base address and another register is used as an offset to access the operand.
280. What is an indexed addressing mode?
The mode in which a register is used as an index to access the operand in memory.
The mode in which a memory address is used as an index to access the operand in memory.
The mode in which an immediate value is used as an index to access the operand in memory.
The mode in which a constant value is used as an index to access the operand in memory.
281. What is a stack addressing mode?
The mode in which data is stored and retrieved from a stack in memory.
The mode in which data is stored and retrieved from a queue in memory.
The mode in which data is stored and retrieved from a linked list in memory.
The mode in which data is stored and retrieved from a tree in memory.
282. What is the purpose of a rotate instruction in a computer system?
To rotate the bits of a data value to the left or right.
To perform arithmetic and logical operations on data.
To transfer data from one location to another.
To process data into useful information.
283. What is the purpose of a shift instruction in a computer system?
To shift the bits of a data value to the left or right.
To perform arithmetic and logical operations on data.
To transfer data from one location to another.
To process data into useful information.
284. What is the purpose of a compare instruction in a computer system?
To compare two values and set flags accordingly.
To perform arithmetic and logical operations on data.
To transfer data from one location to another.
To process data into useful information.
285. What is the purpose of a branch instruction in a computer system?
To change the flow of execution to a different instruction.
To perform arithmetic and logical operations on data.
To transfer data from one location to another.
To process data into useful information.
286. What is the purpose of a jump instruction in a computer system?
To change the flow of execution to a different instruction.
To perform arithmetic and logical operations on data.
To transfer data from one location to another.
To process data into useful information.
287. What is the purpose of a call instruction in a computer system?
To call a subroutine and save the return address.
To perform arithmetic and logical operations on data.
To transfer data from one location to another.
To process data into useful information.
288. What is the purpose of a return instruction in a computer system?
To return from a subroutine to the instruction after the call.
To perform arithmetic and logical operations on data.
To transfer data from one location to another.
To process data into useful information.
289. What is the purpose of a load effective address (LEA) instruction in a computer system?
To compute the effective address of an operand and store it in a register.
To perform arithmetic and logical operations on data.
To transfer data from one location to another.
To process data into useful information.
290. What is the purpose of a clear instruction in a computer system?
To clear the contents of a register or memory location.
To perform arithmetic and logical operations on data.
To transfer data from one location to another.
To process data into useful information.
291. What is the purpose of a memory hierarchy?
To ensure that data is stored in a single location for easy retrieval.
To provide a range of storage options to balance speed and cost.
To limit the amount of data that can be stored at any one time.
To prevent unauthorized access to data.
292. Which of the following is an example of internal memory?
Hard disk.
CD-ROM.
RAM.
USB flash drive.
293. Which of the following is an example of external memory?
Cache memory.
Magnetic tape.
Registers.
Virtual memory.
294. What is the purpose of cache memory?
To provide additional storage for the operating system.
To store frequently accessed data for faster access.
To protect data from unauthorized access.
To provide backup storage in case of a system failure.
295. Which of the following is true about cache memory?
It is larger in size than RAM.
It is slower than main memory.
It is located closer to the CPU than main memory.
It has a longer access time than main memory.
296. Which type of cache memory is integrated into the CPU?
Level 1 (L1) cache.
Level 2 (L2) cache.
Level 3 (L3) cache.
Virtual cache.
297. Which type of cache memory is the largest in size?
Level 1 (L1) cache.
Level 2 (L2) cache.
Level 3 (L3) cache.
Virtual cache.
298. Which type of memory is used to provide a bridge between main memory and secondary storage devices?
Virtual memory.
Cache memory.
Flash memory.
Magnetic memory.
299. Which of the following is an advantage of using virtual memory?
It reduces the amount of main memory required.
It improves the access time of data.
It allows multiple programs to run simultaneously.
It provides faster data transfer rates.
261. Content of the program counter is added to the address part of the instruction in order to obtain the effective address is called:
Relative address mode
Register mode
Index addressing mode
Implied mode
262. An interface that provides I/O transfer of data directly to and from the memory unit and peripheral is termed as:
DDA
BR
Serial interface
DMA
263. The 2's complement form (Use 6-bit word) of the number is:
111100
110111
110110
1011
264. A register capable of shifting its binary information either to the right or the left is called a:
Parallel register
Shift register
Serial register
Storage register
265. What is the content of stack pointer (SP)?
Address of current instruction
Address of the next instruction
Address of the top element of the stack
Size of the stack
266. Which of the following interrupt is non-maskable?
INTR
RST 6.5
RST 7.5
TRAP
267. Which of the following is a main memory?
Secondary memory
Cache memory
Auxiliary memory
Virtual memory
268. Which of the following are not a machine instruction?
MOV
END
ORG
Both B and C
269. In Assembly language programming, minimum number of operands required for an instruction is/are:
Zero
Two
One
Both B and C
270. The maximum addressing capacity of a microprocessor which uses 16-bit database & 32-bit address base is:
64 K
Both A and B
4 GB
None of the above
271. A combinational logic circuit which sends data coming from a single source to two or more separate destinations is:
Decoder
Multiplexer
Encoder
Demultiplexer
272. A Program Counter contains a number 825 and address part of the instruction contains the number 24. The effective address in the relative address mode, when an instruction is read from the memory is:
849
801
850
802
273. A system program that translates and executes an instruction simultaneously is:
Compiler
Assembler
Interpreter
Operating system
274. The cache memory of 1K words uses direct mapping with a block size of 4 words. How many blocks can the cache accommodate?
256 words
1024 words
512 words
128 words
275. Logic gates with a set of input and outputs is arrangement of:
Combinational circuits
Design circuits
Logic circuit
Register
276. The BSA instruction is:
Branch and store accumulator
Branch and shift address
Branch and save return address
Branch and show accumulator
277. A floating-point number that has an O in the MSB of mantissa is said to have:
Overflow
Important number
Underflow
Undefined
278. Aging registers are:
Counters which indicate how long ago their associated pages have been referenced
Registers which keep track of when the program was last accessed
Counters to keep track of last accessed instruction
Counters to keep track of the latest data structure referred
279. The instruction “ORG O” is a:
Machine instruction
High level instruction
Pseudo instruction
Memory instruction
280. Translation from symbolic program into binary is done in:
Two passes
Three passes
Directly
Four passes
281. To put the microprocessor in the wait state:
Lower the HOLD input
Raise the HOLD input
Lower the READY input
Raise the READY input
282. A basic instruction that can be interpreted by a computer generally has:
An operand and an address
Sequential register and decoder
A decoder and an accumulator
An address and decoder
283. In a microprocessor system with memory mapped I/O:
Devices have 8-bit addresses
Devices are accessed using IN and OUT instructions
There can be a maximum of 256 input devices
Arithmetic and logic operations can be directly performed with the I/O data
284. Which of the following information holds the information before going to the decoder?
Control register
Accumulator
Data register
Address register
285. The device which is used to connect a peripheral to bus is called:
Control register
Communication
Interface
None of these
286. Which of the following is the set of general-purpose internal registers?
Stack
Address register
Scratch pad
Status register
287. The register used as a working area in CPU is:
Program counter
Instruction decoder
Instruction register
Accumulator
288. Which of the following is used as storage location both in the ALU and the control section of a computer?
Accumulator
Adder
Register
Decoder
289. The register which holds the address of the location to or from which data are to be transferred is called:
Index register
Memory address register
Instruction register
Memory data register
290. The register which contains the data to be written into or read out of the address location is called:
Memory address register
Program counter
Memory data register
Index register
291. Which of the following register is used in the control unit of the CPU to indicate the next instruction which is to be executed?
Accumulator
Instruction decoder
Index register
Program counter
292. An interrupt can be temporarily ignored by counter is called:
Vectored interrupt
Maskable interrupt
Non-maskable interrupt
Low priority interrupt
293. The ability to temporarily halt the CPU and used this time to send information on buses is called:
Direct memory access
Polling
Vectoring the interrupt
Cycle stealing
294. Number of machine cycle required for RET instruction in 8085 micro-processors is:
One
Three
Two
Five
295. In a microprocessor system, the RST instruction will cause an interrupt:
Only if an interrupt service routine is not being executed
Only if a bit in the interrupt mask is made zero
Only if interrupt have been enabled by an EI instruction
None of the above
296. An instruction used to set the carry flag in a computer can be classified as:
Data transfer group
Logical
Process control
Program control
297. Microprocessor 8085 is the enhanced version of ______ with essentially the same construction set.
6800
8080
68000
8000
298. In a generic microprocessor instruction cycle time is:
Shorter than machine cycle time
Larger than machine cycle time
Exactly double the machine cycle time
Exactly same as the machine cycle time
299. If we use 3 bits in the instruction word to indicate if an index register is to be used and if necessary, which one is to be used, and then the number of index register to be used in the machine will be:
Three
Seven
Six
Eight
300. In a multi-processor configuration, two processor are connected to the host 8086 processor. The two-co-processor instruction set:
Must be the same
Must be disjoint
May overlap
Must be the same as that of the host
301. A certain processor supports only the immediate and the direct addressing modes. Which of the following programming language features cannot be implemented on this pointer?
Pointers
Records
Arrays
All of the above
302. The 8085 microprocessor responds to the presence of an interrupt:
As soon as the TRAP pin becomes high
By checking the TRAP pin for high status at the end of each instruction fetch
By checking the TRAP pin for high status at the end of the execution of each instruction
By checking the TRAP pin for high status at regular intervals
303. Which of the following need not necessarily be saved on a context switch between processes?
General purpose registers
Program counter
Translation look aside buffer
All of these
304. If a processor does not have any stack pointer register then:
It cannot have subroutine call instruction
It can have subroutine call instruction, but no nested subroutine calls
Nested subroutine calls are possible, but interrupts are not
All sequence of subroutine calls and also interrupts are possible
305. CPU has two modes-privileged and non-privileged. In order to change the mode from privileged to non-privileged:
A hardware interrupt is needed
A software interrupt is needed
A privileged instruction (which does not generate an interrupt) is needed
A non-privileged instruction (which does not generate an interrupt) is needed
306. In the absolute addressing mode:
An operand is inside the instruction
Address of the operand is inside the instruction
Register containing the address of the operand is specified inside the instruction
Location of the operand is implicit
307. The capacity of program counter (PC) is:
8 bits
16 bits
12 bits
32 bits
308. The function of program counter (PC) holds:
Temporary
Memory operand
Address for memory
Address for instruction
309. The Program Counter (PC):
Is a register
During execution of the current instruction, its content changes
Both (A) and (B)
None of the above
310. The TRAP interrupt mechanism of the 8085 microprocessor executes:
An RST by hardware
The instructions supplied by external device through the INTA signal
An instruction from memory location 20H
None of the above
311. Pseudo-instructions are:
Assembler directives
Instructions in any program that have no corresponding machine code instruction
Instruction in any program whose presence or absence will not change the output for any input
None of the above
312. “The number of instructions needed to add ‘n’ numbers and store the result in memory using only one address instructions is:
n
n-1
n+1
Independent of n
313. The addressing mode used in the instruction PUSH B is:
Direct
Register indirect
Register
Immediate
314. The process of fetching and executing instructions one at a time, in order to increasing an address is called:
Instruction execution
Instruction fetch
Straight line sequencing
Random sequencing
315. The CPU of a computer takes instruction from the memory and executes them. This process is called:
Load cycle
Fetch-execute cycle
Time sequence
Clock cycle
316. In a microprocessor, WAIT states are used to:
Make the processor wait during a DMA operation
Make the processor wait during a power interrupt processing
Make the processor wait during a power shutdown
Interface slow peripheral to the processor
317. When a program is being executed in an 8085 microprocessor, its program counter contains:
Number of instructions in the current program that have already been executed
The total number of instructions in the program being executed
Memory address of the instructions that is being currently executed
Memory address of the instructions that is to be executed next
318. When the HLT instructions of an 8085 microprocessor is executed, the microprocessor:
Is disconnected from the system bus till the reset is pressed
Halts execution of the program and returns to monitor
Enters into a halt-state and the buses are tri-stated
Reloads the program from the location 0024 and 0025
319. Serial input data of 8085 can be loaded into bit 7 of the accumulator by:
Executing a RIM instruction
Using TRAP
Executing RST 1
None of the above
320. Which of the following interrupts are unmaskable interrupts?
RST 5.5
TRAP
RST 7.5
INTR 1
321. The memory address ranges to which RAM will respond:
0000 H to 1 FFF H
4000 H to 5 FFF H
0000 H to 5 FFF H
3000 H to FFFF H
322. The address range to which I/O chip will respond is:
0000 H to FFFF H
4000H to 5FFF H
0000H to 5FFFH
3000 H to FFFF H
323. Both the arithmetic logic unit (ALU) and control section of CPU employ special purpose storage location called:
Decoder
Multiplexer
Buffers
Registers
324. A basic instruction that can be interpreted by a computer generally has:
An operand and an address
Sequence register and decoder
A decoder and an accumulator
An address and decoder
325. The differences between PLA and ROM is:
PLA is combination ROM is sequential
PLA economizes on the number of minterms
PLA has fixed AND array, ROM has fixed OR array
None of these
326. The control unit of computer:
Performs ALU operations on the data
Controls the operation of the output devices
Is a device for manually operating the computer
Directs the other unit of computers
327. The ALU of a computer normally contains a number of high-speed storage elements called:
Semiconductor memory
Hard disk
Registers
Magnetic disks
328. The unit of a computer system which executes program, communication with and often controls the operation of other subsystems of the computer is the:
CPU
I/O unit
Control unit
Peripheral unit
329. The ability of a medium size computer system to increase in data processing capability by addition of such devices as mass storage device, I/O device etc. is called:
Computer expandability
Computer enhancement
Computer mobility
Computer upward capability
330. The technique which repeatedly uses the same block of internal storage during different stage of problem is called:
Overlay
Swapping
Overlapping
Reuse
331. The registers used as a working area in CPU is:
Program counter
Instruction decoder
Instruction register
Accumulator
332. Which of the following information holds the information before going to the decoder?
Control register
Accumulator
Data register
Address register
333. Which of the following unit is used to supervise each instruction in the CPU?
Control logic unit
ALU
Accumulator
Control register
334. The bus which is used to transfer data from main memory to peripheral device is:
Data bus
DMA bus
Input bus
Output bus
335. The device which is used to connect a peripheral to bus is called:
Control register
Communication protocol
Interface
None of these
336. The bus connected between the CPU and main memory that permits transfer of information between main memory and the CPU is called:
DMA bus
Address bus
Memory bus
Control bus
337. What is the storage capacity of a Hollerith card which is organized into nibbles?
32
120
64
240
338. How many addresses are required for 25x40 video RAM?
1020
1000
1920
2000
339. Microprogramming is a technique for:
Writing small program effectively
Programming output/input routines
Programming the microprocessor
Programming the control steps of a computer
340. A device that works in conjunction with a computer but not as part of it is called:
Microprocessor
Hardware
Peripheral device
Memory
341. A system of letters, numbers symbols adopted by computer manufacture as an abbreviation form of instruction sets is called
Mesh
Modern
Monitor
Mnemonic
342. When a subroutine is called, then address of the instruction following the CALL instruction is stored in/on the
Stack pointer
Program counter
Accumulator
Stack
343. In 8085 microprocessors, the value of the most significant bit of the result following the execution of any arithmetic or Boolean instruction is stored in the
Carry status flag
Sign status flag
Auxiliary carry status flag
Zero status flag
344. PLA
Produces sum of products as the outputs
Is dedicated for a particular operation
Is general
Both A and B
345. The sequence of events that happen during a typical fetch operation is
PC-MAR-Memory-MDR-IR
PC-Memory-IR
PC-Memory-MDR-IR
PC-MAR-Memory-IR
346. Which of the following is not a form of memory?
Instruction cache
Instruction opcode
Instruction register
Translation lookaside buffer
347. Which memory is difficult to interface with processor?
Static memory
ROM
Dynamic memory
RAM
348. Desirable characteristic(s) of a memory system is(are)
Speed and reliability
Durability and compactness
Low power consumption
All of these
349. The minimum time delay required between initiation of two successive memory operation is called
Memory cycle time
Transmission time
Memory access time
Skip time
350. Which of the following statement is wrong?
RAM is a type of volatile
Magnetic tape is non-volatile
Magnetic core and semiconductor memories are used as mass memory medium
An EPROM can be programmed, erased and reprogrammed by user with an EPROM programming instruction
351. The refreshing rate of dynamic RAMs is approximately once in:
Two microseconds
Fifty milliseconds
Two milliseconds
Two seconds
352. In comparison with static RAM memory, the dynamic RAM memory has:
Lower bit density and higher power consumption
Higher bit density and higher power consumption
Lower bit density and lower power consumption
Higher bit density and lower power consumption
353. Disadvantage of dynamic RAM over static RAM is:
Higher power consumption
Variable speed
Need to refresh the capacitor charge every once in two milliseconds
Higher bit density
354. The access time of magnetic bubble memory is approximately:
30 nanoseconds
30 milliseconds
30 microseconds
0.3 seconds
355. Serial access memories are useful in applications where:
Data consists of numbers
Short access time is required
Each stored word is processed differently
Data naturally needs to flow in and out in serial form
356. What is the main advantage of magnetic core memory over semiconductor RAM memory?
More compact and smaller
More economical
A bit does not have to be written after reading
Non-volatile
357. Fastest types of memory from the following list is:
Tape
Disk
Semiconductor
Bubble memory
358. The use of hardware in Memory management is through segment relocation and protection is:
To perform address translation to reduce size of the memory
To perform address translation to reduce execution time overhead
Both A and B
None of these
359. Memory refreshing may be done:
By the CPU that contains a spec regress counter, only
By an external refresh counter, only
Either by CPU or by an extern refresh counter
None of the above
360. Choose the correct statement from the following:
PROM contains a programmable AND array and a fixed OR array
PLA contains a fixed AND array and a programmable OR array
PROM contains a fixed AND array and a programmable OR array
None of the above
361. Which of the following is not true of primary storage?
It represents the decimal number through string of binary digits
It stores operating system programs
It stores data while they are being processed by CPU
It stores the bulk of data used by computer application
362. A dynamic RAM consists up:
Six transistors
One transistor and one capacitor
Two transistors and two capacitors
Two capacitors only
363. Semiconductor memory is:
Somewhat slower than magnetic core memory
A volatile memory
Somewhat longer than magnetic core memory
All of the above
364. Which of the following is the internal memory of the system (computer)?
CPU registers
Main memory
Cache memory
All of the above
365. A software program stored in a ROM that cannot be changed easily is called:
Hardware
Editor
Linker
Firmware
366. An advantage of memory interfacing is that:
A large memory is obtained
Effective speed of the memory is increased
The cost of the memory is reduced
A non-volatile memory is obtained
367. In a virtual memory system, the address space specified by the address line of the CPU must be ______ than the physical memory size and ______ than the secondary storage size.
Smaller, smaller
Larger, smaller
Smaller, larger
Larger, larger
368. Which of the following is /are advantage of virtual memory?
Faster access to memory on a average
Processes can be given protected address space
Both A and B
Program larger than the physical memory size can be run
369. Which of the following need extra hardware for DRAM refreshing?
8085
Motorola 68000
Both (A) and (B)
None of the above
371. Memory consisting of electronic circuit attached into silicon chip is known as:
Magnetic core memory
Thin film memory
Semiconductor memory
MOS memory
372. Which of the following memory is capable of operating at electronic speed?
Semiconductor memory
Magnetic drums
Magnetic disks
Magnetic tapes
373. The larger the RAM of a computer, the faster is its speed, since it eliminates
Need of ROM
Frequency disk I/O
Need for external memory
Need for a data-wide path
374. What is the average access time for a drum rotating at 4000 revolution per minute?
2.5 milli seconds
7.5 milli seconds
5.0 milli seconds
4.0 milli seconds
375. How many input lines are needed to construct 1024-bit coincident 'core plan?'
10
32
16
64
376. What is the byte capacity of a drum which is 5-inch-high, 10-inch diameter, and which has 60 tracks per inch bit density of 800 bits per inch?
942000 bytes
188400 bytes
471000 bytes
16384 bytes
377. The main advantage of multiple bus organization over single bus is,
Reduction in the number of cycles for execution
Increase in size of the registers
Better Connectivity
None of these
378. Property of locality of reference may fail, if a program has
Many conditional jumps
Many operands
Many unconditional jumps
All of the above
379. How many RAM chips of size (256x1 bit) are required to build 1M byte memory?
8
24
10
32
380. If each address space represents one byte of storage space, how many address lines are needed to access RAM chips arranged in a 4x6 array, where each chip is 8K x 4 bits?
13
16
15
17
381. Four memory chips of 16x4 size have their address bases connected together. The system will be of size
64x64
32x8
16x16
256x1
382. Arrange the following configurations for CPU in decreasing order or operating speeds:
Hard wired control, vertical micro-programming, horizontal micro-programming
Hard wired control, horizontal micro-programming, vertical micro-programming
Horizontal micro-programming, vertical micro-programming, hard wired control
Vertical micro-programming, horizontal micro-programming, hard wired control
383. The main difference (a) between a CISC and a RISC processor is/are that a RISC processor typically
Has fewer instructions and addressing modes
Has more registers
Is easier to implements using hard-wired control logic
All of the above
384. Comparing the time T1 taken for a single instruction on a pipelined CPU with time T2 taken on a non-pipelined but identical CPU, we can say that
T1=T2
T1>T2
T1<T2
T1 is T2 plus time taken for one instruction fetch cycle
385. Performance of a pipelined processor suffers if
The pipeline stages have different delays
Consecutive instructions are dependent on each other
The pipeline stages share hardware resources
All of the above
386. A micro-programmed control unit
Is faster than a hard-wired control unit
Facilitates easy implementation of new instruction
Is useful when very small programs are to be run
Usually refers to the control unit of a microprocessor
387. Which of the following are typical characteristics of a RISC machine?
Highly pipelined
Multiple register sets
Both (A) and (B)
None of these
388. In an 8085-microprocessor system with memory mapped I/O
I/O device have 8-bit addresses
I/O devices are accessed using IN and OUT instruction
There can be a maximum of 256 input devices and 256 output devices
Arithmetic and logic operations can be directly performed with the I/O data
389. How many types of storage loops exist in magnetic bubble memory?
8
3
4
2
390. How many wires are threaded through the cores in a coincident current core memory?
2
4
3
6
391. When we move from the outermost track to the innermost track in a magnetic disk, then density (bits per liner inch)
Increases
Remains the same
Decreases
Either remains constant or decreases
392. The use of hardware in Memory management is through segment relocation and protection is
To perform address translation to reduce size of the memory
To perform address translation to reduce execution time overhead
Both A and B
None of the above
393. The parallel operation is preferred because
Circuitry is simple
It is faster than series operation
It requires less memory
All of the above
394. In comparison to the internal (main) memory, tape or disk memory is
Slower and more expensive
Faster and more expensive
Slower and less expensive
Faster and less expensive
395. The number of records contained within a block of data on magnetic tape is defined by the
Block definition
Blocking factor
Record contain clause
Record per block factor
396. Transfer of information from main storage is typically n times faster than the transfer form auxiliary storage, where n is about
5
100
10
200
397. Which access method is used for obtaining a record form a cassette tape?
Direct
Random
Sequential
Parallel
398. An advantage of blocking a tape is that
The additional processing time is consumed
The direct file method can be emulated
The tapes contains less data and longer tapes
Less tape is used to store the same amount of data
399. The ISA standard Buses are used to connect,
RAM and processor
Hard disk and Processor
GPU and processor
CD/DVD drives and Processor
400. Which of the following is not true of primary storage?
It represents the decimal number through string of binary digits.
It stores operating system programs
It stores data while they are being processed by CPU.
It stores the bulk of data used by computer application
401. In modern computers bipolar semiconductor chips are often used in the arithmetic logic unit. What material is used for the slower and less expensive primary storage section?
Gallium arsenide (GaAs)
Silicon
Metal oxide semiconductor
Gallium arsenide chips
402. Which type of memory chips are likely to be used in the primary storage of the future generation of computers?
Selenium chips
Bio chips
Optical chips
Gallium arsenide chips
403. How many bits can be stored in the 8K capital?
8000
4000
8192
4096
404. If a computer has a 1024 K memory, then what does the letter K stands for?
Kilometer
1024
Thousand
Core
405. What was the amount of memory required by the earliest operating system called dos 1.0?
4K
16K
8K
32K
406. The storage device which is used to compensate for the difference in rates of flow of data from one device to another is called
Cache
Buffer
Concentrator
I/O device
407. As a secondary storage medium, what is the most important advantage of a video disk?
Laser disk
Durability
Potential capacity
Cost effectiveness
408. What is the size of optical compact disk which is used for recording high quality music?
4.7-inch
5½ inch
3½ inch
8 inch
409. Which part of the diskette never be touched?
Hub
Oval slot
Hole in the center
Corner
410. Memory is
A device that performs a sequence of operations specified by instruction in memory
The device where information in stored
A sequence of instruction
Typically characterized by interactive processing and time-slicing of the CPU's time to allow quick response to each user
411. Virtual memory
Is a method of memory allocation by which the program is subdivided into equal portions, 8 pages and core is subdivided into equal portions
Consists of those addresses that may be generated by a processor during execution of a computation
Is a method of allocating processor time
Allows multiple programs to reside in separate areas of core at a time
412. AROM is used to store the table for multiplication of two 8 -bit unsigned integers. The size of ROM required is
256K x 6
4K x 16
64K x 8
64K x 16
413. The controller uses ______ to help with the transfers when handling network interfaces.
Input Buffer Storage
Bridge circuits
Signal enhancers
All of the above
414. To overcome the conflict over the possession of the BUS we use ______.
Optimizers
Multiple BUS structure
BUS arbitrators
None of the above
415. The seek time of a disk is 30 ms. It rotates at the rate of 30 rotations/second. The capacity of each track is 300 words. The access time is (approximately)
62 ms
50 ms
60 ms
47 ms
416. How many RAM chips of size (256K x 1 bit) are required to build 1 M byte memory?
8
24
10
32
417. If each address space represents one byte of storage space, how many address lines are needed to access RAM chips arranged in a 4 x 6 array, where each chip is 8K x 4 bits?
13
16
15
17
418. In a memory system, four 256 x 8 PROM chips are used to make total memory of size 1024 x 4. What is the number of address bus lines?
4
10
8
16
419. Consider a high speed 40 ns memory cache with a successful hit ratio of 80%. The regular memory has an access time of 100 ns. What is the average effective time for CPU to access memory?
52 ns
70 ns
60 ns
80 ns
420. What is the hit ratio of a cache if a system performs memory access at 30 nano seconds with the cache and 150 nano seconds without it? Assume that the each uses 20 nano sec memory, choose the closest approximate
81%
92%
75%
87%
421. Consider a disk with the following characteristics
Track size: 10,000 bytes
Rotational latency: 10 ms / revaluation
Block size: 1,000 bytes
What is the maximum transfer rate per track measured in bits per second as is conventional for this disk unit?
400 Mbps
6,400 Mbps
8 Mbps
4,250 Mbps
422. Increasing the RAM of a computer typically improves the performance because:
Virtual memory increases
Larger RAMs are faster
Fewer page faults occurs
Fewer segmentation faults occur
423. Which of the following requires a device driver?
Register
Cache
Main memory
Disk
424. Which one of the following statements is false?
Virtual memory implements the translation of a programs address space into physical memory address
Virtual memory allows each program to exceed the size of the primary memory
Virtual memory increases the degree of multiprogramming
Virtual memory reduces the context switching overhead
425. The advantage of CMOS technology over a MOS is
Lower power dissipation
Greater speed
Smaller chip size
All of the above
426. The advantage of synchronous circuits over asynchronous one is...
Faster operation
Better noise immunity
Both A and B
Lower hardware equipment
427. Which of the following is not a form of memory?
Instruction cache
Instruction register
Instruction code
Translation lookaside buffer
428. In 2's complement, addition overflow
Is tagged whenever there is a carry for sign bit addition
Cannot occur when a positive value is added to a negative value
Is flagged when the carries from sign bit and previous bit match
None of the above
429. The performance of the pipelined processor suffers if...
The pipeline stage has different delay
Consecutive instructions depend on each other
The pipeline sages share hardware resources
All of the above
430. In absolute addressing mode...
The operand is inside the instruction
The address of the operand is inside the instruction
The register containing the address of the operand is specified in the instruction
Location of the operand is implicit
431. A processor needs software interrupt to
Test the interrupt system of the processor
Implement co routines
Obtain system services which need execution of privileged instructions
Return from subroutine
432. Horizontal microprogramming...
Does not require use of signal decoders
Results in larger sized micro-instructions than vertical micro-programming
Use one bit for each control signal
All of the above
433. The main difference (s) between a CISC and RISC processor is/are that a RISC processor typically has
A fewer instruction
A fewer addressing mode
A more register, an ease to implement using hardwired control logic
All of the above
434. The exponent of a floating-point number is represented in excess -N code so that
The dynamic range is large
The precision is high
The smallest number is represented by all zeros
Overflow is avoided
435. If negative numbers are stored in 2's complement form, the range of numbers that can be stored in 8 bits is......
-128 to +128
-128 to +127
-127 to +128
-127 to +127
436. On receiving an interrupt from an I/O device, the CPU
Halts for a pre-determined time
Hands over control of address bus and data bus to the interrupting device
Branches off to the interrupt service routine immediately
Branches off to the interrupt service routine after completion of the current instruction
437. In serial communication, an extra clock is needed
To synchronize the devices
For programmed baud rate control
To make efficient use of RS-232
None of the above
438. Which of the following rules regarding the addition of 2 given numbers is correct, if negative numbers are represented in 2's complement form?
Add sign bit and discard carry, if any.
Add sign bit and add carry, if any.
Don't add sign bit and discard carry, if any.
Don't add sign bit and add carry, if any.
439. The difference between 80486 and 80386 is/are...
Presence of floating-point co-processor
Speed of operation
Presence of 8 K cache on chip, presence of memory controller
All of the above
440. In virtual memory system, the addresses used by the programmer belongs to
Memory space
Physical addresses
Address space
Main memory address
441. The method for updating the main memory as soon as word is removed from the cache is called
Write-through
Write-back
Protected-write
Cache write
442. Which is true for a typical RISC architecture?
Micro programmed control unit
Instruction takes multiple cycles
Have fewer register in CPU
Emphasis on optimizing instruction pipelines.
443. After reset, CPU begins execution of instruction from memory address
0101H
8000H
0000H
FFFFH
444. In 8085 microprocessors how many I/O devices can be interfaced in I/O mapped I/O technique?
Either 256 input devices or 256 output devices.
256 I/O devices.
256 input devices & 256 output devices.
512 input-output devices.
445. DMA interface unit eliminates the need to use CPU registers to transfer data from
MAR to MBR
I/O units to memory
MBR to MAR
Memory to I/O units
446. How many 128 x 8 RAM chips are needed to provide a memory capacity of 2048 bytes?
8
16
24
32
447. What is the bit storage capacity of a ROM with a 512 x 4-organization?
2049
2048
2047
2046
448. How many different addresses are required by the memories that contain 16K words?
16,380
16,382
16,384
16,386
449. The content of a 4-bit register is initially 1101. The register is shifted 2 times to the right with the serial input being 1011101. What is the content of the register after each shift?
1110,0111
0001,1000
1101,1011
1001,1001
450. ABCD - seven segment decoder / driver in connected to an LED display. Which segments are illuminated for the input code DCBA = 0001?
b,c
c,b
a,b,c
a,b,c,d
451. Address symbol table is generated by
Memory management software
Assembler
Match logic of associative memory
Generated by operating system
452. When an instruction is read from the memory, it is called
Memory read cycle
Fetch cycle
Instruction cycle
Memory write cycle
453. Which activity does not take place during execution cycle?
ALU performs the arithmetic and logical operation
Effective address is calculated
Next instruction is fetched
Branch address is calculated and branching conditions are checked
454. The time for which the D-input of a D-FF must not change after the clock is applied is known as
Hold time
Set-up time
Transition time
Delay time
455. How many memory chips of (128 x 8) are needed to provide a memory capacity of 4096 x 16?
64
16
32
128
456. In addition of two signed numbers, represented in 2's complement form generates an overflow if
A. B = 0
A = 0
A. B = 1
A + B = 1
457. In DMA the data transfer is controlled by...
Microprocessor
RAM
Memory
I/O devices
458. Synchronous means...
At irregular intervals
At same time
At variable time
None of the above
459. Excess-3 equivalent representation of (1234) H is
(1237) Ex-3
(4567) Ex-3
(7993) Ex-3
(4663) Ex-3
460. Which of the memory holds the information when the Power Supply is switched off?
Static RAM
Dynamic RAM
EEROM
None of the above
461. Minimum no. of NAND gate required implementing an Ex-OR function is
2
3
4
5
462. Which of the following expression is not equivalent to x?
x NAND x
x NOR x
x NAND 1
x NOR 1
463. BCD equivalent of Two's complement is
Nine's complement
One's complement+1
Ten's complement
None of the above
464. Associative memory is sometimes called as...
Virtual memory
Cache memory
Main memory
Content addressable memory
465. When CPU is not fully loaded, which of the following method of data transfer is preferred?
DMA
Interrupt
Polling
None of the above
466. 8085 microprocessor carryout the subtraction by
BCD subtraction method
Hexadecimal subtraction method
2's complement method
Floating Point subtraction method
467. PAL circuit consists of
Fixed OR & programmable AND logic
Programmable OR & Fixed AND Logic
Fixed OR & fixed AND logic
Programmable OR & programmable AND logic
468. CPU checks for an interrupt signal during
Starting of last Machine cycle
First T-State of interrupt cycle
Last T-State of instruction cycle
Fetch cycle
469. Which of the following is not a characteristic of RISC architecture......?
Larger instruction set
Simple addressing mode
One instruction per cycle
Register to register operation
470. Memory interleaving technique is used to address the memory modules in order to have
Higher average utilization
Faster access to a block of data
Reduced complexity in mapping hardware
Both (A) and (B)
471. In a multiprogramming system, which of the following is used?
Data parallelism
L1 cache
Paging concept
None of the above
472. Cycle stealing technique is used in
Interrupt based data transfer
DMA based data transfer
Polled mode data transfer
None of the above
473. During DMA acknowledge cycle, CPU relinquishes
Address bus only
Control bus and data bus
Address bus and control bus
Data bus and address bus
474. If the stack pointer is initialized with (4FEB) H, then after execution of Push operation in 8085 microprocessors, the Stack Pointer shall be
4FEA
4FEC
4FED
4FE9
475. A more efficient way to organize a Page Table is by means of an associative memory having
Number of words equal to number of pages
Number of words more than the number of pages
Number of words less than the number of pages
Any one of the above
476. If there are four ROM ICs of 8K and two RAM ICs of 4K words, then the address range of 1st RAM is (Assume initial addresses correspond to ROMs)
(8000) H to (9FFF) H
(8000) H to (8FFF) H
(6000) H to (7FFF) H
(9000) H to (9FFF) H
477. A.B.C is equal to A B C for
A=0, B=1, C=0
A=1, B=0, C=1
A=1, B=1, C=1
All of the above
478. Gray code equivalent of (1000)2 is
1111
1100
1000
None of the above
479. The memory blocks are mapped on to the cache with the help of......
Hash functions
Vectors
Mapping functions
None of the above
480. During a write operation if the required block is not present in the cache then...... occurs
Write latency
Write hit
Write delay
Write miss
481. In...... protocol the information is directly written into main....
Write through
Write back
Write first
None of the above
482. The method of mapping the consecutive memory blocks to consecutive cache blocks is called....
Set associative
Associative
Direct
Indirect
483. While using the direct mapping technique, in a 16-bit system the higher order 5 bits is used for....
Tag
Block
Word
Id
484. The technique of searching for a block by going through all tags is......
Linear search
Binary search
Associative search
None of the above
485. In case of Zero-address instruction method the operands are stored in....
Register
Accumulators
Push down stack
Cache
486. The addressing mode which makes use of in-direction pointer is......
Indirect addressing mode
Index addressing mode
Relative addressing mode
Offset addressing mode
487. The addressing mode, where you directly specify the operand value is
Immediate
Direct
Definite
Relative
488. ...addressing mode is most suitable to change the normal sequence of execution of instructions.
Relative
Indirect
Index with offset
Immediate
489. The pipelining process is also called as....
Superscalar operation
Assembly line operation
Von Neumann cycle
None of the mentioned
490. The fetch and execution cycles are interleaved with the help of......
Modification in processor architecture
Clock
Special unit
Control unit
491. The situation where in the data of operands are not available is called...
Data hazard
Stock
Deadlock
Structural hazard
492. The reason for the implementation of the cache memory is
To increase the internal memory of the system
The difference in speeds of operation of the processor and memory
To reduce the memory access and cycle time
All of the above
493. The effectiveness of the cache memory is based on the property of ______.
Locality of reference
Memory localization
Memory size
None of the above
494. The temporal aspect of the locality of reference means
That the recently executed instruction won't be executed soon
That the recently executed instruction is temporarily not referenced
That the recently executed instruction will be executed soon again
None of the above
495. The spatial aspect of the locality of reference means
That the recently executed instruction is executed again next
That the recently executed won't be executed again
That the instruction executed will be executed at a later time
That the instruction in close proximity of the instruction executed will be executed in future
496. The algorithm to remove and place new contents into the cache is called ______.
Renewal algorithm
Updating
Replacement algorithm
None of the above
497. The key factor/s in commercial success of a computer is/are......
Performance
Cost
Speed
Both A and B
498. The main objective of the computer system is
To provide optimal power operation
To provide best performance at low cost
To provide speedy operation at low power consumption
All of the above
499. A common measure of performance is:
Price/performance ratio
Performance /price ratio
Operation/price ratio
None of the above
500. The main purpose of having memory hierarchy is to
Reduce access time
Provide large capacity
Reduce propagation time
Both A and B
501. Who developed the basic architecture of computer?
Blaise Pascal
Charles Babbage
John Von Neumann
None of the above
502. Which of the following allows simultaneous write and read operations?
ROM
FROM
RAM
None of the above
503. Which of the following is not considered as a peripheral device?
CPU
Keyboard
Monitor
All of the above
504. Which of the following computer memory is fastest?
Register
Hard disk
RAM
None of the above
505. Which of the following operations is/are performed by the ALU?
Data manipulation
Exponential
Square root
All of the above
506. Which of the following format is used to store data?
Decimal
Octal
BCD
Hexadecimal
507. Which of the following memory of the computer is used to speed up the computer processing?
Cache memory
RAM
ROM
None of the above
508. Computer address, bus is -
Multidirectional
Bidirectional
Unidirectional
None of the above
509. Which of the following circuit is used to store one bit of data?
Flip Flop
Decoder
Encoder
Register
510. Which of the following is a way in which the components of a computer are connected to each other?
Computer parts
Computer architecture
Computer hardware
None of the above
511. Which of the following circuit convert the binary data into a decimal?
Decoder
Encoder
Code converter
Multiplexer
512. The address in the main memory is known as -
Logical address
Physical address
Memory address
None of the above
513. Subtraction in computers is carried out by -
1's complement
2's complement
3's complement
9's complement
514. Which of the following computer bus connects the CPU to a memory on the system board?
Expansion bus
Width bus
System bus
None of the above
515. Which of the following memory unit communicates directly with the CPU?
Auxiliary memory
Main memory
Secondary memory
None of the above
516. The collection of 8-bits is called as -
Byte
Nibble
Word
Record
517. Which of the following register can interact with the secondary storage?
PC
MAR
MDR
IR
518. In which of the following form the computer stores its data in memory?
Hexadecimal form
Octal form
Binary form
Decimal form
519. Which of the following is a combinational logic circuit which sends data from a single source to two or more separate destinations?
Multiplexer
Demultiplexer
Encoder
Decoder
520. Which of the following is a group of bits that tells the computer to perform a particular operation?
Accumulator
Register
Instruction code
None of the above
521. Where is the document temporarily stored during working on a document on PC?
ROM
CPU
RAM
Flash memory
522. Where is the decoded instruction stored?
Registers
MDR
PC
IR
523. What does MIMD stand for?
Multiple Instruction Memory Data
Multiple Instruction Multiple Data
Memory Instruction Multiple Data
Memory Information Memory Data
524. The status bit is also called as -
Unsigned bit
Signed bit
Flag bit
None of the above
525. Which of the following register keeps track of the instructions stored in the program stored in memory?
Accumulator
Address Register
Program Counter
Index Register
526. The Program Counter is also called as
Instruction Pointer
Data Counter
Memory pointer
None of the above
527. Which of the following topology is used in Ethernet?
Ring topology
Bus topology
Mesh topology
Star topology
528. Which of the following is correct about memory and storage?
Memory is temporary, Storage is temporary
Memory is temporary, Storage is permanent
Memory is permanent, Storage is temporary
Memory is slow, Storage is fast
529. Which of the following is equal to 4 bits?
Byte
Nibble
Record
All of the above
530. What does one thousand bytes represent?
Kilobyte (KB)
Megabyte (MB)
Gigabyte (GB)
Terabyte (TB)
531. What is the content of stack pointer (SP)?
Address of the top element in the stack
Address of current instruction
Address of next instruction
None of the above
532. An n-bit microprocessor has -
n-bit instruction register
n-bit address register
n-bit program counter
None of the above
533. Which of the following is the operation executed on data stored in registers?
Byte operation
Bit operation
Macrooperation
Microoperation
534. What does a computer bus line consist of?
Set of parallel lines
Accumulators
Registers
None of the above
535. Which of the following is performed by half adder?
Binary addition operation for 2 decimal inputs
Binary addition operation for 2 binary inputs
Decimal addition operation for 2 decimal inputs
Binary addition operation for 2 binary inputs
536. Which of the following is a combinational logic circuit which converts binary information from n coded inputs to a maximum of 2n unique outputs?
Multiplexer
Demultiplexer
Encoder
Decoder
537. Which of the following is a combinational logic circuit that change the binary information into N output lines?
Multiplexer
Demultiplexer
Encoder
Decoder
538. Which of the following is a combinational logic circuit that has 2^n input lines and a single output line?
Multiplexer
Demultiplexer
Encoder
Decoder
539. Which of the following building block can be used to implement any combinational logic circuit?
AND
OR
NAND
None of the above
540. Which of the following is the circuit board on which chips and processor are placed?
Master circuit
Motherboard
Big board
None of the above
541. Which of the following computer register collects the result of computation?
Accumulator
Instruction Pointer
Storage register
None of the above
542. CISC stands for -
Complex Instruction Set Computer
Complete Instruction Sequential Compilation
Complex Instruction Sequential Compiler
None of the above
543. Which of the following is the function of the control unit in the CPU?
It stores program instruction
It decodes program instruction
It performs logic operations
None of the above
544. What does EEPROM stands for?
Electrically Erasable and Programmable Read-Only Memory
Electronically Erasable and Programmable Read-Only Memory
Electrically Enabled and Programmable Read-Only Memory
None of the above
545. In which of the following term the performance of cache memory is measured?
Chat ratio
Hit ratio
Copy ratio
Data ratio
546. RISC stands for -
Reduce Instruction Set Computer
Risk Instruction Sequential Compilation
Risk Instruction Source Compiler
None of the above
547. Which of the following is an essential data transfer technique?
MMA
DMA
CAD
CAM
548. Which of the following is page fault?
Page fault occurs when a program accesses a page of another program
Page fault occurs when a program accesses a page in main memory
Page fault occurs when there is an error in particular page
Page fault occurs when a program accesses a page which is not present in main memory
549. What does DRAM stand for?
Dynamic Read Access Memory
Digital Random-Access Memory
Dynamic Random-Access Memory
Dynamic Read Allocation Memory
550. Which of the following is known as the step by step procedure to solve a problem?
Graph
Table
Algorithm
None of the above
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