computer-nec-license
  • NEC-Computer
  • 1. Concept of Basic Electrical and Electronics Engineering
    • 1.1 Basic Concepts
    • 1.2 Network Theorems
    • 1.3 Alternating Current Fundamentals
    • 1.4 Semiconductor Device
    • 1.5 Signal Generator
    • 1.6 Amplifiers
    • MCQs
      • MCQs On Basic Electrical
        • set-1
        • set-2
      • MCQs On Basic Electronics
        • set-1
        • set-2
  • 2. Digital Logic and Microprocessor
    • 2.1 Digital Logic
    • 2.2 Combinational & Arithmetic Circuit
    • 2.3 Sequential Logic Circuits
    • 2.4 Microprocessor
    • 2.5 Microprocessor System
    • 2.6 Interrupt Operations
    • MCQs
      • MCQs On Digital Logic
        • set-1
        • set-2
        • set-3
        • set-4
        • set-5
        • set-6
        • set-7
        • set-8
        • set-9
        • set-10
        • set-11
        • set-12
      • MCQs On Microprocessor
        • set-1
        • set-2
        • set-3
        • set-4
        • set-5
        • set-6
        • set-7
        • set-8
        • set-9
  • 3. Programming Language and Its Applications
    • 3.1 Introduction to C Programming
    • 3.2 Pointers, Structures, and Data Files
    • 3.3 C++ Language Constructs with Objects and Classes
    • 3.4 Features of Object-Oriented Programming
    • 3.5 Pure Virtual Functions and File Handling
    • 3.6 Generic Programming and Exception Handling
    • MCQs
      • set-1
      • set-2
      • set-3
      • set-4
      • set-5
  • 4. Computer Organization and Embedded System
    • 4.1 Control and CPU
    • 4.2 Computer Arithmetic and Memory System
    • 4.3 I/O Organization and Multiprocessor
    • 4.4 Embedded System Design
    • 4.5 Real-Time Operating and Control Systems
    • 4.6 Hardware Description Language (VHDL) and IC Technology
    • MCQs
      • set-1
      • set-2
      • set-3
      • set-4
      • set-5
      • set-6
      • set-7
      • set-8
      • set-9
      • set-10
      • set-11
  • 5. Concept of Computer Network and Network Security System
    • 5.1 Introduction to Computer Networks
    • 5.2 Data Link Layer
    • 5.3 Network Layer
    • 5.4 Transport Layer
    • 5.5 Application Layer
    • 5.6 Network Security
    • MCQs
      • Basic Networking
        • set-1
        • set-2
      • Advanced Networking
        • set-1
        • set-2
        • set-3
        • set-4
        • set-5
        • set-6
  • 6. Theory of Computation and Computer Graphics
    • 6.1 Introduction to Finite Automata
    • 6.2 Introduction to Context-Free Languages (CFL)
    • 6.3 Turing Machines (TM)
    • 6.4 Introduction to Computer Graphics
    • 6.5 Two-Dimensional Transformation
    • 6.6 Three-Dimensional Transformation
    • MCQs
      • MCQs on Theory of Computation
        • set-1
        • set-2
        • set-3
      • MCQs On Computer Graphics
        • set-1
        • set-2
        • set-3
        • set-4
        • set-5
        • set-6
  • 7. Data Structures and Algorithm, Database System and Operating System
    • 7.1 Introduction to Data Structures, Lists, Linked Lists, and Trees
    • 7.2 Sorting, Searching, Hashing and Graphs
    • 7.3 Introduction to Data Models, Normalization, and SQL
    • 7.4 Transaction Processing, Concurrency Control, and Crash Recovery
    • 7.5 Introduction to Operating System and Process Management
    • 7.6 Memory Management, File Systems, and System Administration
    • MCQs
      • MCQs ON DSA
        • set-1
        • set-2
        • set-3
        • set-4
        • set-5
        • set-6
      • MCQs On DBMS
        • set-1
        • set-2
      • MCQs On Operating System
        • set-1
        • set-2
        • set-3
        • set-4
        • set-5
        • set-6
        • set-7
        • set-8
        • set-9
        • set-10
        • set-11
        • set-12
  • 8. Software Engineering and Object-Oriented Analysis & Design
    • 8.1 Software Process and Requirements
    • 8.2 Software Design
    • 8.3 Software Testing, Cost Estimation, Quality Management, and Configuration Management
    • 8.4 Object-Oriented Fundamentals and Analysis
    • 8.5 Object-Oriented Design
    • 8.6 Object-Oriented Design Implementation
    • MCQs
      • set-1
      • set-2
      • set-3
      • set-4
      • set-5
      • set-6
      • set-7
      • set-8
      • set-9
  • 9. Artificial Intelligence and Neural Networks
    • 9.1 Introduction to AI and Intelligent Agents
    • 9.2 Problem Solving and Searching Techniques
    • 9.3 Knowledge Representation
    • 9.4 Expert System and Natural Language Processing
    • 9.5 Machine Learning
    • 9.6 Neural Networks
    • MCQs
      • set-1
      • set-2
      • set-3
      • set-4
      • set-5
      • set-6
      • set-7
      • set-8
      • set-9
  • 10. Project Planning, Design and Implementation
    • 10.1 Engineering Drawings and Its Concepts
    • 10.2 Engineering Economics
    • 10.3 Project Planning and Scheduling
    • 10.4 Project Management
    • 10.5 Engineering Professional Practice
    • 10.6 Engineering Regulatory Body
    • MCQs
      • MCQs On Engineering Drawing
        • set-1
        • set-2
      • MCQs On Engineering Economics
      • MCQs On Project Planning & Scheduling
      • MCQs On Project Mangement
      • MCQs On Engineering Professional Practice
      • MCQs On Engineering Regulatory Body
  • Questions Sets
    • Set 1 (Chaitra, 2080)
      • Short Questions (60*1=60 Marks)
      • Long Questions (20*2=40 Marks)
    • Set 2 (Aasadh, 2081)
      • Short Questions (60*1=60 Marks)
      • Long Questions (20*2=40 Marks)
    • Set 3 (Asojh, 2080)
      • Short Questions (60*1=60 Marks)
      • Long Questions (20*2=40 Marks)
    • Model Set - Computer Engineering By NEC
      • Short Questions (60*1=60 Marks)
      • Long Questions (20*2=40 Marks)
    • Model Set - Software Engineering By NEC
      • Short Questions (60*1=60 Marks)
      • Long Questions (20*2=40 Marks)
  • Tips & Tricks
Powered by GitBook
On this page
  • 1. Interrupts
  • 2. Interrupt Service Routines (ISRs)
  • 3. Interrupt Processing
  • 4. Types of Interrupts:
  • 5. Interrupt Priority
  • 6. Interrupt Vector Table
  • Conclusion
  1. 2. Digital Logic and Microprocessor

2.6 Interrupt Operations

1. Interrupts

Interrupts are signals that alert the microprocessor to stop its current operations and attend to more urgent tasks which is typically triggered by hardware devices or software.

There are basically two types of interrupts:

  • Hardware Interrupts: Generated by external devices, such as input from a keyboard, mouse, or sensor.

  • Software Interrupts: Triggered by software instructions (e.g., a system call or software exception).

2. Interrupt Service Routines (ISRs)

Interrupt Service Routine (ISR) is a special function or set of instructions executed when a specific interrupt occurs. Each interrupt is assigned an ISR, which is responsible for handling the interrupt and then returning control back to the main program.

The different steps involved in the ISRs:

  1. Interrupt Request (IRQ): An interrupt is raised by the hardware or software.

  2. Interrupt Acknowledgment: The microprocessor acknowledges the interrupt.

  3. Execution of ISR: The ISR is executed to handle the interrupt.

  4. Return to Normal Operation: Once the interrupt is processed, the CPU resumes the previously interrupted task.

3. Interrupt Processing

The interrupt processing cycle involves the following steps:

  1. Interrupt Occurrence: An interrupt is triggered.

  2. Interrupt Detection: The processor detects the interrupt signal.

  3. Interrupt Acknowledgment: The processor acknowledges the interrupt and saves the current execution state (e.g., registers, program counter) to preserve the ongoing task.

  4. ISR Execution: The processor jumps to the corresponding ISR address to execute the interrupt-handling code.

  5. Context Restoration: After the ISR is completed, the processor restores the saved execution state and resumes normal program execution.

4. Types of Interrupts:

There are usually two types of interrupts:

  • Maskable Interrupts: Can be disabled (masked) by the CPU to avoid interruption during critical processes.

  • Non-Maskable Interrupts (NMI): Cannot be disabled and have higher priority, typically used for critical events like hardware failure.

5. Interrupt Priority

When multiple interrupts occur simultaneously, the processor must determine which one to address first. This is often done through an interrupt priority scheme.

There are usually two types of interrupts priorities:

  • Fixed Priority: Each interrupt source has a fixed priority level, and the processor serves the highest-priority interrupt.

  • Dynamic Priority: The priority may be changed depending on the circumstances or the type of interrupt.

6. Interrupt Vector Table

The interrupt vector table is a table in memory that stores the addresses of ISRs for various interrupt sources. When an interrupt occurs, the processor looks up the ISR address in the interrupt vector table to know where to jump for processing.

Conclusion

Interrupts are signals that temporarily pause the CPU's tasks to handle urgent events, triggered by hardware (e.g., keyboard) or software (e.g., exceptions). An ISR manages each interrupt, ensuring tasks resume after processing. Interrupts can be maskable (disable-able) or non-maskable (critical, high-priority). The CPU uses an interrupt vector table to locate ISR addresses.

Previous2.5 Microprocessor SystemNextMCQs

Last updated 4 months ago