set-5

201. A combinational logic circuit which generates a particular binary word or number is:

1. $\text{Decoder}$

2. $\text{Encoder}$

3. $\text{Multiplexer}$

4. $\text{De-multiplexer}$

Show me the answer

Answer: 2. $\text{Encoder}$

Explanation:

• An encoder generates a specific binary word or number based on the input signals.

202. Parallel adders are:

1. $\text{Combinational logic circuits}$

2. $\text{Sequential logic circuits}$

3. $\text{Both of the above}$

4. $\text{None of the above}$

Show me the answer

Answer: 1. $\text{Combinational logic circuits}$

Explanation:

• Parallel adders are combinational circuits that perform addition without any memory or feedback.

203. A de-multiplexer is also known as:

1. $\text{Data selector}$

2. $\text{Multiplexer}$

3. $\text{Data distributor}$

4. $\text{Encoder}$

Show me the answer

Answer: 3. $\text{Data distributor}$

Explanation:

• A de-multiplexer distributes a single input signal to one of many output lines, hence it is also called a data distributor.

204. A multiplexer is known as:

1. $\text{Coder}$

2. $\text{Data selector}$

3. $\text{Decoder}$

4. $\text{Encoder}$

Show me the answer

Answer: 2. $\text{Data selector}$

Explanation:

• A multiplexer selects one of many input signals and forwards it to a single output line, hence it is also called a data selector.

205. A flip-flop can store:

1. $\text{One bit of data}$

2. $\text{Three bits of data}$

3. $\text{Two bits of data}$

4. $\text{Any number of bits of data}$

Show me the answer

Answer: 1. $\text{One bit of data}$

Explanation:

• A flip-flop is a basic memory element that can store one bit of data (either 0 or 1).

206. Which of the following input combinations is not allowed in an SR flip-flop?

1. $S=0, R=0$

2. $S=1, R=0$

3. $S=0, R=1$

4. $S=1, R=1$

Show me the answer

Answer: 4. $S=1, R=1$

Explanation:

• The input combination ( S=1, R=1 ) is invalid in an SR flip-flop because it leads to an indeterminate state.

207. When an inverter is placed between both inputs of an SR flip-flop, the resulting flip-flop is:

1. $\text{JK flip-flop}$

2. $\text{T flip-flop}$

3. $\text{D flip-flop}$

4. $\text{Master-slave JK flip-flop}$

Show me the answer

Answer: 3. $\text{D flip-flop}$

Explanation:

• Placing an inverter between the inputs of an SR flip-flop converts it into a D flip-flop, where the input is directly passed to the output on a clock edge.

208. The clock signals are used in sequential logic circuits to:

1. $\text{Tell the time of the day}$

2. $\text{Tell how much time has elapsed since the system was turned on}$

3. $\text{Carry serial data signals}$

4. $\text{Synchronize events in various parts of a system}$

Show me the answer

Answer: 4. $\text{Synchronize events in various parts of a system}$

Explanation:

• Clock signals are used to synchronize the operations of sequential logic circuits, ensuring proper timing and coordination.

209. What logic function is obtained by adding an inverter to the output of an AND gate?

1. $\text{OR}$

2. $\text{XOR}$

3. $\text{NAND}$

4. $\text{NOR}$

Show me the answer

Answer: 3. $\text{NAND}$

Explanation:

• Adding an inverter to the output of an AND gate results in a NAND gate, which performs the NOT-AND operation.

210. The simplified form of the Boolean expression ( (X + Y + XY)(X + Z) ) is:

1. $X + Y + Z$

2. $X + YZ$

3. $XY + YZ$

4. $XZ + Y$

Show me the answer

Answer: 2. $X + YZ$

Explanation:

• The expression simplifies to ( X + YZ ) using Boolean algebra rules.

211. The highest decimal number that can be represented with 10 binary digits is:

1. $1023$

2. $512$

3. $1024$

4. $2048$

Show me the answer

Answer: 1. $1023$

Explanation:

• With 10 binary digits, the highest decimal number that can be represented is ( 2^{10} - 1 = 1023 ).

212. What is the hexadecimal equivalent of the binary number 10101111?

1. $AF$

2. $8C$

3. $OF$

4. $All of the above$

Show me the answer

Answer: 1. $AF$

Explanation:

• The binary number 10101111 converts to the hexadecimal number AF.

213. Which of the following logic families has the highest noise immunity?

1. $\text{RTL}$

2. $\text{TTL}$

3. $\text{DTL}$

4. $\text{HTL}$

Show me the answer

Answer: 4. $\text{HTL}$

Explanation:

• HTL (High-Threshold Logic) has the highest noise immunity due to its higher voltage levels.

214. Pick up the wrong logical expression:

1. $1 + 0 = 0 + 1 = 1$

2. $X + Y = X \cdot Y$

3. $0 + 0 = 1 \cdot 1 = 0$

4. $X + 0 = X$

Show me the answer

Answer: 2. $X + Y = X \cdot Y$

Explanation:

• The expression ( X + Y = X \cdot Y ) is incorrect because OR and AND operations are not equivalent.

215. In a four-input NAND gate, all but one input is 1. The output is:

1. $4$

2. $1$

3. $0$

4. $\text{Undefined}$

Show me the answer

Answer: 3. $0$

Explanation:

• In a NAND gate, if any input is 0, the output is 1. However, if all inputs are 1, the output is 0.

216. In a four-input AND gate, all but one input is 1. The output is:

1. $0$

2. $1$

3. $\text{Undefined}$

4. $4$

Show me the answer

Answer: 1. $0$

Explanation:

• In an AND gate, if any input is 0, the output is 0.

217. According to the Idempotent law, ( X + X = ):

1. $1$

2. $X$

3. $0$

4. $X \cdot X$

Show me the answer

Answer: 2. $X$

Explanation:

• The Idempotent law states that ( X + X = X ).

218. According to the Idempotent law, ( X \cdot X = ):

1. $1$

2. $X$

3. $0$

4. $X + X$

Show me the answer

Answer: 2. $X$

Explanation:

• The Idempotent law states that ( X \cdot X = X ).

219. The output will be one in case any input is one in the case of:

1. $\text{OR gate}$

2. $\text{NAND gate}$

3. $\text{AND gate}$

4. $\text{NOT gate}$

Show me the answer

Answer: 1. $\text{OR gate}$

Explanation:

• In an OR gate, the output is 1 if any input is 1.

220. Which of the following circuits is known as a half adder?

1. $\text{EXCLUSIVE AND circuit}$

2. $\text{INCLUSIVE OR circuit}$

3. $\text{Flip-flop circuit}$

4. $\text{EXCLUSIVE OR circuit}$

Show me the answer

Answer: 4. $\text{EXCLUSIVE OR circuit}$

Explanation:

• A half adder consists of an XOR gate for the sum and an AND gate for the carry.

221. Which of the following functions is referred to as the complementary function?

1. $\text{OR function}$

2. $\text{NAND function}$

3. $\text{NOT function}$

4. $\text{AND function}$

Show me the answer

Answer: 3. $\text{NOT function}$

Explanation:

• The NOT function is the complementary function, as it inverts the input.

222. Which of the following statements illustrates the distributive law?

1. $(A + B) + C = A + (B + C) = A + B + C$

2. $(A \cdot B) \cdot C = A \cdot (B \cdot C) = A \cdot B \cdot C$

3. $A + B = B + A$

4. $A \cdot (B + C) = (A \cdot B) + (A \cdot C)$

Show me the answer

Answer: 4. $A \cdot (B + C) = (A \cdot B) + (A \cdot C)$

Explanation:

• The distributive law states that ( A \cdot (B + C) = (A \cdot B) + (A \cdot C) ).

223. Which of the following is termed as the minimum error code?

1. $\text{Binary code}$

2. $\text{Excess-3 code}$

3. $\text{Gray code}$

4. $\text{Octal code}$

Show me the answer

Answer: 3. $\text{Gray code}$

Explanation:

• Gray code is designed to minimize errors in digital communication, as only one bit changes between consecutive values.

224. For which of the following flip-flops is the output clearly defined for all combinations of two inputs?

1. $\text{D-type flip-flop}$

2. $\text{JK flip-flop}$

3. $\text{R-S flip-flop}$

4. $\text{T flip-flop}$

Show me the answer

Answer: 2. $\text{JK flip-flop}$

Explanation:

• The JK flip-flop has a defined output for all input combinations, including the toggle state.

225. A 4-bit shift register can be made by using:

1. $3 \text{ JK flip-flops}$

2. $5 \text{ JK flip-flops}$

3. $4 \text{ JK flip-flops}$

4. $8 \text{ JK flip-flops}$

Show me the answer

Answer: 3. $4 \text{ JK flip-flops}$

Explanation:

• A 4-bit shift register requires 4 flip-flops, one for each bit.

226. Which of the following statements is false?

1. $\overline{A \cdot B} = \overline{A} + \overline{B}$

2. $\overline{A + B} = \overline{A} \cdot \overline{B}$

3. $A + B = \overline{A} \cdot \overline{B}$

4. $A + A = A$

Show me the answer

Answer: 3. $A + B = \overline{A} \cdot \overline{B}$

Explanation:

• The statement ( A + B = \overline{A} \cdot \overline{B} ) is false according to De Morgan's laws.

227. The minimum form of the expression ( (A + B)(A + B + C) ) is:

1. $A + C$

2. $A + B$

3. $A + B + C$

4. $A + BC$

Show me the answer

Answer: 4. $A + BC$

Explanation:

• The expression simplifies to ( A + BC ) using Boolean algebra.

228. One's complement of 1011.01 is:

1. $0100.10$

2. $1011.10$

3. $0100.11$

4. $0100.01$

Show me the answer

Answer: 1. $0100.10$

Explanation:

• The one's complement is obtained by inverting all the bits.

229. The NAND gate output will be low if the two inputs are:

1. $00$

2. $10$

3. $01$

4. $11$

Show me the answer

Answer: 4. $11$

Explanation:

• A NAND gate outputs 0 only when all inputs are 1.

230. What is the binary equivalent of the decimal number 368?

1. $101110000$

2. $111010000$

3. $110110000$

4. $111100000$

Show me the answer

Answer: 1. $101110000$

Explanation:

• The binary equivalent of 368 is 101110000.

231. The decimal equivalent of the hexadecimal number 1A53 is:

1. $6793$

2. $6973$

3. $6739$

4. $6379$

Show me the answer

Answer: 1. $6793$

Explanation:

• The hexadecimal number 1A53 converts to the decimal number 6793.

232. The octal equivalent of the decimal number 324.987 is:

1. $504.771$

2. $815.234$

3. $640.781$

4. $90.987$

Show me the answer

Answer: 1. $504.771$

Explanation:

• The decimal number 324.987 converts to the octal number 504.771.

233. The simplification of the Boolean expression ( (A \cdot B \cdot C) + (A \cdot B \cdot \overline{C}) ) is:

1. $0$

2. $A$

3. $A \cdot B$

4. $B \cdot C$

Show me the answer

Answer: 3. $A \cdot B$

Explanation:

• The expression simplifies to ( A \cdot B ) using Boolean algebra.

234. The number of control lines for an 8-to-1 multiplexer is:

1. $2$

2. $4$

3. $3$

4. $5$

Show me the answer

Answer: 3. $3$

Explanation:

• An 8-to-1 multiplexer requires 3 control lines (since ( 2^3 = 8 )).

235. How many flip-flops are required for a mod-16 counter?

1. $5$

2. $3$

3. $4$

4. $6$

Show me the answer

Answer: 3. $4$

Explanation:

• A mod-16 counter requires 4 flip-flops (since ( 2^4 = 16 )).

236. EPROM contents can be erased by exposing it to:

1. $\text{Ultraviolet light}$

2. $\text{Burst of microwaves}$

3. $\text{Infrared rays}$

4. $\text{Intense heat radiations}$

Show me the answer

Answer: 1. $\text{Ultraviolet light}$

Explanation:

• EPROMs are erased by exposing them to ultraviolet light.

237. The hexadecimal number 'A0' has the decimal value equivalent to:

1. $80$

2. $100$

3. $256$

4. $160$

Show me the answer

Answer: 4. $160$

Explanation:

• The hexadecimal number A0 converts to the decimal number 160.

238. The Gray code for decimal number 6 is equivalent to:

1. $1100$

2. $0101$

3. $1001$

4. $0110$

Show me the answer

Answer: 4. $0110$

Explanation:

• The Gray code for decimal 6 is 0110.

239. The Boolean expression ( A \cdot B + A \cdot \overline{B} + \overline{A} \cdot B ) is equivalent to:

1. $A + B$

2. $A \cdot B$

3. $\overline{A} + \overline{B}$

4. $A \oplus B$

Show me the answer

Answer: 1. $A + B$

Explanation:

• The expression simplifies to ( A + B ) using Boolean algebra.

240. The 2's complement of the binary number 1101101 is:

1. $0010011$

2. $0010010$

3. $0010001$

4. $0010000$

Show me the answer

Answer: 1. $0010011$

Explanation:

• The 2's complement of 1101101 is 0010011.

241. The digital logic family which has minimum power dissipation is:

1. $\text{TTL}$

2. $\text{DTL}$

3. $\text{RTL}$

4. $\text{CMOS}$

Show me the answer

Answer: 4. $\text{CMOS}$

Explanation:

• CMOS logic has the lowest power dissipation among the given options.

242. The output of a logic gate is 1 when all its inputs are at logic 0. The gate is either:

1. $\text{NAND or EX-OR}$

2. $\text{AND or EX-OR}$

3. $\text{OR or EX-NOR}$

4. $\text{NOR or EX-NOR}$

Show me the answer

Answer: 4. $\text{NOR or EX-NOR}$

Explanation:

• A NOR gate outputs 1 when all inputs are 0, and an EX-NOR gate outputs 1 when all inputs are equal.

243. Data can be changed from special code to temporal code by using:

1. $\text{Shift registers}$

2. $\text{Combinational circuits}$

3. $\text{Counters}$

4. $\text{Multiplexers}$

Show me the answer

Answer: 1. $\text{Shift registers}$

Explanation:

• Shift registers are used to convert data from parallel to serial form or vice versa.

244. A ring counter consisting of five flip-flops will have:

1. $5 \text{ states}$

2. $32 \text{ states}$

3. $10 \text{ states}$

4. $\text{Infinite states}$

Show me the answer

Answer: 1. $5 \text{ states}$

Explanation:

• A ring counter with 5 flip-flops has 5 unique states.

245. The speed of conversion is maximum in:

1. $\text{Successive-approximation A/D converter}$

2. $\text{Parallel-comparator A/D converter}$

3. $\text{Counter-ramp A/D converter}$

4. $\text{Dual-slope A/D converter}$

Show me the answer

Answer: 2. $\text{Parallel-comparator A/D converter}$

Explanation:

• Parallel-comparator A/D converters have the fastest conversion speed.

246. The 2's complement of the number 1101101 is:

1. $0010011$

2. $0010010$

3. $0010001$

4. $0010000$

Show me the answer

Answer: 1. $0010011$

Explanation:

• The 2's complement of 1101101 is 0010011.

247. The correction to be applied in a decimal adder to the generated sum is:

1. $A + B$

2. $A \cdot B$

3. $\overline{A} + \overline{B}$

4. $\overline{A} \cdot \overline{B}$

Show me the answer

Answer: 2. $A \cdot B$

Explanation:

• The correction term in a decimal adder is ( A \cdot B ).

248. When simplified with Boolean algebra, ( (x + y)(x + z) ) simplifies to:

1. $x$

2. $x + yz$

3. $x + y + z$

4. $x(y + z)$

Show me the answer

Answer: 2. $x + yz$

Explanation:

• The expression simplifies to ( x + yz ) using Boolean algebra.

249. The gates required to build a half adder are:

1. $\text{EX-OR gate and NOR gate}$

2. $\text{EX-OR gate and AND gate}$

3. $\text{EX-OR gate and OR gate}$

4. $\text{Four NAND gates}$

Show me the answer

Answer: 2. $\text{EX-OR gate and AND gate}$

Explanation:

• A half adder consists of an EX-OR gate for the sum and an AND gate for the carry.

250. The code where all successive numbers differ from their preceding number by a single bit is:

1. $\text{Binary code}$

2. $\text{Excess-3 code}$

3. $\text{BCD code}$

4. $\text{Gray code}$

Show me the answer

Answer: 4. $\text{Gray code}$

Explanation:

• Gray code ensures that only one bit changes between consecutive numbers.