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Loksewa GK IQ

set-5

hashtag
201. A combinational logic circuit which generates a particular binary word or number is:

  1. Decoder\text{Decoder}

  2. Encoder\text{Encoder}

  3. Multiplexer\text{Multiplexer}

  4. De-multiplexer\text{De-multiplexer}

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Answer: 2. Encoder\text{Encoder}

Explanation:

  • An encoder generates a specific binary word or number based on the input signals.

hashtag
202. Parallel adders are:

  1. Combinational logic circuits\text{Combinational logic circuits}

  2. Sequential logic circuits\text{Sequential logic circuits}

  3. Both of the above\text{Both of the above}

  4. None of the above\text{None of the above}

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Answer: 1. Combinational logic circuits\text{Combinational logic circuits}

Explanation:

  • Parallel adders are combinational circuits that perform addition without any memory or feedback.

hashtag
203. A de-multiplexer is also known as:

  1. Data selector\text{Data selector}

  2. Multiplexer\text{Multiplexer}

  3. Data distributor\text{Data distributor}

  4. Encoder\text{Encoder}

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Answer: 3. Data distributor\text{Data distributor}

Explanation:

  • A de-multiplexer distributes a single input signal to one of many output lines, hence it is also called a data distributor.

hashtag
204. A multiplexer is known as:

  1. Coder\text{Coder}

  2. Data selector\text{Data selector}

  3. Decoder\text{Decoder}

  4. Encoder\text{Encoder}

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Answer: 2. Data selector\text{Data selector}

Explanation:

  • A multiplexer selects one of many input signals and forwards it to a single output line, hence it is also called a data selector.

hashtag
205. A flip-flop can store:

  1. One bit of data\text{One bit of data}

  2. Three bits of data\text{Three bits of data}

  3. Two bits of data\text{Two bits of data}

  4. Any number of bits of data\text{Any number of bits of data}

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Answer: 1. One bit of data\text{One bit of data}

Explanation:

  • A flip-flop is a basic memory element that can store one bit of data (either 0 or 1).

hashtag
206. Which of the following input combinations is not allowed in an SR flip-flop?

  1. S=0,R=0S=0, R=0

  2. S=1,R=0S=1, R=0

  3. S=0,R=1S=0, R=1

  4. S=1,R=1S=1, R=1

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Answer: 4. S=1,R=1S=1, R=1

Explanation:

  • The input combination ( S=1, R=1 ) is invalid in an SR flip-flop because it leads to an indeterminate state.

hashtag
207. When an inverter is placed between both inputs of an SR flip-flop, the resulting flip-flop is:

  1. JK flip-flop\text{JK flip-flop}

  2. T flip-flop\text{T flip-flop}

  3. D flip-flop\text{D flip-flop}

  4. Master-slave JK flip-flop\text{Master-slave JK flip-flop}

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Answer: 3. D flip-flop\text{D flip-flop}

Explanation:

  • Placing an inverter between the inputs of an SR flip-flop converts it into a D flip-flop, where the input is directly passed to the output on a clock edge.

hashtag
208. The clock signals are used in sequential logic circuits to:

  1. Tell the time of the day\text{Tell the time of the day}

  2. Tell how much time has elapsed since the system was turned on\text{Tell how much time has elapsed since the system was turned on}

  3. Carry serial data signals\text{Carry serial data signals}

  4. Synchronize events in various parts of a system\text{Synchronize events in various parts of a system}

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Answer: 4. Synchronize events in various parts of a system\text{Synchronize events in various parts of a system}

Explanation:

  • Clock signals are used to synchronize the operations of sequential logic circuits, ensuring proper timing and coordination.

hashtag
209. What logic function is obtained by adding an inverter to the output of an AND gate?

  1. OR\text{OR}

  2. XOR\text{XOR}

  3. NAND\text{NAND}

  4. NOR\text{NOR}

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Answer: 3. NAND\text{NAND}

Explanation:

  • Adding an inverter to the output of an AND gate results in a NAND gate, which performs the NOT-AND operation.

hashtag
210. The simplified form of the Boolean expression ( (X + Y + XY)(X + Z) ) is:

  1. X+Y+ZX + Y + Z

  2. X+YZX + YZ

  3. XY+YZXY + YZ

  4. XZ+YXZ + Y

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Answer: 2. X+YZX + YZ

Explanation:

  • The expression simplifies to ( X + YZ ) using Boolean algebra rules.

hashtag
211. The highest decimal number that can be represented with 10 binary digits is:

  1. 10231023

  2. 512512

  3. 10241024

  4. 20482048

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Answer: 1. 10231023

Explanation:

  • With 10 binary digits, the highest decimal number that can be represented is ( 2^{10} - 1 = 1023 ).

hashtag
212. What is the hexadecimal equivalent of the binary number 10101111?

  1. AFAF

  2. 8C8C

  3. OFOF

  4. AlloftheaboveAll of the above

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Answer: 1. AFAF

Explanation:

  • The binary number 10101111 converts to the hexadecimal number AF.

hashtag
213. Which of the following logic families has the highest noise immunity?

  1. RTL\text{RTL}

  2. TTL\text{TTL}

  3. DTL\text{DTL}

  4. HTL\text{HTL}

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Answer: 4. HTL\text{HTL}

Explanation:

  • HTL (High-Threshold Logic) has the highest noise immunity due to its higher voltage levels.

hashtag
214. Pick up the wrong logical expression:

  1. 1+0=0+1=11 + 0 = 0 + 1 = 1

  2. X+Y=X⋅YX + Y = X \cdot Y

  3. 0+0=1⋅1=00 + 0 = 1 \cdot 1 = 0

  4. X+0=XX + 0 = X

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Answer: 2. X+Y=X⋅YX + Y = X \cdot Y

Explanation:

  • The expression ( X + Y = X \cdot Y ) is incorrect because OR and AND operations are not equivalent.

hashtag
215. In a four-input NAND gate, all but one input is 1. The output is:

  1. 44

  2. 11

  3. 00

  4. Undefined\text{Undefined}

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Answer: 3. 00

Explanation:

  • In a NAND gate, if any input is 0, the output is 1. However, if all inputs are 1, the output is 0.

hashtag
216. In a four-input AND gate, all but one input is 1. The output is:

  1. 00

  2. 11

  3. Undefined\text{Undefined}

  4. 44

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Answer: 1. 00

Explanation:

  • In an AND gate, if any input is 0, the output is 0.

hashtag
217. According to the Idempotent law, ( X + X = ):

  1. 11

  2. XX

  3. 00

  4. X⋅XX \cdot X

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Answer: 2. XX

Explanation:

  • The Idempotent law states that ( X + X = X ).

hashtag
218. According to the Idempotent law, ( X \cdot X = ):

  1. 11

  2. XX

  3. 00

  4. X+XX + X

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Answer: 2. XX

Explanation:

  • The Idempotent law states that ( X \cdot X = X ).

hashtag
219. The output will be one in case any input is one in the case of:

  1. OR gate\text{OR gate}

  2. NAND gate\text{NAND gate}

  3. AND gate\text{AND gate}

  4. NOT gate\text{NOT gate}

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Answer: 1. OR gate\text{OR gate}

Explanation:

  • In an OR gate, the output is 1 if any input is 1.

hashtag
220. Which of the following circuits is known as a half adder?

  1. EXCLUSIVE AND circuit\text{EXCLUSIVE AND circuit}

  2. INCLUSIVE OR circuit\text{INCLUSIVE OR circuit}

  3. Flip-flop circuit\text{Flip-flop circuit}

  4. EXCLUSIVE OR circuit\text{EXCLUSIVE OR circuit}

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Answer: 4. EXCLUSIVE OR circuit\text{EXCLUSIVE OR circuit}

Explanation:

  • A half adder consists of an XOR gate for the sum and an AND gate for the carry.

hashtag
221. Which of the following functions is referred to as the complementary function?

  1. OR function\text{OR function}

  2. NAND function\text{NAND function}

  3. NOT function\text{NOT function}

  4. AND function\text{AND function}

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Answer: 3. NOT function\text{NOT function}

Explanation:

  • The NOT function is the complementary function, as it inverts the input.

hashtag
222. Which of the following statements illustrates the distributive law?

  1. (A+B)+C=A+(B+C)=A+B+C(A + B) + C = A + (B + C) = A + B + C

  2. (A⋅B)⋅C=A⋅(B⋅C)=A⋅B⋅C(A \cdot B) \cdot C = A \cdot (B \cdot C) = A \cdot B \cdot C

  3. A+B=B+AA + B = B + A

  4. A⋅(B+C)=(A⋅B)+(A⋅C)A \cdot (B + C) = (A \cdot B) + (A \cdot C)

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Answer: 4. A⋅(B+C)=(A⋅B)+(A⋅C)A \cdot (B + C) = (A \cdot B) + (A \cdot C)

Explanation:

  • The distributive law states that ( A \cdot (B + C) = (A \cdot B) + (A \cdot C) ).

hashtag
223. Which of the following is termed as the minimum error code?

  1. Binary code\text{Binary code}

  2. Excess-3 code\text{Excess-3 code}

  3. Gray code\text{Gray code}

  4. Octal code\text{Octal code}

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Answer: 3. Gray code\text{Gray code}

Explanation:

  • Gray code is designed to minimize errors in digital communication, as only one bit changes between consecutive values.

hashtag
224. For which of the following flip-flops is the output clearly defined for all combinations of two inputs?

  1. D-type flip-flop\text{D-type flip-flop}

  2. JK flip-flop\text{JK flip-flop}

  3. R-S flip-flop\text{R-S flip-flop}

  4. T flip-flop\text{T flip-flop}

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Answer: 2. JK flip-flop\text{JK flip-flop}

Explanation:

  • The JK flip-flop has a defined output for all input combinations, including the toggle state.

hashtag
225. A 4-bit shift register can be made by using:

  1. 3 JK flip-flops3 \text{ JK flip-flops}

  2. 5 JK flip-flops5 \text{ JK flip-flops}

  3. 4 JK flip-flops4 \text{ JK flip-flops}

  4. 8 JK flip-flops8 \text{ JK flip-flops}

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Answer: 3. 4 JK flip-flops4 \text{ JK flip-flops}

Explanation:

  • A 4-bit shift register requires 4 flip-flops, one for each bit.

hashtag
226. Which of the following statements is false?

  1. A⋅B‾=A‾+B‾\overline{A \cdot B} = \overline{A} + \overline{B}

  2. A+B‾=A‾⋅B‾\overline{A + B} = \overline{A} \cdot \overline{B}

  3. A+B=A‾⋅B‾A + B = \overline{A} \cdot \overline{B}

  4. A+A=AA + A = A

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Answer: 3. A+B=A‾⋅B‾A + B = \overline{A} \cdot \overline{B}

Explanation:

  • The statement ( A + B = \overline{A} \cdot \overline{B} ) is false according to De Morgan's laws.

hashtag
227. The minimum form of the expression ( (A + B)(A + B + C) ) is:

  1. A+CA + C

  2. A+BA + B

  3. A+B+CA + B + C

  4. A+BCA + BC

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Answer: 4. A+BCA + BC

Explanation:

  • The expression simplifies to ( A + BC ) using Boolean algebra.

hashtag
228. One's complement of 1011.01 is:

  1. 0100.100100.10

  2. 1011.101011.10

  3. 0100.110100.11

  4. 0100.010100.01

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Answer: 1. 0100.100100.10

Explanation:

  • The one's complement is obtained by inverting all the bits.

hashtag
229. The NAND gate output will be low if the two inputs are:

  1. 0000

  2. 1010

  3. 0101

  4. 1111

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Answer: 4. 1111

Explanation:

  • A NAND gate outputs 0 only when all inputs are 1.

hashtag
230. What is the binary equivalent of the decimal number 368?

  1. 101110000101110000

  2. 111010000111010000

  3. 110110000110110000

  4. 111100000111100000

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Answer: 1. 101110000101110000

Explanation:

  • The binary equivalent of 368 is 101110000.

hashtag
231. The decimal equivalent of the hexadecimal number 1A53 is:

  1. 67936793

  2. 69736973

  3. 67396739

  4. 63796379

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Answer: 1. 67936793

Explanation:

  • The hexadecimal number 1A53 converts to the decimal number 6793.

hashtag
232. The octal equivalent of the decimal number 324.987 is:

  1. 504.771504.771

  2. 815.234815.234

  3. 640.781640.781

  4. 90.98790.987

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Answer: 1. 504.771504.771

Explanation:

  • The decimal number 324.987 converts to the octal number 504.771.

hashtag
233. The simplification of the Boolean expression ( (A \cdot B \cdot C) + (A \cdot B \cdot \overline{C}) ) is:

  1. 00

  2. AA

  3. A⋅BA \cdot B

  4. B⋅CB \cdot C

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Answer: 3. A⋅BA \cdot B

Explanation:

  • The expression simplifies to ( A \cdot B ) using Boolean algebra.

hashtag
234. The number of control lines for an 8-to-1 multiplexer is:

  1. 22

  2. 44

  3. 33

  4. 55

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Answer: 3. 33

Explanation:

  • An 8-to-1 multiplexer requires 3 control lines (since ( 2^3 = 8 )).

hashtag
235. How many flip-flops are required for a mod-16 counter?

  1. 55

  2. 33

  3. 44

  4. 66

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Answer: 3. 44

Explanation:

  • A mod-16 counter requires 4 flip-flops (since ( 2^4 = 16 )).

hashtag
236. EPROM contents can be erased by exposing it to:

  1. Ultraviolet light\text{Ultraviolet light}

  2. Burst of microwaves\text{Burst of microwaves}

  3. Infrared rays\text{Infrared rays}

  4. Intense heat radiations\text{Intense heat radiations}

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Answer: 1. Ultraviolet light\text{Ultraviolet light}

Explanation:

  • EPROMs are erased by exposing them to ultraviolet light.

hashtag
237. The hexadecimal number 'A0' has the decimal value equivalent to:

  1. 8080

  2. 100100

  3. 256256

  4. 160160

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Answer: 4. 160160

Explanation:

  • The hexadecimal number A0 converts to the decimal number 160.

hashtag
238. The Gray code for decimal number 6 is equivalent to:

  1. 11001100

  2. 01010101

  3. 10011001

  4. 01100110

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Answer: 4. 01100110

Explanation:

  • The Gray code for decimal 6 is 0110.

hashtag
239. The Boolean expression ( A \cdot B + A \cdot \overline{B} + \overline{A} \cdot B ) is equivalent to:

  1. A+BA + B

  2. A⋅BA \cdot B

  3. A‾+B‾\overline{A} + \overline{B}

  4. A⊕BA \oplus B

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Answer: 1. A+BA + B

Explanation:

  • The expression simplifies to ( A + B ) using Boolean algebra.

hashtag
240. The 2's complement of the binary number 1101101 is:

  1. 00100110010011

  2. 00100100010010

  3. 00100010010001

  4. 00100000010000

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Answer: 1. 00100110010011

Explanation:

  • The 2's complement of 1101101 is 0010011.

hashtag
241. The digital logic family which has minimum power dissipation is:

  1. TTL\text{TTL}

  2. DTL\text{DTL}

  3. RTL\text{RTL}

  4. CMOS\text{CMOS}

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Answer: 4. CMOS\text{CMOS}

Explanation:

  • CMOS logic has the lowest power dissipation among the given options.

hashtag
242. The output of a logic gate is 1 when all its inputs are at logic 0. The gate is either:

  1. NAND or EX-OR\text{NAND or EX-OR}

  2. AND or EX-OR\text{AND or EX-OR}

  3. OR or EX-NOR\text{OR or EX-NOR}

  4. NOR or EX-NOR\text{NOR or EX-NOR}

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Answer: 4. NOR or EX-NOR\text{NOR or EX-NOR}

Explanation:

  • A NOR gate outputs 1 when all inputs are 0, and an EX-NOR gate outputs 1 when all inputs are equal.

hashtag
243. Data can be changed from special code to temporal code by using:

  1. Shift registers\text{Shift registers}

  2. Combinational circuits\text{Combinational circuits}

  3. Counters\text{Counters}

  4. Multiplexers\text{Multiplexers}

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Answer: 1. Shift registers\text{Shift registers}

Explanation:

  • Shift registers are used to convert data from parallel to serial form or vice versa.

hashtag
244. A ring counter consisting of five flip-flops will have:

  1. 5 states5 \text{ states}

  2. 32 states32 \text{ states}

  3. 10 states10 \text{ states}

  4. Infinite states\text{Infinite states}

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Answer: 1. 5 states5 \text{ states}

Explanation:

  • A ring counter with 5 flip-flops has 5 unique states.

hashtag
245. The speed of conversion is maximum in:

  1. Successive-approximation A/D converter\text{Successive-approximation A/D converter}

  2. Parallel-comparator A/D converter\text{Parallel-comparator A/D converter}

  3. Counter-ramp A/D converter\text{Counter-ramp A/D converter}

  4. Dual-slope A/D converter\text{Dual-slope A/D converter}

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Answer: 2. Parallel-comparator A/D converter\text{Parallel-comparator A/D converter}

Explanation:

  • Parallel-comparator A/D converters have the fastest conversion speed.

hashtag
246. The 2's complement of the number 1101101 is:

  1. 00100110010011

  2. 00100100010010

  3. 00100010010001

  4. 00100000010000

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Answer: 1. 00100110010011

Explanation:

  • The 2's complement of 1101101 is 0010011.

hashtag
247. The correction to be applied in a decimal adder to the generated sum is:

  1. A+BA + B

  2. A⋅BA \cdot B

  3. A‾+B‾\overline{A} + \overline{B}

  4. A‾⋅B‾\overline{A} \cdot \overline{B}

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Answer: 2. A⋅BA \cdot B

Explanation:

  • The correction term in a decimal adder is ( A \cdot B ).

hashtag
248. When simplified with Boolean algebra, ( (x + y)(x + z) ) simplifies to:

  1. xx

  2. x+yzx + yz

  3. x+y+zx + y + z

  4. x(y+z)x(y + z)

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Answer: 2. x+yzx + yz

Explanation:

  • The expression simplifies to ( x + yz ) using Boolean algebra.

hashtag
249. The gates required to build a half adder are:

  1. EX-OR gate and NOR gate\text{EX-OR gate and NOR gate}

  2. EX-OR gate and AND gate\text{EX-OR gate and AND gate}

  3. EX-OR gate and OR gate\text{EX-OR gate and OR gate}

  4. Four NAND gates\text{Four NAND gates}

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Answer: 2. EX-OR gate and AND gate\text{EX-OR gate and AND gate}

Explanation:

  • A half adder consists of an EX-OR gate for the sum and an AND gate for the carry.

hashtag
250. The code where all successive numbers differ from their preceding number by a single bit is:

  1. Binary code\text{Binary code}

  2. Excess-3 code\text{Excess-3 code}

  3. BCD code\text{BCD code}

  4. Gray code\text{Gray code}

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Answer: 4. Gray code\text{Gray code}

Explanation:

  • Gray code ensures that only one bit changes between consecutive numbers.

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