# set-8 ### 151. Which is the early form of non-volatile memory? 1. Magnetic core memory 2. Ferrimagnetic memory 3. Anti-magnetic memory 4. Anti-ferromagnetic
Show me the answer **Answer:** 1. Magnetic core memory **Explanation:** * **Magnetic core memory** was one of the earliest forms of **non-volatile memory**. It used tiny magnetic cores to store data and was widely used in early computers before the advent of semiconductor memory.
### 152. Which of the following memories has more speed in accessing data? 1. SRAM 2. DRAM 3. EPROM 4. EEPROM
Show me the answer **Answer:** 1. SRAM **Explanation:** * **SRAM (Static Random Access Memory)** is faster than **DRAM (Dynamic Random Access Memory)** because it does not require periodic refreshing. SRAM is used in cache memory due to its high speed.
### 153. In which memory, the signals are multiplexed? 1. DRAM 2. SRAM 3. EPROM 4. EEPROM
Show me the answer **Answer:** 1. DRAM **Explanation:** * In **DRAM**, the address signals are **multiplexed** to reduce the number of pins required. This means that the row and column addresses are sent over the same set of pins at different times.
### 154. How many main signals are used with memory chips? 1. 2 2. 4 3. 6 4. 8
Show me the answer **Answer:** 2. 4 **Explanation:** * The main signals used with memory chips are typically **4**: 1. **Address Bus** (to specify the memory location). 2. **Data Bus** (to transfer data). 3. **Read/Write Signal** (to control read/write operations). 4. **Chip Select Signal** (to enable the memory chip).
### 155. What is the purpose of the address bus? 1. To provide data to and from the chip 2. To select a specified chip 3. To select a location within the memory chip 4. To select a read/write cycle
Show me the answer **Answer:** 3. To select a location within the memory chip **Explanation:** * The **address bus** is used to specify the **memory location** within the memory chip that needs to be accessed for reading or writing data.
### 156. Which are the two main types of processor connection to the motherboard? 1. Sockets and slots 2. Sockets and pins 3. Slots and pins 4. Pins and ports
Show me the answer **Answer:** 1. Sockets and slots **Explanation:** * Processors are connected to the motherboard using either **sockets** (for CPUs that are inserted into a socket) or **slots** (for CPUs that are inserted into a slot, such as older Intel Pentium II/III processors).
### 157. Which of the following has programmable hardware? 1. Microcontroller 2. Microprocessor 3. Coprocessor 4. FPGA
Show me the answer **Answer:** 4. FPGA **Explanation:** * **FPGA (Field-Programmable Gate Array)** is a type of programmable hardware that can be configured to perform specific tasks after manufacturing. It is widely used in prototyping and custom hardware design.
### 158. Who invented TriMedia processor? 1. Intel 2. IBM 3. Apple 4. NXP Semiconductor
Show me the answer **Answer:** 4. NXP Semiconductor **Explanation:** * The **TriMedia processor** was developed by **NXP Semiconductor** (formerly Philips Semiconductors). It is designed for multimedia applications and digital signal processing.
### 159. Which of the following have a 16 Mbytes addressed range? 1. PowerPC 2. M68000 3. DSP56000 4. TMS 320
Show me the answer **Answer:** 2. M68000 **Explanation:** * The **Motorola 68000 (M68000)** processor has a **24-bit address bus**, allowing it to address up to **16 MB** of memory.
### 160. How can delays destroy the accuracy in algorithms? 1. Delays can cause timing errors in real-time systems. 2. Delays can cause data corruption. 3. Delays can cause memory leaks. 4. Delays can cause power failures.
Show me the answer **Answer:** 1. Delays can cause timing errors in real-time systems. **Explanation:** * In **real-time systems**, delays can lead to **timing errors**, causing the system to miss deadlines or produce incorrect results. This is especially critical in systems where timing is crucial, such as control systems or signal processing.
### 161. How many numbers of ways are possible for allocating the memory to the modular blocks? 1. 1 2. 2 3. 3 4. 4
Show me the answer **Answer:** 3. 3 **Explanation:** * There are **three main ways** to allocate memory to modular blocks: 1. **Static Allocation:** Memory is allocated at compile time. 2. **Stack Allocation:** Memory is allocated dynamically during runtime using a stack. 3. **Heap Allocation:** Memory is allocated dynamically during runtime using a heap.
### 162. Which of the following is replaced with the absolute addressing mode? 1. Relative addressing mode 2. Protective addressing mode 3. Virtual addressing mode 4. Temporary addressing mode
Show me the answer **Answer:** 1. Relative addressing mode **Explanation:** * **Relative addressing mode** is often replaced with **absolute addressing mode** when the exact memory location is known. Absolute addressing directly specifies the memory address, while relative addressing uses an offset from a base address.
### 163. What is the main purpose of the memory management unit? 1. Address translation 2. Large storage 3. Reduce the size 4. Provides address space
Show me the answer **Answer:** 1. Address translation **Explanation:** * The **Memory Management Unit (MMU)** is responsible for **address translation**, converting virtual addresses used by programs into physical addresses used by the memory system. This enables features like virtual memory and memory protection.
### 164. Which of the following provides stability to the multitasking system? 1. Memory 2. DRAM 3. SRAM 4. Memory partitioning
Show me the answer **Answer:** 4. Memory partitioning **Explanation:** * **Memory partitioning** provides stability to multitasking systems by dividing memory into separate sections for different tasks. This prevents tasks from interfering with each other and ensures efficient memory usage.
### 165. Which of the following is used by the M68000 family? 1. M68000 2. 80386 3. 8086 4. 80286
Show me the answer **Answer:** 1. M68000 **Explanation:** * The **M68000 family** refers to the **Motorola 68000** series of processors, which were widely used in early personal computers and workstations.
### 166. What can be done for the fine grain protection of the processor? 1. Add extra description bit 2. Add error signal 3. Add wait stage 4. Remains unchanged
Show me the answer **Answer:** 1. Add extra description bit **Explanation:** * **Fine-grain protection** can be achieved by adding **extra description bits** to memory addresses. These bits can specify access permissions (e.g., read-only, execute-only) for specific memory regions, enhancing security and stability.
### 167. Which of the following technique is used by the UNIX operating system? 1. Logical address memory 2. Physical address memory 3. Virtual memory technique 4. Translational address
Show me the answer **Answer:** 3. Virtual memory technique **Explanation:** * The **UNIX operating system** uses the **virtual memory technique** to manage memory. This allows processes to use more memory than physically available by swapping data between RAM and disk storage.
### 168. Which of the following consist two lines of legs on both sides of a plastic or ceramic body? 1. SIMM 2. DIMM 3. Zig-zag 4. Dual in-line
Show me the answer **Answer:** 4. Dual in-line **Explanation:** * **Dual in-line** refers to components (e.g., memory modules) that have two parallel rows of pins or legs on both sides of a plastic or ceramic body. Examples include **DIP (Dual In-line Package)** chips.
### 169. Which of the following can transfer multiple bits of data simultaneously? 1. Serial port 2. Sequential port 3. Concurrent unit 4. Parallel port
Show me the answer **Answer:** 4. Parallel port **Explanation:** * A **parallel port** can transfer **multiple bits of data simultaneously** over multiple wires. This makes it faster than a serial port, which transfers data one bit at a time.
### 170. Which of the following are interfaced as inputs to the parallel ports? 1. LEDs 2. Switch 3. Alphanumeric display 4. Seven segmented display
Show me the answer **Answer:** 2. Switch **Explanation:** * **Switches** are commonly interfaced as **inputs** to parallel ports. They provide binary input (on/off) to the system, which can be read by the CPU.
### 171. Which of the following are interfaced as the outputs to the parallel ports? 1. Keyboards 2. Switches 3. LEDs 4. Knobs
Show me the answer **Answer:** 3. LEDs **Explanation:** * **LEDs** are commonly interfaced as **outputs** to parallel ports. They can be controlled by the CPU to indicate status or provide visual feedback.
### 172. How many registers are there to control the parallel port in the basic form? 1. 1 2. 3 3. 2 4. 5
Show me the answer **Answer:** 3. 2 **Explanation:** * In the basic form, a parallel port is controlled by **two registers**: 1. **Data Register:** Holds the data to be sent or received. 2. **Control Register:** Manages the control signals for the port.
### 173. Which of the following is also known as tri-state? 1. Output port 2. Input port 3. Parallel port 4. Output-input port
Show me the answer **Answer:** 1. Output port **Explanation:** * An **output port** is often referred to as **tri-state** because it can be in one of three states: high (1), low (0), or high-impedance (disconnected). This allows multiple devices to share a common bus without interference.
### 174. How buffers are enabled in the parallel ports? 1. By the data register 2. By data direction register 3. By individual control register 4. By data and individual control register
Show me the answer **Answer:** 2. By data direction register **Explanation:** * Buffers in parallel ports are enabled by the **data direction register**. This register determines whether each pin on the port is configured as an input or output.
### 175. Which of the following registers offers high impedance? 1. Data register 2. Data direction register 3. Individual control bit 4. Data register and data direction register
Show me the answer **Answer:** 3. Individual control bit **Explanation:** * The **individual control bit** in a parallel port can be used to set a pin to **high impedance** (disconnected) state, allowing it to act as an open circuit.
### 176. Which of the following can be used as a chip select? 1. Multifunction I/O port 2. Parallel port 3. DMA port 4. Memory port
Show me the answer **Answer:** 1. Multifunction I/O port **Explanation:** * A **multifunction I/O port** can be used as a **chip select** signal to enable or disable a specific chip in a system. This is commonly used in memory and peripheral interfacing.
### 177. Which of the following is necessary for the parallel input-output port? 1. Inductor 2. Pull-up resistor 3. Push-up resistor 4. Capacitor
Show me the answer **Answer:** 2. Pull-up resistor **Explanation:** * **Pull-up resistors** are necessary for parallel input-output ports to ensure that the input pins have a defined logic level (high or low) when no external signal is applied. This prevents floating inputs.
### 178. Which of the following can be described as general-purpose? 1. Multifunction I/O port 2. Input port 3. DMA port 4. Output port
Show me the answer **Answer:** 1. Multifunction I/O port **Explanation:** * A **multifunction I/O port** is **general-purpose** because it can be configured to perform various functions, such as input, output, or bidirectional communication, depending on the system's requirements.
### 179. What does UART stand for? 1. Universal asynchronous receiver transmitter 2. Unique asynchronous receiver transmitter 3. Universal address receiver transmitter 4. Unique address receiver transmitter
Show me the answer **Answer:** 1. Universal asynchronous receiver transmitter **Explanation:** * **UART** stands for **Universal Asynchronous Receiver Transmitter**. It is a hardware device used for serial communication, converting parallel data from the CPU into serial data for transmission and vice versa.
### 180. How is data detected in a UART? 1. Counter 2. Timer 3. Clock 4. First bit
Show me the answer **Answer:** 3. Clock **Explanation:** * In a **UART**, data is detected using a **clock signal**. The receiver synchronizes with the transmitter's clock to sample the incoming data bits at the correct time.
### 181. Which of the signal is set to one, if no data is transmitted? 1. READY 2. START 3. STOP 4. TXD
Show me the answer **Answer:** 4. TXD **Explanation:** * The **TXD (Transmit Data)** signal is set to **1** (high) when no data is being transmitted. This is known as the **idle state** in UART communication.
### 182. What rate can define the timing in the UART? 1. Bit rate 2. Baud rate 3. Speed rate 4. Voltage rate
Show me the answer **Answer:** 2. Baud rate **Explanation:** * The **baud rate** defines the timing in UART communication. It specifies the number of signal changes (symbols) per second and determines the speed of data transmission.
### 183. How is baud rate supplied? 1. Baud rate voltage 2. External timer 3. Peripheral 4. Internal timer
Show me the answer **Answer:** 2. External timer **Explanation:** * The **baud rate** is typically supplied by an **external timer** or oscillator. This ensures accurate timing for data transmission and reception in UART communication.
### 184. Which is the most commonly used UART? 1. 8253 2. 8254 3. 8259 4. 8250
Show me the answer **Answer:** 4. 8250 **Explanation:** * The **8250 UART** is the most commonly used UART chip. It is widely used in PCs and embedded systems for serial communication.
### 185. Which company developed 16450? 1. Philips 2. Intel 3. National semiconductor 4. IBM
Show me the answer **Answer:** 3. National semiconductor **Explanation:** * The **16450 UART** was developed by **National Semiconductor**. It is an improved version of the 8250 UART, offering higher performance and additional features.
### 186. What does ADS indicate in 8250 UART? 1. Address signal 2. Address terminal signal 3. Address strobe signal 4. Address generating signal
Show me the answer **Answer:** 3. Address strobe signal **Explanation:** * In the **8250 UART**, **ADS (Address Strobe Signal)** is used to indicate that a valid address is present on the address bus. It is used to latch the address for further processing.
### 187. Which of the following signals are active low in the 8250 UART? 1. BAUDOUT 2. DDIS 3. INTR 4. MR
Show me the answer **Answer:** 1. BAUDOUT **Explanation:** * In the **8250 UART**, the **BAUDOUT** signal is **active low**. It is used to output the baud rate clock for external synchronization.
### 188. Which of the signal can control bus arbitration logic in 8250? 1. MR 2. DDIS 3. INTR 4. RCLK
Show me the answer **Answer:** 2. DDIS **Explanation:** * The **DDIS (Driver Disable)** signal in the **8250 UART** can control bus arbitration logic. It is used to disable the data bus drivers when the CPU is not accessing the UART.
### 189. Which of the following can be used for long distance communication? 1. I2C 2. Parallel port 3. SPI 4. RS232
Show me the answer **Answer:** 4. RS232 **Explanation:** * **RS232** is a serial communication standard that can be used for **long-distance communication**. It is commonly used for connecting computers to modems and other peripheral devices.
### 190. Which of the following can affect the long distance communication? 1. Clock 2. Resistor 3. Inductor 4. Capacitor
Show me the answer **Answer:** 1. Clock **Explanation:** * The **clock signal** is critical in long-distance communication because it synchronizes data transmission between devices. Any issues with the clock signal (e.g., jitter or skew) can affect communication reliability.
### 191. Which are the serial ports of the IBM PC? 1. COM1 2. COM4 and COM1 3. COM1 and COM2 4. COM3
Show me the answer **Answer:** 3. COM1 and COM2 **Explanation:** * The **IBM PC** typically has two serial ports: **COM1** and **COM2**. These ports are used for serial communication with devices like modems and mice.
### 192. Which of the following can provide hardware handshaking? 1. RS232 2. Parallel port 3. Counter 4. Timer
Show me the answer **Answer:** 1. RS232 **Explanation:** * **RS232** supports **hardware handshaking** using signals like RTS (Request to Send) and CTS (Clear to Send). This ensures reliable data transfer by controlling the flow of data between devices.
### 193. Which of the following have an asynchronous data transmission? 1. SPI 2. RS232 3. Parallel port 4. I2C
Show me the answer **Answer:** 2. RS232 **Explanation:** * **RS232** uses **asynchronous data transmission**, where data is sent without a shared clock signal. Instead, start and stop bits are used to synchronize the transmission.
### 194. How many areas does the serial interface have? 1. 1 2. 3 3. 2 4. 4
Show me the answer **Answer:** 3. 2 **Explanation:** * The **serial interface** typically has **two areas**: 1. **Data transmission area:** Handles the actual data transfer. 2. **Control area:** Manages handshaking and flow control.
### 195. The RS232 is also known as 1. UART 2. SPI 3. Physical interface 4. Electrical interface
Show me the answer **Answer:** 4. Electrical interface **Explanation:** * **RS232** is primarily an **electrical interface standard** that defines the voltage levels, signal timing, and connector types for serial communication.
### 196. How much voltage does the MC1489 can take? 1. 12V 2. 5V 3. 3.3V 4. 2.2V
Show me the answer **Answer:** 2. 5V **Explanation:** * The **MC1489** is a line receiver IC that operates at **5V**. It is commonly used in RS232 communication to convert RS232 voltage levels to TTL levels.
### 197. Which of the following is not a serial protocol? 1. SPI 2. I2C 3. Serial port 4. RS232
Show me the answer **Answer:** 3. Serial port **Explanation:** * A **serial port** is a physical interface, not a protocol. Protocols like **SPI**, **I2C**, and **RS232** define the rules for data transmission over a serial connection.
### 198. Which of the following is an ideal interface for LCD controllers? 1. SPI 2. Parallel port 3. Serial port 4. M-Bus
Show me the answer **Answer:** 1. SPI **Explanation:** * **SPI (Serial Peripheral Interface)** is an ideal interface for **LCD controllers** because it provides high-speed, synchronous communication with minimal wiring.
### 199. Which of the following works by dividing the processor’s time? 1. Single task operating system 2. Multitask operating system 3. Kernel 4. Applications
Show me the answer **Answer:** 2. Multitask operating system **Explanation:** * A **multitask operating system** divides the processor's time among multiple tasks or processes. This allows multiple applications to run concurrently, improving system efficiency.
### 200. Which of the following decides which task can have the next time slot? 1. Single task operating system 2. Applications 3. Kernel 4. Software
Show me the answer **Answer:** 3. Kernel **Explanation:** * The **kernel** of an operating system is responsible for **task scheduling**. It decides which task gets the next time slot based on priority, fairness, and other scheduling algorithms.