> For the complete documentation index, see [llms.txt](https://nec-license.gitbook.io/books/llms.txt). Markdown versions of documentation pages are available by appending `.md` to page URLs; this page is available as [Markdown](https://nec-license.gitbook.io/books/4.-computer-organization-and-embedded-system/mcqs/set-5.md).

# set-5

#### 201. Property of locality of reference may fail if a program has

1. Many conditional jumps
2. Many operands
3. Many unconditional jumps
4. All of the above

<details>

<summary>Show me the answer</summary>

**Answer:** 4. All of the above

**Explanation:**

* Locality of reference may fail if a program has many conditional jumps, operands, or unconditional jumps, as these can disrupt the predictable access patterns.

</details>

#### 202. In Reverse Polish notation, expression A*B+C*D is written as

1. AB\*CD++
2. AB*CD+*
3. A\*BCD++
4. A*B*CD+

<details>

<summary>Show me the answer</summary>

**Answer:** 1. AB\*CD++

**Explanation:**

* In Reverse Polish Notation (RPN), the expression A*B+C*D is written as AB\*CD++.

</details>

#### 203. SIMD represents an organization that\_\_\_\_\_\_.

1. Refers to a computer system capable of processing several programs at the same time.
2. Represents organization of single computer containing a control unit, processor unit and a memory unit.
3. Includes many processing units under the supervision of a common control unit
4. None of the above

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Includes many processing units under the supervision of a common control unit

**Explanation:**

* SIMD (Single Instruction, Multiple Data) involves multiple processing units executing the same instruction on different data under a common control unit.

</details>

#### 204. Floating point representation is used to store

1. Boolean values
2. Real integers
3. Whole numbers
4. Integers

<details>

<summary>Show me the answer</summary>

**Answer:** 2. Real integers

**Explanation:**

* Floating point representation is used to store real numbers, including integers and fractions.

</details>

#### 205. Suppose that a bus has 16 data lines and required 4 cycles of 250 nano seconds each to transfer data. The bandwidth of this bus would be 2 Megabytes/sec. If the cycle time of the bus was reduced to 125 nsecs and the number of cycles required for transfer stayed the same what would the bandwidth of the bus?

1. 1 Megabyte/sec
2. 8 Megabytes/sec
3. 4 Megabytes/sec
4. 2 Megabytes/sec

<details>

<summary>Show me the answer</summary>

**Answer:** 3. 4 Megabytes/sec

**Explanation:**

* Reducing the cycle time to 125 nsecs doubles the bandwidth, so the new bandwidth is 4 Megabytes/sec.

</details>

#### 206. Assembly language

1. Uses alphabetic codes in place of binary numbers used in machine language
2. Is the easiest language to write programs
3. Need not be translated into machine language
4. None of the above

<details>

<summary>Show me the answer</summary>

**Answer:** 1. Uses alphabetic codes in place of binary numbers used in machine language

**Explanation:**

* Assembly language uses mnemonics (alphabetic codes) to represent machine instructions, making it easier to write programs compared to binary machine language.

</details>

#### 207. In computers, subtraction is generally carried out by

1. 9's complement
2. 1's complement
3. 10's complement
4. 2's complement

<details>

<summary>Show me the answer</summary>

**Answer:** 4. 2's complement

**Explanation:**

* Subtraction in computers is typically performed using the 2's complement method.

</details>

#### 208. The amount of time required to read a block of data from a disk into memory is composed of seek time, rotational latency, and transfer time. Rotational latency refers to

1. The time it takes for the platter to make a full rotation
2. The time it takes for the read-write head to move into position over the appropriate track
3. The time it takes for the platter to rotate the correct sector under the head
4. None of the above

<details>

<summary>Show me the answer</summary>

**Answer:** 3. The time it takes for the platter to rotate the correct sector under the head

**Explanation:**

* Rotational latency is the time taken for the disk to rotate the desired sector under the read-write head.

</details>

#### 209. What characteristic of RAM memory makes it not suitable for permanent storage?

1. Too slow
2. It is volatile
3. Unreliable
4. Too bulky

<details>

<summary>Show me the answer</summary>

**Answer:** 2. It is volatile

**Explanation:**

* RAM is volatile, meaning it loses its data when power is turned off, making it unsuitable for permanent storage.

</details>

#### 210. Computers use addressing mode techniques for:

1. Giving programming versatility to the user by providing facilities as pointers to memory counters for loop control
2. To reduce no. of bits in the field of instruction
3. Specifying rules for modifying or interpreting address field of the instruction
4. All the above

<details>

<summary>Show me the answer</summary>

**Answer:** 4. All the above

**Explanation:**

* Addressing modes provide versatility, reduce instruction size, and specify how address fields are interpreted.

</details>

#### 211. The circuit used to store one bit of data is known as

1. Register
2. Decoder
3. Encoder
4. Flip-flop

<details>

<summary>Show me the answer</summary>

**Answer:** 4. Flip-flop

**Explanation:**

* A flip-flop is a basic circuit used to store one bit of data.

</details>

#### 212. (2FAOC)16 is equivalent to:

1. (195 084)10
2. Both A and B
3. (001011111010 0000 1100)
4. None of these

<details>

<summary>Show me the answer</summary>

**Answer:** 3. (001011111010 0000 1100)

**Explanation:**

* The hexadecimal value (2FAOC)16 is equivalent to the binary value (001011111010 0000 1100).

</details>

#### 213. The average time required to reach a storage location in memory and obtain its contents is called the:

1. Seek time
2. Turnaround time
3. Access time
4. Transfer time

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Access time

**Explanation:**

* Access time is the total time taken to reach a memory location and retrieve its contents.

</details>

#### 214. Which of the following is not a weighted code?

1. Decimal number system
2. Binary Number System
3. Excess-3 code
4. None of the above

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Excess-3 code

**Explanation:**

* Excess-3 code is a non-weighted code, unlike the decimal and binary systems.

</details>

#### 215. \_\_\_\_\_\_ register keeps track of the instructions stored in program stored in memory.

1. AR (Address Register)
2. PC (Program Counter)
3. XR (Index Register)
4. AC (Accumulator)

<details>

<summary>Show me the answer</summary>

**Answer:** 2. PC (Program Counter)

**Explanation:**

* The Program Counter (PC) keeps track of the address of the next instruction to be executed.

</details>

#### 216. The addressing mode used in an instruction of the form ADD X Y, is

1. Absolute
2. Index
3. Indirect
4. None of the above

<details>

<summary>Show me the answer</summary>

**Answer:** 1. Absolute

**Explanation:**

* The instruction `ADD X Y` uses absolute addressing mode.

</details>

#### 217. In a memory-mapped I/O system, which of the following will not be there?

1. LDA
2. ADD
3. IN
4. OUT

<details>

<summary>Show me the answer</summary>

**Answer:** 3. IN

**Explanation:**

* In memory-mapped I/O, the `IN` instruction is not used as I/O devices are accessed like memory locations.

</details>

#### 218. In a vectored interrupt:

1. The branch address is assigned to a fixed location in memory
2. The interrupting source supplies the branch information to the processor through an interrupt vector
3. The branch address is obtained from a register in the processor
4. None of the above

<details>

<summary>Show me the answer</summary>

**Answer:** 2. The interrupting source supplies the branch information to the processor through an interrupt vector

**Explanation:**

* In a vectored interrupt, the interrupting device provides the address of the interrupt service routine (ISR) to the processor.

</details>

#### 219. Cache memory acts between

1. CPU and RAM
2. CPU and HARDSIK
3. RAM and ROM
4. None of the above

<details>

<summary>Show me the answer</summary>

**Answer:** 1. CPU and RAM

**Explanation:**

* Cache memory acts as a buffer between the CPU and RAM to speed up data access.

</details>

#### 220. Write Through technique is used in which memory for updating the data:

1. Virtual memory
2. Auxiliary memory
3. Main memory
4. Cache memory

<details>

<summary>Show me the answer</summary>

**Answer:** 4. Cache memory

**Explanation:**

* Write Through technique updates both the cache and main memory simultaneously.

</details>

#### 221. Generally Dynamic RAM is used as main memory in a computer system as it

1. Consumes less power
2. Has lower cell density
3. Has higher speed
4. Needs refreshing circuitry

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Has higher speed

**Explanation:**

* Dynamic RAM (DRAM) is used as main memory due to its higher speed and lower cost compared to SRAM.

</details>

#### 222. In signed-magnitude binary division, if the dividend is (11100)₂ and divisor is (10011)₂ then the result is

1. (00100)₂
2. (11001)₂
3. (10100)₂
4. (01100)₂

<details>

<summary>Show me the answer</summary>

**Answer:** 2. (11001)₂

**Explanation:**

* The result of the division is (11001)₂.

</details>

#### 223. Virtual memory consists up:

1. Static RAM
2. Magnetic memory
3. Dynamic RAM
4. None of the above

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Dynamic RAM

**Explanation:**

* Virtual memory typically uses Dynamic RAM (DRAM) as part of its implementation.

</details>

#### 224. In a program using subroutine call instruction, it is necessary

1. Initialize program counter
2. Reset the microprocessor
3. Clear the accumulator
4. Clear the instruction register

<details>

<summary>Show me the answer</summary>

**Answer:** 1. Initialize program counter

**Explanation:**

* The program counter must be initialized to the correct address when using subroutine calls.

</details>

#### 225. When CPU is executing a Program that is part of the Operating System, it is said to be in

1. Interrupt mode
2. Half mode
3. System mode
4. Simplex mode

<details>

<summary>Show me the answer</summary>

**Answer:** 3. System mode

**Explanation:**

* When the CPU executes operating system code, it is in system mode.

</details>

#### 226. A-Flip Flop can be converted into T-Flip Flop by using additional logic circuit

1. D = T . Qn
2. D = T . Qn
3. D = T
4. D = TAQn

<details>

<summary>Show me the answer</summary>

**Answer:** 1. D = T . Qn

**Explanation:**

* A D flip-flop can be converted into a T flip-flop using the logic D = T . Qn.

</details>

#### 227. Logic X-OR operation of (4ACO) H& (B53F) H results

1. AACB
2. FFFF
3. 0000
4. ABCD

<details>

<summary>Show me the answer</summary>

**Answer:** 2. FFFF

**Explanation:**

* The XOR operation of (4ACO) and (B53F) results in FFFF.

</details>

#### 228. An n-bit microprocessor has

1. n-bit program counter
2. n-bit ALU
3. n-bit address register
4. n-bit instruction register

<details>

<summary>Show me the answer</summary>

**Answer:** 4. n-bit instruction register

**Explanation:**

* An n-bit microprocessor typically has an n-bit instruction register.

</details>

#### 229. Cache memory works on the principle of:

1. Locality of data
2. Locality of reference
3. Locality of memory
4. Locality of reference and memory

<details>

<summary>Show me the answer</summary>

**Answer:** 2. Locality of reference

**Explanation:**

* Cache memory works on the principle of locality of reference, which predicts that recently accessed data is likely to be accessed again.

</details>

#### 230. The main memory in a Personal Computer (PC) is made of:

1. Cache memory
2. Dynamic RAM
3. Static RAM
4. Both 2 and 3

<details>

<summary>Show me the answer</summary>

**Answer:** 4. Both 2 and 3

**Explanation:**

* Main memory in PCs is typically made of Dynamic RAM (DRAM) and sometimes Static RAM (SRAM).

</details>

#### 231. The circuit converting binary data into decimal is

1. Encoder
2. Decoder
3. Multiplexer
4. Code converter

<details>

<summary>Show me the answer</summary>

**Answer:** 4. Code converter

**Explanation:**

* A code converter is used to convert binary data into decimal.

</details>

#### 232. PSW is saved in stack when there is a

1. Interrupt recognized
2. Execution of CALL instruction
3. Execution of RST instruction
4. All of these

<details>

<summary>Show me the answer</summary>

**Answer:** 4. All of these

**Explanation:**

* The Program Status Word (PSW) is saved in the stack during interrupts, CALL, and RST instructions.

</details>

#### 233. A combinational logic circuit which sends data coming from a single source to two or more separate destinations is:

1. Decoder
2. Multiplexer
3. Encoder
4. Demultiplexer

<details>

<summary>Show me the answer</summary>

**Answer:** 4. Demultiplexer

**Explanation:**

* A demultiplexer sends data from a single source to multiple destinations.

</details>

#### 234. In which addressing mode the operand is given explicitly in the instruction:

1. Absolute
2. Indirect
3. Immediate
4. Direct

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Immediate

**Explanation:**

* In immediate addressing mode, the operand is explicitly given in the instruction.

</details>

#### 235. The gray code equivalent of (1011)₂ is

1. 1101
2. 1110
3. 1010
4. 1111

<details>

<summary>Show me the answer</summary>

**Answer:** 2. 1110

**Explanation:**

* The Gray code equivalent of (1011)₂ is (1110).

</details>

#### 236. A system program that translates and executes an instruction simultaneously is:

1. Compiler
2. Assembler
3. Interpreter
4. Operating system

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Interpreter

**Explanation:**

* An interpreter translates and executes instructions line by line.

</details>

#### 237. When necessary, the results are transferred from the CPU to main memory by

1. I/O devices
2. Shift registers
3. CPU
4. None of the above

<details>

<summary>Show me the answer</summary>

**Answer:** 3. CPU

**Explanation:**

* The CPU transfers results to main memory when necessary.

</details>

#### 238. A successive A/D converter is:

1. A medium speed converter
2. A low speed converter
3. A high-speed converter
4. None of these

<details>

<summary>Show me the answer</summary>

**Answer:** 2. A low speed converter

**Explanation:**

* A successive approximation A/D converter is typically slower compared to other types.

</details>

#### 239. The memory unit that communicates directly with the CPU is called the

1. Main memory
2. Shared memory
3. Secondary memory
4. Auxiliary memory

<details>

<summary>Show me the answer</summary>

**Answer:** 1. Main memory

**Explanation:**

* Main memory communicates directly with the CPU.

</details>

#### 240. The average time required to reach a storage location in memory and obtains its content is called:

1. Latency time
2. Turnaround time
3. Access time
4. Response time

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Access time

**Explanation:**

* Access time is the average time required to reach a memory location and retrieve its contents.

</details>

#### 241. A k-bit field can specify:

1. 3(^k) register
2. K(^2) register
3. 2(^k) register
4. K(^3) register

<details>

<summary>Show me the answer</summary>

**Answer:** 3. 2(^k) register

**Explanation:**

* A k-bit field can specify 2(^k) different registers.

</details>

#### 242. The time interval between the adjacent bits is called:

1. Word-time
2. Turnaround time
3. Bit-time
4. Slice time

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Bit-time

**Explanation:**

* The time interval between adjacent bits is called bit-time.

</details>

#### 243. A group of bits that tell the computer to perform a specific operation is known as:

1. Instruction code
2. Accumulator
3. Micro–operation
4. Register

<details>

<summary>Show me the answer</summary>

**Answer:** 1. Instruction code

**Explanation:**

* An instruction code is a group of bits that specifies a particular operation.

</details>

#### 244. The load instruction is mostly used to designate a transfer from memory to a processor register known as:

1. Accumulator
2. Program counter
3. Instruction register
4. Memory address register

<details>

<summary>Show me the answer</summary>

**Answer:** 1. Accumulator

**Explanation:**

* The load instruction typically transfers data from memory to the accumulator.

</details>

#### 245. The communication between the components in a microcomputer takes place via:

1. I/O bus
2. Address bus
3. Data bus
4. Control lines

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Data bus

**Explanation:**

* The data bus is used for communication between components in a microcomputer.

</details>

#### 246. An instruction pipeline can be implemented by means of:

1. LIFO buffer
2. Stack
3. FIFO buffer
4. None of above

<details>

<summary>Show me the answer</summary>

**Answer:** 3. FIFO buffer

**Explanation:**

* An instruction pipeline is implemented using a FIFO (First In, First Out) buffer.

</details>

#### 247. Data input command is a just the opposite of a:

1. Test command
2. Data output
3. Control command
4. Data channel

<details>

<summary>Show me the answer</summary>

**Answer:** 2. Data output

**Explanation:**

* Data input is the opposite of data output.

</details>

#### 248. The operation executed on data stored in registers is called:

1. Macro–operation
2. Bit-operation
3. Micro–operation
4. Byte-operation

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Micro–operation

**Explanation:**

* Operations on data stored in registers are called micro-operations.

</details>

#### 249. MRI indicates:

1. Memory Reference Information
2. Memory Register Instruction
3. Memory Reference Instruction
4. Memory Register Information

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Memory Reference Instruction

**Explanation:**

* MRI stands for Memory Reference Instruction.

</details>

#### 250. Self-contained sequence of instructions that performs a given computational task is:

1. Function
2. Subroutine
3. Procedure
4. Routine

<details>

<summary>Show me the answer</summary>

**Answer:** 2. Subroutine

**Explanation:**

* A subroutine is a self-contained sequence of instructions that performs a specific task.

</details>