set-7

131. Which of the processor has an internal coprocessor?

  1. 8087

  2. 80287

  3. 80387

  4. 80486DX

Show me the answer

Answer: 4. 80486DX

Explanation:

  • The 80486DX microprocessor has an internal coprocessor for floating-point arithmetic. This integration eliminates the need for a separate coprocessor chip, improving performance and reducing cost.

132. What are the two major sections in a coprocessor?

  1. Control unit and numeric control unit

  2. Integer unit and control unit

  3. Floating point unit and coprocessor unit

  4. Coprocessor unit and numeric control unit

Show me the answer

Answer: 1. Control unit and numeric control unit

Explanation:

  • A coprocessor typically consists of two major sections:

    • Control unit: Manages the overall operation of the coprocessor.

    • Numeric control unit: Handles the execution of numeric and floating-point operations.

133. Which are the processors based on RISC?

  1. SPARC

  2. 80386

  3. MC68030

  4. MC68020

Show me the answer

Answer: 1. SPARC

Explanation:

  • SPARC (Scalable Processor Architecture) is a RISC-based processor architecture developed by Sun Microsystems. It is designed for high performance and scalability, making it suitable for workstations and servers.

134. What is 80/20 rule?

  1. 80% instruction is generated and 20% instruction is executed

  2. 80% instruction is executed and 20% instruction is generated

  3. 80% instruction is executed and 20% instruction is not executed

  4. 80% instruction is generated and 20% instructions are not generated

Show me the answer

Answer: 2. 80% instruction is executed and 20% instruction is generated

Explanation:

  • The 80/20 rule in computer architecture states that 80% of the execution time is spent on 20% of the instructions. This observation is used to optimize performance by focusing on the most frequently executed instructions.

135. Which of the architecture is more complex?

  1. SPARC

  2. MC68030

  3. MC68030

  4. 8086

Show me the answer

Answer: 1. SPARC

Explanation:

  • SPARC architecture is more complex compared to the 8086 and MC68030. It is a RISC-based architecture designed for high performance and scalability, with advanced features like pipelining and superscalar execution.

136. Which is the first company who defined RISC architecture?

  1. Intel

  2. IBM

  3. Motorola

  4. MIPS

Show me the answer

Answer: 2. IBM

Explanation:

  • IBM was one of the first companies to define and develop RISC (Reduced Instruction Set Computer) architecture. Their work laid the foundation for modern RISC processors.

137. Which of the following processors execute its instruction in a single cycle?

  1. 8086

  2. 8088

  3. 8087

  4. MIPS R2000

Show me the answer

Answer: 4. MIPS R2000

Explanation:

  • The MIPS R2000 is a RISC processor that executes most instructions in a single clock cycle. This is a key feature of RISC architectures, which aim to simplify instruction execution for higher performance.

138. How is memory accessed in RISC architecture?

  1. Load and store instruction

  2. Opcode instruction

  3. Memory instruction

  4. Bus instruction

Show me the answer

Answer: 1. Load and store instruction

Explanation:

  • In RISC architecture, memory is accessed using load and store instructions. These instructions move data between memory and registers, while all other operations are performed on registers.

139. Which of the following has a Harvard architecture?

  1. EDSAC

  2. SSEM

  3. PIC

  4. CSIRAC

Show me the answer

Answer: 3. PIC

Explanation:

  • The PIC microcontroller uses Harvard architecture, which separates the memory for instructions and data. This allows simultaneous access to both, improving performance.

140. Which of the following statements are true for von Neumann architecture?

  1. Shared bus between the program memory and data memory

  2. Separate bus between the program memory and data memory

  3. External bus for program memory and data memory

  4. External bus for data memory only

Show me the answer

Answer: 1. Shared bus between the program memory and data memory

Explanation:

  • Von Neumann architecture uses a shared bus for both program memory and data memory. This simplifies the design but can create a bottleneck, as instructions and data cannot be accessed simultaneously.

141. What is CAM stands for?

  1. Content-addressable memory

  2. Complex addressable memory

  3. Computing addressable memory

  4. Concurrently addressable memory

Show me the answer

Answer: 1. Content-addressable memory

Explanation:

  • CAM (Content-Addressable Memory) is a type of memory that allows data to be accessed based on its content rather than its address. It is used in applications like cache memory and network routers.

142. Which of the following processors uses Harvard architecture?

  1. TEXAS TMS320

  2. 80386

  3. 80286

  4. 8086

Show me the answer

Answer: 1. TEXAS TMS320

Explanation:

  • The TEXAS TMS320 series of digital signal processors (DSPs) uses Harvard architecture, which separates instruction and data memory for improved performance in signal processing tasks.

143. Which company further develops the study of RISC architecture?

  1. Intel

  2. Motorola

  3. University of Berkeley

  4. MIPS

Show me the answer

Answer: 3. University of Berkeley

Explanation:

  • The University of Berkeley played a significant role in further developing RISC architecture. Their research led to the creation of the RISC-I and RISC-II processors, which influenced modern RISC designs.

144. Princeton architecture is also known as

  1. Von Neumann architecture

  2. Harvard

  3. RISC

  4. CISC

Show me the answer

Answer: 1. Von Neumann architecture

Explanation:

  • Princeton architecture is another name for Von Neumann architecture, which uses a shared bus for both instructions and data. It is named after the Princeton Institute for Advanced Study, where it was developed.

145. Who coined the term RISC?

  1. David Patterson

  2. Von Neumann

  3. Michael J Flynn

  4. Harvard

Show me the answer

Answer: 1. David Patterson

Explanation:

  • David Patterson, a computer scientist at the University of California, Berkeley, coined the term RISC (Reduced Instruction Set Computer) in the early 1980s. His work laid the foundation for modern RISC architectures.

146. Which of the following is an 8-bit RISC Harvard architecture?

  1. AVR

  2. Zilog80

  3. 8051

  4. Motorola 6800

Show me the answer

Answer: 1. AVR

Explanation:

  • The AVR microcontroller is an 8-bit RISC processor with Harvard architecture. It is widely used in embedded systems due to its simplicity and efficiency.

147. Which of the following processors has CISC architecture?

  1. AVR

  2. Atmel

  3. Blackfin

  4. Zilog Z80

Show me the answer

Answer: 4. Zilog Z80

Explanation:

  • The Zilog Z80 is a CISC (Complex Instruction Set Computer) processor. It has a large instruction set and is known for its use in early personal computers and embedded systems.

148. Which is the most basic non-volatile memory?

  1. Flash memory

  2. PROM

  3. EPROM

  4. ROM

Show me the answer

Answer: 4. ROM

Explanation:

  • ROM (Read-Only Memory) is the most basic form of non-volatile memory. It retains data even when power is off and is used to store firmware and bootloaders.

149. Who has invented flash memory?

  1. Dr. Fujio Masuoka

  2. John Ellis

  3. Josh Fisher

  4. John Ruttenberg

Show me the answer

Answer: 1. Dr. Fujio Masuoka

Explanation:

  • Dr. Fujio Masuoka, a Japanese engineer, invented flash memory while working at Toshiba in the 1980s. Flash memory is widely used in USB drives, SSDs, and memory cards.

150. Which of the following is serial access memory?

  1. RAM

  2. Flash memory

  3. Shifters

  4. ROM

Show me the answer

Answer: 3. Shifters

Explanation:

  • Shifters are a type of serial access memory where data is accessed sequentially, one bit at a time. This is in contrast to random access memory (RAM), where data can be accessed in any order.

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