set-12

551. Parity systems are defined as either ______ or ______ and will add an extra ______ to the digital information being transmitted.

  1. Positive, negative, byte

  2. Odd, even, bit

  3. Upper, lower, digit

  4. On, off, decimal

Show me the answer

Answer: 2. Odd, even, bit

Explanation:

  • Parity systems are defined as either odd or even and add an extra bit to the digital information.

  • Therefore, the correct answer is Odd, even, bit.

552. Which type of gate can be used to add two bits?

  1. EX-OR

  2. EX-NOR

  3. EX-NAND

  4. None of the above

Show me the answer

Answer: 1. EX-OR

Explanation:

  • An EX-OR gate can be used to add two bits.

  • Therefore, the correct answer is EX-OR.

553. Why is an exclusive-NOR gate also called an equality gate?

  1. The output is false if the inputs are equal.

  2. The output is true if the inputs are opposite.

  3. The output is true if the inputs are equal.

  4. None of the above

Show me the answer

Answer: 3. The output is true if the inputs are equal.

Explanation:

  • An EX-NOR gate is called an equality gate because its output is true when the inputs are equal.

  • Therefore, the correct answer is The output is true if the inputs are equal.

554. Show from the truth table how an exclusive-OR gate can be used to invert the data on one input if the other input is a special control function.

  1. Using A as the control, when ( A = 0, X ) is the same as B. When ( A = 1, X ) is the same as B.

  2. Using a as the control, when ( a = 0, X ) is the same as B. When ( A = 1, X ) is the inverse of B

  3. Using A as the control, when ( A = 0, X ) is the inverse of B. When ( A = 1, X ) is the same as B

  4. Using A as the control, when ( A = 0, X ) is the inverse of B. When ( A = 1, X ) is the inverse of B

Show me the answer

Answer: 2. Using a as the control, when ( a = 0, X ) is the same as B. When ( A = 1, X ) is the inverse of B

Explanation:

  • An EX-OR gate can be used to invert the data on one input if the other input is a control function.

  • When A = 0, X is the same as B, and when A = 1, X is the inverse of B.

  • Therefore, the correct answer is Using a as the control, when ( a = 0, X ) is the same as B. When ( A = 1, X ) is the inverse of B.

555. Determine odd parity for each of the following data words: 1011101 11110111 1001101

  1. P = 1, P = 1, P = 0

  2. P = 0, P = 0, P = 0,

  3. P = 1, P = 1, P = 1

  4. P = 0, P = 0, P = 1

Show me the answer

Answer: 4. P = 0, P = 0, P = 1

Explanation:

  • The odd parity for the data words 1011101, 11110111, and 1001101 is: P=0,P=0,P=1P = 0, P = 0, P = 1

  • Therefore, the correct answer is P = 0, P = 0, P = 1.

556. The Ex-NOR is sometimes called the ______.

  1. Parity gate

  2. Equality gate

  3. Inverted gate

  4. Parity gate or the equality gate

Show me the answer

Answer: 2. Equality gate

Explanation:

  • The EX-NOR gate is sometimes called the equality gate because it outputs 1 when the inputs are equal.

  • Therefore, the correct answer is Equality gate.

557. Determine the values of A, B, C, and D that make the sum term (A+B+C+D)( \overline{A} + \overline{B} + \overline{C} + D ) equal to zero.

  1. A = 1, B = 0, C = 0, D = 0

  2. A = 1, B = 0, C = 1, D = 0

  3. A = 0, B = 1, C = 0, D = 0

  4. A = 1, B = 0, C = 1, D = 1

Show me the answer

Answer: 2. A = 1, B = 0, C = 1, D = 0

Explanation:

  • The sum term (A+B+C+D)( \overline{A} + \overline{B} + \overline{C} + D ) equals 0 when: A=1,B=0,C=1,D=0A = 1, B = 0, C = 1, D = 0

  • Therefore, the correct answer is A = 1, B = 0, C = 1, D = 0.

558. An AND gate with schematic "bubbles" on its inputs performs the same function as a(n)______ gate.

  1. NOT

  2. OR

  3. NOR

  4. NAND

Show me the answer

Answer: 3. NOR

Explanation:

  • An AND gate with bubbles on its inputs performs the same function as a NOR gate.

  • Therefore, the correct answer is NOR.

559. For the SOP expression , how many 1s are in the truth table's output column

  1. 1

  2. 2

  3. 3

  4. 4

Show me the answer

Answer: 3. 3

Explanation:

  • For the given SOP expression, there are 3 1s in the truth table's output column.

  • Therefore, the correct answer is 3.

560. A truth table for the SOP expression has how many input combinations?

  1. 1

  2. 2

  3. 4

  4. 8

Show me the answer

Answer: 4. 8

Explanation:

  • A truth table for the SOP expression has 8 input combinations for 3 variables.

  • Therefore, the correct answer is 8.

561. How many gates would be required to implement the following Boolean expression before simplification? XY + X(X + Z) + Y(X + Z)

  1. 1

  2. 2

  3. 3

  4. 5

Show me the answer

Answer: 4. 5

Explanation:

  • The Boolean expression XY + X(X + Z) + Y(X + Z) requires 5 gates before simplification.

  • Therefore, the correct answer is 5.

562. In canonical SOP form, the number of min terms in logical expression , A + B'C is:

  1. 4

  2. 5

  3. 6

  4. 7

Show me the answer

Answer: 2. 5

Explanation:

  • The canonical SOP form of A + B'C has 5 min terms.

  • Therefore, the correct answer is 5.

563. How many gates would be required to implement the following Boolean expression after simplification? XY + X(X + Z) + Y(X + Z)

  1. 1

  2. 2

  3. 3

  4. 5

Show me the answer

Answer: 2. 2

Explanation:

  • After simplification, the Boolean expression XY + X(X + Z) + Y(X + Z) requires 2 gates.

  • Therefore, the correct answer is 2.

564. Which Boolean algebra property allows us to group operands in an expression in any order without affecting the results of the operation [for example, A + B = B + A]?

  1. Associative

  2. Commutative

  3. Boolean

  4. Distributive

Show me the answer

Answer: 2. Commutative

Explanation:

  • The commutative property allows operands to be grouped in any order without affecting the result.

  • Therefore, the correct answer is Commutative.

565. Applying DeMorgan's theorem to the expression ((X+Y)+Z)( (X + Y) + \overline{Z} ), we get ______

  1. ( (X + Y)Z )

  2. ( (X' + Y')Z )

  3. ( (X + Y)Z' )

  4. ( (X' + Y')Z' )

Show me the answer

Answer: 1. ( (X + Y)Z )

Explanation:

  • Applying DeMorgan's theorem to ((X+Y)+Z)( (X + Y) + \overline{Z} ) gives: (X+Y)Z(X + Y)Z

  • Therefore, the correct answer is ( (X + Y)Z ).

566. Use Boolean algebra to find the most simplified SOP expression for F = ABD + CD + ACD + ABC + A BCD.

  1. F = ABD + ABC + CD

  2. F = CD + AD

  3. F = BC + AB

  4. F = AC + AD

Show me the answer

Answer: 1. F = ABD + ABC + CD

Explanation:

  • The simplified SOP expression for F = ABD + CD + ACD + ABC + A BCD is: F=ABD+ABC+CDF = ABD + ABC + CD

  • Therefore, the correct answer is F = ABD + ABC + CD.

567. In a sequential circuit the next state is determined ………and……

  1. State variable, current state

  2. Current state, flip-flop output

  3. Current state and external input

  4. Input and clock signal applied

Show me the answer

Answer: 3. Current state and external input

Explanation:

  • In a sequential circuit, the next state is determined by the current state and the external input.

  • Therefore, the correct answer is Current state and external input.

568. The divide-by-60 counter in digital clock is implemented by using two cascading counters:

  1. Mod -6, Mod-10

  2. Mod -50, Mod -10

  3. Mod 10, Mod-50

  4. Mod-50, Mod -6

Show me the answer

Answer: 1. Mod -6, Mod-10

Explanation:

  • A divide-by-60 counter is implemented using a Mod-6 and a Mod-10 counter.

  • Therefore, the correct answer is Mod -6, Mod-10.

569. The minimum time for which the input signal has to be maintained at the input of flip-flop is called ___ of the flip-flop.

  1. Set -up time

  2. Hold time

  3. Pulse interval time

  4. Pulse stability time (PST)

Show me the answer

Answer: 2. Hold time

Explanation:

  • The hold time is the minimum time for which the input signal must be maintained at the input of a flip-flop.

  • Therefore, the correct answer is Hold time.

570. ___ is said to occur when multiple internal variables change due to change in one input variable.

  1. Race condition

  2. Hold delay

  3. Hold and wait

  4. Clock skew

Show me the answer

Answer: 1. Race condition

Explanation:

  • A race condition occurs when multiple internal variables change due to a change in one input variable.

  • Therefore, the correct answer is Race condition.

571. A decade counter is.....

  1. Mode-3 counter

  2. Mod-5 counter

  3. Mod-8 counter

  4. Mod-10 counter

Show me the answer

Answer: 4. Mod-10 counter

Explanation:

  • A decade counter is a Mod-10 counter.

  • Therefore, the correct answer is Mod-10 counter.

572. A nibble consist of.....bits

  1. 2

  2. 4

  3. 8

  4. 16

Show me the answer

Answer: 2. 4

Explanation:

  • A nibble consists of 4 bits.

  • Therefore, the correct answer is 4.

573. Excess-8 code assigns to "-8 "

  1. 1110

  2. 1100

  3. 1000

  4. 0000

Show me the answer

Answer: 4. 0000

Explanation:

  • The Excess-8 code assigns 0000 to -8.

  • Therefore, the correct answer is 0000.

574. The three fundamentals gates are:

  1. AND, NAND, NAND

  2. NOT, NOR, XOR

  3. NOT, OR, AND

  4. NOT, NOR XOR

Show me the answer

Answer: 3. NOT, OR, AND

Explanation:

  • The three fundamental gates are NOT, OR, and AND.

  • Therefore, the correct answer is NOT, OR, AND.

575. The amount of memory that is supported by any digital system depends upon.....

  1. The organization of memory

  2. The structure of memory

  3. The size of decoding unit

  4. The size of the address bus of the microprocessor

Show me the answer

Answer: 4. The size of the address bus of the microprocessor

Explanation:

  • The amount of memory supported by a digital system depends on the size of the address bus of the microprocessor.

  • Therefore, the correct answer is The size of the address bus of the microprocessor.

576. Stack is an acronym for.....

  1. LIFO memory

  2. FIFO memory

  3. Flash memory

  4. Bust flash memory

Show me the answer

Answer: 1. LIFO memory

Explanation:

  • Stack stands for LIFO (Last In, First Out) memory.

  • Therefore, the correct answer is LIFO memory.

577. Addition of two octal numbers "36" and "71" results.....

  1. 213

  2. 123

  3. 127

  4. 345

Show me the answer

Answer: 3. 127

Explanation:

  • Adding 36 and 71 in octal results in 127.

  • Therefore, the correct answer is 127.

578. Addition of two octal numbers "567" and "243" results

  1. 2013

  2. 1023

  3. 1027

  4. 1032

Show me the answer

Answer: 4. 1032

Explanation:

  • Adding 567 and 243 in octal results in 1032.

  • Therefore, the correct answer is 1032.

579. ......is one of the examples of synchronous inputs.

  1. J-K input

  2. EN input

  3. Preset input (PRE)

  4. Clear Input (CLR)

Show me the answer

Answer: 4. Clear Input (CLR)

Explanation:

  • The Clear Input (CLR) is an example of a synchronous input.

  • Therefore, the correct answer is Clear Input (CLR).

580. ......occurs when the same clock signal arrives at different times at different clock input due to propagation delay.

  1. Race condition

  2. Clockskew

  3. Ripple effect

  4. None of the above

Show me the answer

Answer: 2. Clockskew

Explanation:

  • Clock skew occurs when the same clock signal arrives at different times at different clock inputs due to propagation delay.

  • Therefore, the correct answer is Clockskew.

581. In a state diagram, the transition from a current state to the next state is determined by.....

  1. Current state and the input

  2. Current state and output

  3. Previous state and inputs

  4. Previous state and output

Show me the answer

Answer: 1. Current state and the input

Explanation:

  • In a state diagram, the transition from a current state to the next state is determined by the current state and the input.

  • Therefore, the correct answer is Current state and the input.

582. Assume that a 4-bit serial in/serial out shift register is initially clear. We wish to store the nibble 1100.What will be the 4-bit pattern after the second clock pulse? (Right-most bit first.)

  1. 1100

  2. 0011

  3. 0000

  4. 1111

Show me the answer

Answer: 3. 0000

Explanation:

  • After the second clock pulse, the 4-bit pattern in the shift register will be 0000.

  • Therefore, the correct answer is 0000.

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