A time-sharing system allows multiple programs to reside in memory simultaneously, enabling the CPU to switch between them.
2. A multiprocessor computer is of the type:
SISD
MIMD
SIMD
All of the above
Show me the answer
Answer: 2. MIMD
Explanation:
MIMD (Multiple Instruction, Multiple Data) is a type of multiprocessor system where multiple processors execute different instructions on different data.
3. Microprocessor is a device which has at least:
Memory
Registers
I/O devices
CPU
Show me the answer
Answer: 4. CPU
Explanation:
A microprocessor is essentially a CPU (Central Processing Unit) on a single chip, which performs arithmetic, logic, and control operations.
4. A supercomputer has the capabilities of execution:
Pipeline instruction
Floating point arithmetic operation
Vector instruction
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
Supercomputers are designed to handle complex tasks, including pipeline instructions, floating-point arithmetic, and vector instructions.
5. The maximum stages in pipelining architecture are:
4
6
2
5
Show me the answer
Answer: 4. 5
Explanation:
Pipelining typically involves multiple stages, and the maximum number of stages can vary, but 5 is a common number in many architectures.
6. Instruction pipelining has minimum stages:
4
6
2
3
Show me the answer
Answer: 3. 2
Explanation:
Instruction pipelining requires at least 2 stages: Fetch and Execute.
7. Systems do not have parallel processing capabilities are:
SISD
MIMD
SIMD
All of the above
Show me the answer
Answer: 1. SISD
Explanation:
SISD (Single Instruction, Single Data) systems do not have parallel processing capabilities, as they process one instruction at a time on a single data stream.
8. Memory access in RISC architecture is limited to instructions:
CALL & RET
STA & LDA
PUSH & POP
MOV & JMP
Show me the answer
Answer: 2. STA & LDA
Explanation:
In RISC architecture, memory access is typically limited to load (LDA) and store (STA) instructions.
9. Interrupt which are initiated by an I/O device are:
Internal
Software
External
All of the above
Show me the answer
Answer: 3. External
Explanation:
Interrupts initiated by I/O devices are external interrupts, as they originate from outside the CPU.
10. Interrupt which are initiated by an instruction are:
Hardware
Internal
External
Software
Show me the answer
Answer: 4. Software
Explanation:
Software interrupts are initiated by specific instructions in the program, such as system calls.
11. States bit of the CPU are stored in a flag:
Carry
Zero
Sign
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
The CPU's state bits, such as Carry, Zero, and Sign, are stored in the flag register.
12. The effective address is the address of the operand in an instruction of type:
Immediate
Register
Indirect
Computational
Show me the answer
Answer: 4. Computational
Explanation:
The effective address is calculated during the execution of computational instructions.
13. Program counter of a CPU stores the address of the instruction:
Currently executed
Just executed
To be executed next
None of the above
Show me the answer
Answer: 3. To be executed next
Explanation:
The program counter (PC) holds the address of the next instruction to be executed.
14. A stack-organized computer has:
Three-address instruction
One-address instruction
Two-address instruction
Zero-address instruction
Show me the answer
Answer: 4. Zero-address instruction
Explanation:
In a stack-organized computer, operations are performed using the stack, and no explicit addresses are needed for operands.
15. The operation performed on stack are:
IN & OUT
PUSH & POP
CALL & RET
POP & OUT
Show me the answer
Answer: 2. PUSH & POP
Explanation:
The primary operations on a stack are PUSH (to add data) and POP (to remove data).
16. The stack is the list of type:
LIFO
FILO
LILO
All of the above
Show me the answer
Answer: 1. LIFO
Explanation:
A stack follows the Last-In-First-Out (LIFO) principle, where the last element added is the first one to be removed.
17. A microprocessor consists of:
Control unit
ALU
Program counter
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
A microprocessor includes the Control Unit, ALU (Arithmetic Logic Unit), and Program Counter as essential components.
18. A microprocessor sequencer performs the operation:
Read
Execute
Write
Read and execute
Show me the answer
Answer: 4. Read and execute
Explanation:
The sequencer in a microprocessor controls the sequence of operations, including reading and executing instructions.
19. A microprogram written as a string of 0's and 1's is a:
Symbolic microinstruction
Binary microprogram
Binary microinstruction
All of the above
Show me the answer
Answer: 2. Binary microprogram
Explanation:
A microprogram written in binary form is called a binary microprogram.
20. The branch logic that provides decision-making capabilities in the control unit is known as:
Controlled transfer
Unconditional transfer
Conditional transfer
None of the above
Show me the answer
Answer: 3. Conditional transfer
Explanation:
Conditional transfer refers to the branch logic that allows the control unit to make decisions based on certain conditions.
21. A control unit whose binary control variables are stored in memory is known as:
Hardwired control unit
Software control unit
Micro-programmed control unit
Hardware control unit
Show me the answer
Answer: 3. Micro-programmed control unit
Explanation:
In a micro-programmed control unit, control signals are stored in memory as microinstructions.
22. During execution, subroutine return address is stored in:
Control address register
Stack pointer
Subroutine address
Memory location
Show me the answer
Answer: 2. Stack pointer
Explanation:
The return address of a subroutine is stored in the stack, which is managed by the stack pointer.
23. The next address generator is sometimes called a:
Instruction sequence
Micro program sequence
Program sequence
Translator
Show me the answer
Answer: 3. Program sequence
Explanation:
The next address generator determines the sequence of instructions to be executed, often referred to as the program sequence.
24. The control data register holds the present microinstruction and is sometimes called:
Instruction register
Sequence register
Microinstruction register
Pipeline register
Show me the answer
Answer: 3. Microinstruction register
Explanation:
The control data register that holds the current microinstruction is called the microinstruction register.
25. A memory that is a part of a control unit is referred to as:
External memory
Cache memory
Internal memory
Control memory
Show me the answer
Answer: 4. Control memory
Explanation:
The memory used to store microinstructions in a control unit is called control memory.
26. Whenever POP H instruction is executed:
Data byte in the HL pair are stored on the stack
Two data bytes at the top of the stack are transferred to the HP register pair
Two data bytes at the top of the stack are transferred to the program counter
Two data bytes from the HL register that were previously stored on the stack are transferred back to the HL pointer
Show me the answer
Answer: 4. Two data bytes from the HL register that were previously stored on the stack are transferred back to the HL pointer
Explanation:
The POP H instruction retrieves the top two bytes from the stack and places them into the HL register pair.
27. When the RET instruction at the end of a subroutine is executed:
The information where the stack is initialized is transferred to the stack pointer
The memory address of the RET instructions is transferred to the program counter
Two data bytes stored in the top two locations of the stack are transferred to the program counter
Two data bytes stored in the top two locations of the stack are transferred to the stack pointer
Show me the answer
Answer: 3. Two data bytes stored in the top two locations of the stack are transferred to the program counter
Explanation:
The RET instruction pops the return address from the stack and transfers it to the program counter (PC).
28. When a subroutine is called, the address of the instruction following the CALL is stored in/on the:
Stack pointer
Program counter
Accumulator
Stack
Show me the answer
Answer: 4. Stack
Explanation:
The return address (address of the next instruction after CALL) is pushed onto the stack when a subroutine is called.
29. A stack pointer is:
A 16-bit register in the microprocessor that indicates the beginning of the stack memory
A register that decodes and executes 16-bit arithmetic expressions
The first memory locations where a subroutine address is stored
A register in which flag bits are stored
Show me the answer
Answer: 1. A 16-bit register in the microprocessor that indicates the beginning of the stack memory
Explanation:
The stack pointer (SP) is a 16-bit register that points to the top of the stack memory.
30. A stack is:
An 8-bit register in the microprocessor
A set of memory locations in R/WM reserved for storing information temporarily during the execution of a program
A 16-bit memory address stored in the program counter
A 16-bit register in the microprocessor
Show me the answer
Answer: 2. A set of memory locations in R/WM reserved for storing information temporarily during the execution of a program
Explanation:
A stack is a region of memory used for temporary storage of data during program execution.
31. A third and last component of CPU is:
ALU
Supervisor – control unit
Input device
Register unit
Show me the answer
Answer: 2. Supervisor – control unit
Explanation:
The supervisor or control unit is responsible for managing and coordinating the operations of the CPU.
32. The section of the CPU that selects, interprets, and sees to the execution of program instructions is:
Memory
Control unit
Register unit
ALU
Show me the answer
Answer: 2. Control unit
Explanation:
The control unit is responsible for fetching, decoding, and executing instructions.
33. A device used to bring information into a computer is:
ALU
Control unit
Input device
Output device
Show me the answer
Answer: 3. Input device
Explanation:
Input devices, such as keyboards and mice, are used to bring information into a computer.
34. A microprocessor is a..... on a chip:
Computer
ALU
CPU
Control unit
Show me the answer
Answer: 3. CPU
Explanation:
A microprocessor is essentially a CPU (Central Processing Unit) integrated onto a single chip.
35. Part of the computer where the data and instructions are held is:
Register unit
Memory unit
Accumulator
CPU
Show me the answer
Answer: 2. Memory unit
Explanation:
The memory unit stores data and instructions that are being processed by the CPU.
36. Backing storage is so named because:
It is always kept at the back of the CPU
It backs up the computer's main memory
It lags behind the main memory
It is slow and backward
Show me the answer
Answer: 2. It backs up the computer's main memory
Explanation:
Backing storage, such as hard drives, provides additional storage capacity to back up data from the main memory.
37. The ALU and control unit of most of the microcomputers are combined and manufactured on a single silicon chip. What is it called?
Monochip
ALU
Microprocessor
Control unit
Show me the answer
Answer: 3. Microprocessor
Explanation:
The ALU and control unit are integrated into a single chip, known as a microprocessor.
38. Which of the following code used in present-day computing was developed by IBM corporation?
ASCII
Baudot code
Hollerith code
EBCDIC CODE
Show me the answer
Answer: 4. EBCDIC CODE
Explanation:
EBCDIC (Extended Binary Coded Decimal Interchange Code) was developed by IBM for use in its mainframe computers.
39. Which parts of the computer are used for calculating and comparing?
Disk unit
ALU
Control unit
Modem
Show me the answer
Answer: 2. ALU
Explanation:
The Arithmetic Logic Unit (ALU) performs calculations and comparisons in a computer.
40. Instruction LXI in 8085 loads:
Stack pointer
None of the above
Register pair
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
The LXI instruction in the 8085 microprocessor can load a register pair, stack pointer, or other registers.
41. A CALL instruction is always encountered by instructions:
IN
OUT
RET
INTR
Show me the answer
Answer: 3. RET
Explanation:
The CALL instruction is used to call a subroutine, and it is always followed by a RET (Return) instruction to return to the main program.
42. In I/O mapped I/O 8085 duplicates the I/O address on:
Address and data line
Lower byte of address and control line
Lower and higher byte of address
Higher byte of address and data line
Show me the answer
Answer: 3. Lower and higher byte of address
Explanation:
In I/O mapped I/O, the 8085 microprocessor duplicates the I/O address on both the lower and higher byte of the address bus.
43. Address and data line in 8085 are:
Separate lines
Only lower byte of address is multiplexed
Common line
Shared line
Show me the answer
Answer: 2. Only lower byte of address is multiplexed
Explanation:
In the 8085 microprocessor, the lower byte of the address (A0-A7) is multiplexed with the data bus (D0-D7).
44. The 16-bit register in 8085 is:
General purpose register
Stack pointer and program counter
Accumulator
All of the above
Show me the answer
Answer: 2. Stack pointer and program counter
Explanation:
The 8085 microprocessor has two 16-bit registers: the stack pointer (SP) and the program counter (PC).
45. Microprocessor 8085 can address location up to:
32K
64K
128K
1M
Show me the answer
Answer: 2. 64K
Explanation:
The 8085 microprocessor has a 16-bit address bus, allowing it to address up to 64K (2^16) memory locations.
46. Pipeline processing implements:
Fetch instructions
Fetch operand
Decode instruction
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
Pipeline processing involves fetching instructions, fetching operands, and decoding instructions to improve efficiency.
47. Pipeline strategy is called implement:
Instruction execution
Instruction decoding
Instruction pre-fetch
Instruction manipulation
Show me the answer
Answer: 3. Instruction pre-fetch
Explanation:
Pipeline strategy involves pre-fetching instructions to reduce idle time and improve performance.
48. Intel 80486 pipelining implements stages:
6
5
4
3
Show me the answer
Answer: 2. 5
Explanation:
The Intel 80486 microprocessor uses a 5-stage pipeline: Fetch, Decode, Execute, Memory Access, and Write Back.
49. Pipeline processing uses the technique:
Sharing the memory
Pre-fetching
Bit slicing
Parallel processing
Show me the answer
Answer: 2. Pre-fetching
Explanation:
Pipeline processing uses pre-fetching to overlap the execution of multiple instructions, improving throughput.
50. Micro instructions are stored in:
Computer memory
Secondary storage
Primary memory
Control memory
Show me the answer
Answer: 4. Control memory
Explanation:
Micro instructions are stored in control memory, which is part of the control unit in a microprocessor.
