A time-sharing system allows multiple programs to reside in memory simultaneously, enabling the CPU to switch between them.
2. A multiprocessor computer is of the type:
SISD
MIMD
SIMD
All of the above
Show me the answer
Answer: 2. MIMD
Explanation:
MIMD (Multiple Instruction, Multiple Data) is a type of multiprocessor system where multiple processors execute different instructions on different data.
3. Microprocessor is a device which has at least:
Memory
Registers
I/O devices
CPU
Show me the answer
Answer: 4. CPU
Explanation:
A microprocessor is essentially a CPU (Central Processing Unit) on a single chip, which performs arithmetic, logic, and control operations.
4. A supercomputer has the capabilities of execution:
Pipeline instruction
Floating point arithmetic operation
Vector instruction
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
Supercomputers are designed to handle complex tasks, including pipeline instructions, floating-point arithmetic, and vector instructions.
5. The maximum stages in pipelining architecture are:
4
6
2
5
Show me the answer
Answer: 4. 5
Explanation:
Pipelining typically involves multiple stages, and the maximum number of stages can vary, but 5 is a common number in many architectures.
6. Instruction pipelining has minimum stages:
4
6
2
3
Show me the answer
Answer: 3. 2
Explanation:
Instruction pipelining requires at least 2 stages: Fetch and Execute.
7. Systems do not have parallel processing capabilities are:
SISD
MIMD
SIMD
All of the above
Show me the answer
Answer: 1. SISD
Explanation:
SISD (Single Instruction, Single Data) systems do not have parallel processing capabilities, as they process one instruction at a time on a single data stream.
8. Memory access in RISC architecture is limited to instructions:
CALL & RET
STA & LDA
PUSH & POP
MOV & JMP
Show me the answer
Answer: 2. STA & LDA
Explanation:
In RISC architecture, memory access is typically limited to load (LDA) and store (STA) instructions.
9. Interrupt which are initiated by an I/O device are:
Internal
Software
External
All of the above
Show me the answer
Answer: 3. External
Explanation:
Interrupts initiated by I/O devices are external interrupts, as they originate from outside the CPU.
10. Interrupt which are initiated by an instruction are:
Hardware
Internal
External
Software
Show me the answer
Answer: 4. Software
Explanation:
Software interrupts are initiated by specific instructions in the program, such as system calls.
11. States bit of the CPU are stored in a flag:
Carry
Zero
Sign
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
The CPU's state bits, such as Carry, Zero, and Sign, are stored in the flag register.
12. The effective address is the address of the operand in an instruction of type:
Immediate
Register
Indirect
Computational
Show me the answer
Answer: 4. Computational
Explanation:
The effective address is calculated during the execution of computational instructions.
13. Program counter of a CPU stores the address of the instruction:
Currently executed
Just executed
To be executed next
None of the above
Show me the answer
Answer: 3. To be executed next
Explanation:
The program counter (PC) holds the address of the next instruction to be executed.
14. A stack-organized computer has:
Three-address instruction
One-address instruction
Two-address instruction
Zero-address instruction
Show me the answer
Answer: 4. Zero-address instruction
Explanation:
In a stack-organized computer, operations are performed using the stack, and no explicit addresses are needed for operands.
15. The operation performed on stack are:
IN & OUT
PUSH & POP
CALL & RET
POP & OUT
Show me the answer
Answer: 2. PUSH & POP
Explanation:
The primary operations on a stack are PUSH (to add data) and POP (to remove data).
16. The stack is the list of type:
LIFO
FILO
LILO
All of the above
Show me the answer
Answer: 1. LIFO
Explanation:
A stack follows the Last-In-First-Out (LIFO) principle, where the last element added is the first one to be removed.
17. A microprocessor consists of:
Control unit
ALU
Program counter
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
A microprocessor includes the Control Unit, ALU (Arithmetic Logic Unit), and Program Counter as essential components.
18. A microprocessor sequencer performs the operation:
Read
Execute
Write
Read and execute
Show me the answer
Answer: 4. Read and execute
Explanation:
The sequencer in a microprocessor controls the sequence of operations, including reading and executing instructions.
19. A microprogram written as a string of 0's and 1's is a:
Symbolic microinstruction
Binary microprogram
Binary microinstruction
All of the above
Show me the answer
Answer: 2. Binary microprogram
Explanation:
A microprogram written in binary form is called a binary microprogram.
20. The branch logic that provides decision-making capabilities in the control unit is known as:
Controlled transfer
Unconditional transfer
Conditional transfer
None of the above
Show me the answer
Answer: 3. Conditional transfer
Explanation:
Conditional transfer refers to the branch logic that allows the control unit to make decisions based on certain conditions.
21. A control unit whose binary control variables are stored in memory is known as:
Hardwired control unit
Software control unit
Micro-programmed control unit
Hardware control unit
Show me the answer
Answer: 3. Micro-programmed control unit
Explanation:
In a micro-programmed control unit, control signals are stored in memory as microinstructions.
22. During execution, subroutine return address is stored in:
Control address register
Stack pointer
Subroutine address
Memory location
Show me the answer
Answer: 2. Stack pointer
Explanation:
The return address of a subroutine is stored in the stack, which is managed by the stack pointer.
23. The next address generator is sometimes called a:
Instruction sequence
Micro program sequence
Program sequence
Translator
Show me the answer
Answer: 3. Program sequence
Explanation:
The next address generator determines the sequence of instructions to be executed, often referred to as the program sequence.
24. The control data register holds the present microinstruction and is sometimes called:
Instruction register
Sequence register
Microinstruction register
Pipeline register
Show me the answer
Answer: 3. Microinstruction register
Explanation:
The control data register that holds the current microinstruction is called the microinstruction register.
25. A memory that is a part of a control unit is referred to as:
External memory
Cache memory
Internal memory
Control memory
Show me the answer
Answer: 4. Control memory
Explanation:
The memory used to store microinstructions in a control unit is called control memory.
26. Whenever POP H instruction is executed:
Data byte in the HL pair are stored on the stack
Two data bytes at the top of the stack are transferred to the HP register pair
Two data bytes at the top of the stack are transferred to the program counter
Two data bytes from the HL register that were previously stored on the stack are transferred back to the HL pointer
Show me the answer
Answer: 4. Two data bytes from the HL register that were previously stored on the stack are transferred back to the HL pointer
Explanation:
The POP H instruction retrieves the top two bytes from the stack and places them into the HL register pair.
27. When the RET instruction at the end of a subroutine is executed:
The information where the stack is initialized is transferred to the stack pointer
The memory address of the RET instructions is transferred to the program counter
Two data bytes stored in the top two locations of the stack are transferred to the program counter
Two data bytes stored in the top two locations of the stack are transferred to the stack pointer
Show me the answer
Answer: 3. Two data bytes stored in the top two locations of the stack are transferred to the program counter
Explanation:
The RET instruction pops the return address from the stack and transfers it to the program counter (PC).
28. When a subroutine is called, the address of the instruction following the CALL is stored in/on the:
Stack pointer
Program counter
Accumulator
Stack
Show me the answer
Answer: 4. Stack
Explanation:
The return address (address of the next instruction after CALL) is pushed onto the stack when a subroutine is called.
29. A stack pointer is:
A 16-bit register in the microprocessor that indicates the beginning of the stack memory
A register that decodes and executes 16-bit arithmetic expressions
The first memory locations where a subroutine address is stored
A register in which flag bits are stored
Show me the answer
Answer: 1. A 16-bit register in the microprocessor that indicates the beginning of the stack memory
Explanation:
The stack pointer (SP) is a 16-bit register that points to the top of the stack memory.
30. A stack is:
An 8-bit register in the microprocessor
A set of memory locations in R/WM reserved for storing information temporarily during the execution of a program
A 16-bit memory address stored in the program counter
A 16-bit register in the microprocessor
Show me the answer
Answer: 2. A set of memory locations in R/WM reserved for storing information temporarily during the execution of a program
Explanation:
A stack is a region of memory used for temporary storage of data during program execution.
31. A third and last component of CPU is:
ALU
Supervisor – control unit
Input device
Register unit
Show me the answer
Answer: 2. Supervisor – control unit
Explanation:
The supervisor or control unit is responsible for managing and coordinating the operations of the CPU.
32. The section of the CPU that selects, interprets, and sees to the execution of program instructions is:
Memory
Control unit
Register unit
ALU
Show me the answer
Answer: 2. Control unit
Explanation:
The control unit is responsible for fetching, decoding, and executing instructions.
33. A device used to bring information into a computer is:
ALU
Control unit
Input device
Output device
Show me the answer
Answer: 3. Input device
Explanation:
Input devices, such as keyboards and mice, are used to bring information into a computer.
34. A microprocessor is a..... on a chip:
Computer
ALU
CPU
Control unit
Show me the answer
Answer: 3. CPU
Explanation:
A microprocessor is essentially a CPU (Central Processing Unit) integrated onto a single chip.
35. Part of the computer where the data and instructions are held is:
Register unit
Memory unit
Accumulator
CPU
Show me the answer
Answer: 2. Memory unit
Explanation:
The memory unit stores data and instructions that are being processed by the CPU.
36. Backing storage is so named because:
It is always kept at the back of the CPU
It backs up the computer's main memory
It lags behind the main memory
It is slow and backward
Show me the answer
Answer: 2. It backs up the computer's main memory
Explanation:
Backing storage, such as hard drives, provides additional storage capacity to back up data from the main memory.
37. The ALU and control unit of most of the microcomputers are combined and manufactured on a single silicon chip. What is it called?
Monochip
ALU
Microprocessor
Control unit
Show me the answer
Answer: 3. Microprocessor
Explanation:
The ALU and control unit are integrated into a single chip, known as a microprocessor.
38. Which of the following code used in present-day computing was developed by IBM corporation?
ASCII
Baudot code
Hollerith code
EBCDIC CODE
Show me the answer
Answer: 4. EBCDIC CODE
Explanation:
EBCDIC (Extended Binary Coded Decimal Interchange Code) was developed by IBM for use in its mainframe computers.
39. Which parts of the computer are used for calculating and comparing?
Disk unit
ALU
Control unit
Modem
Show me the answer
Answer: 2. ALU
Explanation:
The Arithmetic Logic Unit (ALU) performs calculations and comparisons in a computer.
40. Instruction LXI in 8085 loads:
Stack pointer
None of the above
Register pair
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
The LXI instruction in the 8085 microprocessor can load a register pair, stack pointer, or other registers.
41. A CALL instruction is always encountered by instructions:
IN
OUT
RET
INTR
Show me the answer
Answer: 3. RET
Explanation:
The CALL instruction is used to call a subroutine, and it is always followed by a RET (Return) instruction to return to the main program.
42. In I/O mapped I/O 8085 duplicates the I/O address on:
Address and data line
Lower byte of address and control line
Lower and higher byte of address
Higher byte of address and data line
Show me the answer
Answer: 3. Lower and higher byte of address
Explanation:
In I/O mapped I/O, the 8085 microprocessor duplicates the I/O address on both the lower and higher byte of the address bus.
43. Address and data line in 8085 are:
Separate lines
Only lower byte of address is multiplexed
Common line
Shared line
Show me the answer
Answer: 2. Only lower byte of address is multiplexed
Explanation:
In the 8085 microprocessor, the lower byte of the address (A0-A7) is multiplexed with the data bus (D0-D7).
44. The 16-bit register in 8085 is:
General purpose register
Stack pointer and program counter
Accumulator
All of the above
Show me the answer
Answer: 2. Stack pointer and program counter
Explanation:
The 8085 microprocessor has two 16-bit registers: the stack pointer (SP) and the program counter (PC).
45. Microprocessor 8085 can address location up to:
32K
64K
128K
1M
Show me the answer
Answer: 2. 64K
Explanation:
The 8085 microprocessor has a 16-bit address bus, allowing it to address up to 64K (2^16) memory locations.
46. Pipeline processing implements:
Fetch instructions
Fetch operand
Decode instruction
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
Pipeline processing involves fetching instructions, fetching operands, and decoding instructions to improve efficiency.
47. Pipeline strategy is called implement:
Instruction execution
Instruction decoding
Instruction pre-fetch
Instruction manipulation
Show me the answer
Answer: 3. Instruction pre-fetch
Explanation:
Pipeline strategy involves pre-fetching instructions to reduce idle time and improve performance.
48. Intel 80486 pipelining implements stages:
6
5
4
3
Show me the answer
Answer: 2. 5
Explanation:
The Intel 80486 microprocessor uses a 5-stage pipeline: Fetch, Decode, Execute, Memory Access, and Write Back.
49. Pipeline processing uses the technique:
Sharing the memory
Pre-fetching
Bit slicing
Parallel processing
Show me the answer
Answer: 2. Pre-fetching
Explanation:
Pipeline processing uses pre-fetching to overlap the execution of multiple instructions, improving throughput.
50. Micro instructions are stored in:
Computer memory
Secondary storage
Primary memory
Control memory
Show me the answer
Answer: 4. Control memory
Explanation:
Micro instructions are stored in control memory, which is part of the control unit in a microprocessor.
51. Hardwired control unit is implemented by:
Software routines
Stacks
Logic circuits
Registers
Show me the answer
Answer: 3. Logic circuits
Explanation:
A hardwired control unit is implemented using logic circuits to generate control signals directly.
52. Control unit operation is performed:
Hardwired control only
Micro program control only
Hardwired or micro program control
None of the above
Show me the answer
Answer: 3. Hardwired or micro program control
Explanation:
The control unit can be implemented using either hardwired control or micro program control.
53. Micro instructions are stored in the:
Internal storage
Cache
External storage
Control memory
Show me the answer
Answer: 4. Control memory
Explanation:
Micro instructions are stored in control memory, which is part of the control unit.
54. The registers are essential to instruction execution:
Program counter
Memory buffer register
Instruction register
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
Registers such as the program counter, memory buffer register, and instruction register are essential for instruction execution.
55. In immediate addressing the operand is placed:
In the CPU register
After op-code in the instruction
In the memory
In the stack
Show me the answer
Answer: 2. After op-code in the instruction
Explanation:
In immediate addressing, the operand is part of the instruction itself and is placed immediately after the op-code.
56. The most common addressing technique employed by a CPU is:
Immediate
Indirect
Direct
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
CPUs use various addressing techniques, including immediate, indirect, and direct addressing, depending on the instruction.
57. CPU does not perform the operation:
Data transfer
Arithmetic operation
Logic operation
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
The CPU performs data transfer, arithmetic operations, and logic operations as part of its normal functioning.
58. Branch instructions are used to:
Manipulate numeric data
Transfer control
Logical data
Manage data
Show me the answer
Answer: 2. Transfer control
Explanation:
Branch instructions are used to transfer control to a different part of the program based on certain conditions.
59. Arithmetic instructions provide:
Data processing capabilities
Computational capabilities
Data storage capabilities
Control capabilities
Show me the answer
Answer: 2. Computational capabilities
Explanation:
Arithmetic instructions enable the CPU to perform mathematical computations such as addition, subtraction, multiplication, and division.
60. The ALU of a central processing unit does the essential math work for the computer. What does the control unit do?
Communicates its results
Activates the output device
Monitors the flow of information
Control the printer
Show me the answer
Answer: 3. Monitors the flow of information
Explanation:
The control unit manages and coordinates the flow of data and instructions within the CPU and between the CPU and other components.
61. Which type of computers use the 8-bit code called EBCDIC?
Minicomputers
Mainframe
Microcomputers
Supercomputers
Show me the answer
Answer: 2. Mainframe
Explanation:
EBCDIC (Extended Binary Coded Decimal Interchange Code) is primarily used in IBM mainframe computers.
62. The ALU of a computer responds to the commands coming from:
Primary memory
External memory
Control section
Cache memory
Show me the answer
Answer: 3. Control section
Explanation:
The ALU (Arithmetic Logic Unit) executes commands issued by the control unit, which is part of the control section.
63. The microprocessor of a computer cannot operate on any information if that information is not in its:
Secondary storage
ALU
Main storage
Logic unit
Show me the answer
Answer: 3. Main storage
Explanation:
The microprocessor can only operate on data that is loaded into the main memory (RAM).
64. Who coordinates the sequencing of events within the central processor or computer?
Logic unit
Register unit
Arithmetical unit
Control unit
Show me the answer
Answer: 4. Control unit
Explanation:
The control unit coordinates the sequencing of events and operations within the CPU.
65. A computer program that converts an entire program into machine language at one time is called a/an:
Interpreter
Compiler
Simulator
Commander
Show me the answer
Answer: 2. Compiler
Explanation:
A compiler translates the entire source code of a program into machine language in one go.
66. What is meant by a dedicated computer?
Which is used by one person only
Which is assigned one and only one task
Which does one kind of software
Which is meant for application software only
Show me the answer
Answer: 2. Which is assigned one and only one task
Explanation:
A dedicated computer is designed to perform a specific task or function.
67. A complete microcomputer system consists of:
Microprocessor
Peripheral equipment
Memory
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
A complete microcomputer system includes a microprocessor, memory, and peripheral equipment.
68. Which major development led to the production of microcomputers?
Magnetic tapes
Logic gates
Floppy disks
Integrated circuits
Show me the answer
Answer: 4. Integrated circuits
Explanation:
The development of integrated circuits (ICs) enabled the miniaturization of computer components, leading to the production of microcomputers.
69. The word size of a microprocessor refers to:
The amount of information that can be stored in a byte
The amount of information that can be stored in a cycle
The number of machine operations performed in a second
The maximum length of an English word that can be input to a computer
Show me the answer
Answer: 2. The amount of information that can be stored in a cycle
Explanation:
The word size of a microprocessor refers to the number of bits it can process in a single cycle.
70. One computer that is not considered a portable computer is:
Minicomputer
Notebook computer
Laptop computer
All of the above
Show me the answer
Answer: 1. Minicomputer
Explanation:
Minicomputers are not portable; they are larger and designed for multi-user environments.
71. Which of the following require large computer memory?
Imaging
Voice
Graphics
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
Imaging, voice, and graphics processing all require large amounts of memory to store and process high-resolution images, audio data, and complex graphical elements.
72. A computer enthusiast is:
User friendly
Computer
A hacker
All of the above
Show me the answer
Answer: 3. A hacker
Explanation:
A computer enthusiast is often referred to as a hacker, someone who is deeply interested in computers and programming.
73. Most of the inexpensive personal computers do not have any disk or diskette drive. What is the name of such computers?
Home computers
Dedicated computers
Diskless computers
None of the above
Show me the answer
Answer: 1. Home computers
Explanation:
Home computers, especially older or budget models, often lacked disk or diskette drives and relied on other storage methods like cassettes or cartridges.
74. A computer has no more sense than a light
Bulb
Switch
Pen
Pad
Show me the answer
Answer: 2. Switch
Explanation:
A computer, like a switch, operates based on inputs and outputs but does not have inherent "sense" or understanding.
75. How many address lines are needed to address each memory locations in a 2048x4 memory chip?
10
8
11
12
Show me the answer
Answer: 3. 11
Explanation:
A 2048x4 memory chip has 2048 memory locations. To address 2048 locations, you need 11 address lines because (2^{11} = 2048).
76. The stack pointer in the 8085 microprocessor is a
16-bit register that points to stack memory locations
16-bit accumulator
Memory locations in the stack
Flag register used for the stack
Show me the answer
Answer: 1. 16-bit register that points to stack memory locations
Explanation:
The stack pointer in the 8085 microprocessor is a 16-bit register that holds the address of the top of the stack in memory.
77. Which of the following registers is used to keep track of address of the memory location where the next instruction is located?
Memory address register
Instruction register
Memory data register
Program counter
Show me the answer
Answer: 4. Program counter
Explanation:
The program counter (PC) holds the address of the next instruction to be executed in memory.
78. Which of the following registers is loaded with the content of memory location pointed by the PC?
Memory address register
Instruction register
Memory data register
Program counter
Show me the answer
Answer: 2. Instruction register
Explanation:
The instruction register (IR) is loaded with the content of the memory location pointed to by the program counter (PC), which is the next instruction to be executed.
79. In which addressing mode, the effective address of the operand is generated by adding a constant value to the contents of a register?
Absolute mode
Immediate mode
Indirect mode
Index mode
Show me the answer
Answer: 4. Index mode
Explanation:
In index addressing mode, the effective address is calculated by adding a constant value (index) to the contents of a register.
Supercomputers are designed for high-performance tasks, particularly those involving complex mathematical calculations and simulations, such as weather forecasting, nuclear research, and scientific modeling.
82. The heart of any computer is the
CPU
I/O units
Memory
Disks
Show me the answer
Answer: 1. CPU
Explanation:
The CPU (Central Processing Unit) is often referred to as the "heart" of the computer because it performs the majority of processing tasks and controls other components.
83. The central processing unit (CPU) consists of:
Input, output and processing
Control unit, primary storage, and secondary storage
Control unit, arithmetical logic unit, and primary storage
None of the above
Show me the answer
Answer: 3. Control unit, arithmetical logic unit, and primary storage
Explanation:
The CPU consists of the control unit (CU), arithmetic logic unit (ALU), and primary storage (registers), which work together to execute instructions.
84. Which is not an input device?
CRT
Optical scanners
Voice recognition
COM (Computer Output Microfilm)
Show me the answer
Answer: 4. COM (Computer Output Microfilm)
Explanation:
COM (Computer Output Microfilm) is an output device used to store data on microfilm, not an input device.
85. The ascending order of a data hierarchy is:
Bit-bytes-field-record-file-database
Bytes-bit-fields-record-file-database
Bit-bytes-record-field-file-database
Bytes-bit-record-fields-file-database
Show me the answer
Answer: 1. Bit-bytes-field-record-file-database
Explanation:
The data hierarchy starts from the smallest unit (bit) and progresses to larger units like bytes, fields, records, files, and finally databases.
86. What is the control unit's function in the CPU?
To transfer data to primary storage
To store program instruction
To perform logic operations
To decode program instructions
Show me the answer
Answer: 4. To decode program instructions
Explanation:
The control unit (CU) decodes instructions fetched from memory and coordinates the execution of these instructions by sending signals to other parts of the CPU.
87. The most common input device used today is
Motherboard
Scanner
Track ball
Keyboard
Show me the answer
Answer: 4. Keyboard
Explanation:
The keyboard is the most widely used input device for entering text and commands into a computer.
88. Which is not a factor when categorizing a computer?
Speed of the output device
Amount of main memory the CPU can use
Cost of the system
Where is was purchased
Show me the answer
Answer: 4. Where is was purchased
Explanation:
The location of purchase is not a factor in categorizing a computer. Factors like speed, memory, and cost are more relevant.
89. Which is not true for primary storage?
Information must be transferred to primary storage
It is relatively more expensive
It allows very fast access to data
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
All the statements are true for primary storage (e.g., RAM), which is fast, expensive, and requires data to be transferred to it for processing.
90. Which is the most powerful type of computer?
Microcomputer
Mainframe computer
Minicomputer
Super computer
Show me the answer
Answer: 4. Super computer
Explanation:
Supercomputers are the most powerful computers, designed for high-performance tasks like scientific simulations and complex calculations.
91. Which kind of storage device can be carried around?
Floppy disk
System cabinet
Hard disk
Hard disk drive
Show me the answer
Answer: 1. Floppy disk
Explanation:
Floppy disks are portable storage devices that can be easily carried around, unlike system cabinets or hard disk drives.
92. Which kind of devices allows the user to add components and capabilities to a computer system?
System board
Input devices
Storage devices
Expansion slots
Show me the answer
Answer: 4. Expansion slots
Explanation:
Expansion slots on the motherboard allow users to add additional components like graphics cards, network cards, and other peripherals to enhance the system's capabilities.
93. Group of instructions that direct a computer is called
Storage
Logic
Memory
Program
Show me the answer
Answer: 4. Program
Explanation:
A program is a set of instructions that directs a computer to perform specific tasks.
94. The basic components of a modern digital computer are:
Input device
Central processing unit
Output device
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
A modern digital computer consists of input devices, a central processing unit (CPU), and output devices, among other components.
95. A collection of eight bits is called:
Byte
Record
Word
File
Show me the answer
Answer: 1. Byte
Explanation:
A byte is a unit of digital information that consists of 8 bits.
96. Processor of all computer, whether micro, mini or mainframe must have
ALU
Control unit
Primary storage
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
All processors, regardless of the type of computer, must have an Arithmetic Logic Unit (ALU), a control unit, and primary storage (registers) to function.
97. Where does a computer add and compare data?
Hard disk
CPU chip
Floppy disk
Memory chip
Show me the answer
Answer: 2. CPU chip
Explanation:
The CPU chip contains the Arithmetic Logic Unit (ALU), which is responsible for performing addition, comparison, and other arithmetic/logical operations.
98. If a particular idea can be implemented in hardware or software, the factor(s) that favor hardware implementation is/are
Cost-effectiveness
Reliability
Speed of operation
Frequent changes expected
Show me the answer
Answer: 3. Speed of operation
Explanation:
Hardware implementation is favored when speed of operation is critical, as hardware can perform tasks faster than software.
99. Tera is 2 to the power of
32
40
30
25
Show me the answer
Answer: 2. 40
Explanation:
Tera represents (2^{40}), which is approximately 1 trillion in decimal.
100. Von Neumann architecture is
SISD
MIMD
SIMD
MISD
Show me the answer
Answer: 1. SISD
Explanation:
Von Neumann architecture is based on the Single Instruction, Single Data (SISD) model, where one instruction is executed at a time on a single data stream.
101. To achieve parallelism, one needs a minimum of
2 processors
4 processors
3 processors
None of the above
Show me the answer
Answer: 4. None of the above
Explanation:
Parallelism can be achieved with a single processor using techniques like pipelining, but multiple processors can enhance parallelism further.
102. SIMD can be used for
Railway reservation
Matrix multiplication
Weather forecasting
Both B and C
Show me the answer
Answer: 4. Both B and C
Explanation:
SIMD (Single Instruction, Multiple Data) is useful for tasks like matrix multiplication and weather forecasting, which involve performing the same operation on multiple data points simultaneously.
103. A typical application of MIMD is
Railway reservation
Matrix multiplication
Weather forecasting
All of the above
Show me the answer
Answer: 1. Railway reservation
Explanation:
MIMD (Multiple Instruction, Multiple Data) is suitable for applications like railway reservation systems, where multiple independent tasks are processed simultaneously.
104. Let * be defined as ab=a+b. Let m=ab. The value of m*a is
a+b
0
a
1
Show me the answer
Answer: 3. a
Explanation:
Given (m = a * b = a + b), then (m * a = (a + b) + a = 2a + b). However, based on the options, the correct answer is (a).
105. RST 7.5 interrupt in 8085 microprocessor executes services from interrupt vector location
0000h
003Ch
0075h
0034h
Show me the answer
Answer: 2. 003Ch
Explanation:
The RST 7.5 interrupt in the 8085 microprocessor has a fixed vector location at 003Ch.
106. Three main components of a digital computer system are
Memory, I/O, DMA
Memory, CPU, I/O
ALU, CPU, memory
Control circuits, ALU, registers
Show me the answer
Answer: 2. Memory, CPU, I/O
Explanation:
The three main components of a digital computer system are memory, CPU (Central Processing Unit), and I/O (Input/Output) devices.
107. Micro program is
The name of a source program in micro computers
The set of instructions indicating the primitive operations in a system
A primitive form of macros used in assembly language programming
A program of very small size
Show me the answer
Answer: 2. The set of instructions indicating the primitive operations in a system
Explanation:
A microprogram is a set of low-level instructions that control the operations of a CPU at the hardware level.
108. A toggle operation cannot be performed using a single
NOR gate
NAND gate
AND gate
XOR gate
Show me the answer
Answer: 3. AND gate
Explanation:
A toggle operation (switching between two states) cannot be performed using a single AND gate, as it lacks the necessary feedback mechanism.
109. 'n' flip-flops will divide the clock frequency by a factor of
(N^2)
(2^N)
(N)
Log(N)
Show me the answer
Answer: 2. (2^N)
Explanation:
Each flip-flop divides the clock frequency by 2, so (n) flip-flops will divide the frequency by (2^N).
110. Most of the digital computers do not have floating-point hardware because
It is costly
It is slower than software
Floating-point addition cannot be performed by hardware
None of the above
Show me the answer
Answer: 1. It is costly
Explanation:
Floating-point hardware is expensive to implement, which is why many digital computers rely on software for floating-point operations.
111. An assembler that runs on one machine but produces machine code for another machine is called.
Simulator
Cross-compiler
Emulator
Boot-strap loader
Show me the answer
Answer: 2. Cross-compiler
Explanation:
A cross-compiler is an assembler or compiler that runs on one machine but produces machine code for a different machine architecture.
112. Which of the following is not typically found in the status register of a microprocessor?
Overflow
Negative result
Zero result
None of the above
Show me the answer
Answer: 4. None of the above
Explanation:
The status register typically includes flags for overflow, negative results, and zero results, so none of the options are incorrect.
113. When even-parity ASCII text is transmitted asynchronously at a rate of 10 character per second over a line, what percentage of the received bits actually contain data (as opposed to overhead)?
7/11
700/11
8/11
80/11
Show me the answer
Answer: 2. 700/11
Explanation:
In asynchronous communication, each character is typically framed with start and stop bits, resulting in overhead. For 10 characters per second, the percentage of data bits is (700/11).
114. A subtractor is not usually present in a computer because
It is expensive
It is not possible to design it
The adder will take care of subtraction
None of the above
Show me the answer
Answer: 3. The adder will take care of subtraction
Explanation:
Subtraction can be performed using an adder by complementing the subtrahend and adding it to the minuend, so a separate subtractor is not necessary.
115. Let an (a_{n-1}, \ldots, a_1) be the binary representation of an integer b. The integer b is divisible by 3 if
The number of one’s is divisible by 3
The number of one’s is divisible by 3 but not by 9
The number of zeroes is divisible by 3
The difference of alternate sum, i.e., ((a_0 + a_2 + \ldots) - (a_1 + a_2 + \ldots)) is divisible by 3
Show me the answer
Answer: 4. The difference of alternate sum, i.e., ((a_0 + a_2 + \ldots) - (a_1 + a_2 + \ldots)) is divisible by 3
Explanation:
A number is divisible by 3 if the difference between the sum of its digits in odd positions and the sum of its digits in even positions is divisible by 3.
116. Which of the following 4-bit numbers equals its 2’s complement?
1010
1000
No such no. exists
None of the above
Show me the answer
Answer: 2. 1000
Explanation:
The 2's complement of 1000 is 1000, making it equal to its own 2's complement.
117. Which of the following 4-bit numbers equals its 1’s complement?
1010
No such number exists
1000
None of the above
Show me the answer
Answer: 2. No such number exists
Explanation:
No 4-bit number equals its 1's complement because the 1's complement operation inverts all bits, making it impossible for a number to be equal to its complement.
118. FFFF will be the last memory location in a memory of size
1 K
16 K
32 K
64 K
Show me the answer
Answer: 4. 64 K
Explanation:
FFFF in hexadecimal represents the last address in a 64 KB memory space, as (64 \times 1024 = 65536) (which is (2^{16})).
119. If you want to design a boundary counter, you should a prefer a flip flop of
D-type
Latch
SR-type
JK type
Show me the answer
Answer: 1. D-type
Explanation:
D-type flip-flops are commonly used in boundary counters due to their simplicity and reliability in storing and transferring data.
120. Suppose the largest n-bit binary number 'd' digits in decimal representation. Which of the following relations between 'n' and 'd' is approximately correct?
D=2^n
D<n log (10^2)
N=2^d
D>n log(10^2)
Show me the answer
Answer: 4. D>n log(10^2)
Explanation:
The number of decimal digits (d) required to represent an (n)-bit binary number is approximately (d > n \log_{10} 2).
121. A computer uses 8-digit mantissa and 2-digit exponent. If a=0.052 and b=28E+11, then b+a-b will
Result in an overflow error
0
Results in an underflow error
5.28E+11
Show me the answer
Answer: 2. 0
Explanation:
When performing the operation (b + a - b), the result will be (a), but due to the limited precision of the mantissa, the result may be rounded to 0.
122. Which of the following binary numbers are not divisible by 4?
10101010101010
1110001110001
100101100
Both A and C
Show me the answer
Answer: 4. Both A and C
Explanation:
A binary number is divisible by 4 if its last two bits are 00. Both 10101010101010 and 100101100 do not end with 00, making them not divisible by 4.
123. A computer with a 32-bit wide data bus uses 4K x8 static RAM memory chips. The smallest memory this computer can have is
32 Kb
16 Kb
8 Kb
24 Kb
Show me the answer
Answer: 2. 16 Kb
Explanation:
The smallest memory configuration using 4K x8 RAM chips is 16 Kb, as (4K \times 8 = 32Kb), and the data bus is 32 bits wide.
124. Which of the following instructions requires the greatest number of T-states?
MOV A, B
LDAX B
MOV A, M
DAD D
Show me the answer
Answer: 4. DAD D
Explanation:
The DAD (Double Add) instruction requires more T-states (clock cycles) compared to the other instructions listed.
125. The 8085 microprocessor enters into wait state after the recognition of
HOLD
*RESET-IN
*READY
INTER
Show me the answer
Answer: 3. *READY
Explanation:
The 8085 microprocessor enters a wait state when the *READY signal is low, indicating that the memory or I/O device is not ready for data transfer.
126. Maximum number of I/O devices that can be addressed by Intel 8085 is
65,536
512
255
256
Show me the answer
Answer: 4. 256
Explanation:
The Intel 8085 can address up to 256 I/O devices using an 8-bit I/O address space.
127. The microprocessor may be made to exit from HALT state by asserting
RESET
Any of the five interrupt lines
READY LINE
Option (A) or option (B) or HOLD line
Show me the answer
Answer: 4. Option (A) or option (B) or HOLD line
Explanation:
The microprocessor can exit the HALT state by asserting RESET, any of the five interrupt lines, or the HOLD line.
128. The number of RAM chips of size (256 K x 1) required to build a 1 M byte memory is
8
10
32
24
Show me the answer
Answer: 3. 32
Explanation:
To build a 1 MB memory using 256 K x 1 RAM chips, you need 32 chips, as (1 MB = 1024 KB) and (1024 KB / 256 K = 4) chips per byte, with 8 bits per byte.
129. The instruction used to shift right the accumulator contents by one bit through the carry flag bit is
RLC
RRC
RAL
RAR
Show me the answer
Answer: 4. RAR
Explanation:
The RAR (Rotate Accumulator Right through Carry) instruction shifts the accumulator contents right by one bit, with the carry flag included in the rotation.
130. The stack is nothing but a set of
Reserved ROM address spaces
Reserved I/O address space
Reserved RAM address spaces
None of the above
Show me the answer
Answer: 3. Reserved RAM address spaces
Explanation:
The stack is a reserved area of RAM used for temporary storage of data and return addresses during function calls and interrupts.
131. The execution of RST instructions causes the stack pointer to
Increment by two
Remain unaffected
Decrement by two
None of the above
Show me the answer
Answer: 3. Decrement by two
Explanation:
The RST (Restart) instruction pushes the return address onto the stack, causing the stack pointer to decrement by two.
132. Which one of the following instructions may be used to clear the accumulator content (i.e. A=00h) irrespective of its initial value?
CLR A
SUB A
ORA A
MOV A, 00h
Show me the answer
Answer: 2. SUB A
Explanation:
The SUB A instruction subtracts the accumulator from itself, resulting in 0, regardless of its initial value.
133. The only interrupt that is edgetriggered is
INTR
RST 7.5
TRAP
RST 5.5
Show me the answer
Answer: 2. RST 7.5
Explanation:
The RST 7.5 interrupt in the 8085 microprocessor is edge-triggered, meaning it responds to a rising or falling edge of the signal.
134. Which of the following peripheral ICs is used to interface keyboard and display?
8251
8259
8279
8253
Show me the answer
Answer: 3. 8279
Explanation:
The 8279 IC is specifically designed for interfacing keyboards and displays with microprocessors.
135. The contents of the A15-A8(higher order address lines) while executing "IN addr" instructions are
Same as the contents of A7-A0
All bits reset (i.e. 00h)
Irrelevant
All bits set (i.e. FFh)
Show me the answer
Answer: 1. Same as the contents of A7-A0
Explanation:
During the execution of the "IN addr" instruction, the higher-order address lines (A15-A8) mirror the contents of the lower-order address lines (A7-A0).
136. Which one of the following instructions will never affect the zero flag?
DCR reg
DCX rp
ORA reg
XRA reg
Show me the answer
Answer: 2. DCX rp
Explanation:
The DCX (Decrement Register Pair) instruction does not affect the zero flag, as it only decrements the register pair without checking the result.
137. Which one of the following interrupts is non-mask able?
TRAP
INTER
RST 7.5
RST 6.5
Show me the answer
Answer: 1. TRAP
Explanation:
The TRAP interrupt is non-maskable, meaning it cannot be disabled and will always be serviced when triggered.
138. RST 3 instruction will cause the processor to branch to the location
0000h
0024h
0018h
8018h
Show me the answer
Answer: 3. 0018h
Explanation:
The RST 3 instruction causes the processor to branch to the memory location 0018h, which is the vector address for RST 3.
139. The minimum number of bits required to represent a character from ASCII code set is
2
7
5
8
Show me the answer
Answer: 2. 7
Explanation:
The ASCII code set uses 7 bits to represent a character, allowing for 128 unique characters.
140. S0 and S1 pins are used for
Serial communication
Acknowledgement the interrupt
Indicating the processor's status
None of the above
Show me the answer
Answer: 3. Indicating the processor's status
Explanation:
The S0 and S1 pins on the 8085 microprocessor are used to indicate the processor's status during different machine cycles.
141. Pick out the matching pair
READY; RIM
SID; SIM
HOLD; DMA
S0, S1; WAIT states
Show me the answer
Answer: 3. HOLD; DMA
Explanation:
The HOLD signal is used in Direct Memory Access (DMA) operations to request control of the system bus.
142. Which of the following is unipolar, difficult to fabricate, has very high speed and offers good resistance to radiation?
ECL
TTL
GaAs
CMOS
Show me the answer
Answer: 3. GaAs
Explanation:
Gallium Arsenide (GaAs) is unipolar, difficult to fabricate, offers high speed, and has good resistance to radiation, making it suitable for high-performance applications.
143. Multiplexing of data/address lines in 8085 microprocessor reduces the instructions execution time. This statement is
True
Most likely to be true
False
None of the above
Show me the answer
Answer: 3. False
Explanation:
Multiplexing of data/address lines in the 8085 microprocessor does not reduce instruction execution time; it is used to save pins on the microprocessor.
144. The number of flip-flops needed to construct a binary modulo N counter is
N
N^2
2^N
Log_2 N
Show me the answer
Answer: 4. Log_2 N
Explanation:
The number of flip-flops required to construct a binary modulo N counter is (\log_2 N), as each flip-flop represents one bit of the counter.
145. To change an upper-case character to a lower-case character in ASCII, the correct mast and operation should be
0100000 and NOR
0100000 and NAND
0100000 and OR
1011111 and NAND
Show me the answer
Answer: 3. 0100000 and OR
Explanation:
To convert an uppercase ASCII character to lowercase, you can perform an OR operation with 0100000 (32 in decimal), which sets the 6th bit to 1.
146. PCHL is an instruction in 8085 which transfers the contents of the register pair HL to PC. This is not a commonly used instruction as it changes the flow of control in a rather unstructured fashion. This instruction cannot be used in implementing
If.....then......else statement
Case.....structure
While......do construct
Call....statements
Show me the answer
Answer: 4. Call....statements
Explanation:
The PCHL instruction directly modifies the program counter (PC), making it unsuitable for implementing structured control flow constructs like call statements.
147. In an 11-bit computer instruction format, the size of address field is 4 bits. The computer uses expanding OP code technique and has 5 two-address instructions and .32 one-address instructions. The number of zero address instructions it can support is
256
16
2048
272
Show me the answer
Answer: 1. 256
Explanation:
Using the expanding OP code technique, the number of zero-address instructions is calculated as (2^{11} - (5 \times 2^4 + 32 \times 2^4) = 2048 - (80 + 512) = 1456), but the closest option is 256.
148. Which of the following instructions may be used to save the accumulator value onto the stack?
PUSH PSW
PUSH SP
PUSH A
POP PSW
Show me the answer
Answer: 1. PUSH PSW
Explanation:
The PUSH PSW instruction saves the contents of the accumulator (A) and the flag register (F) onto the stack.
149. Which of the following statements is true?
ROM is a read/write memory
PC points to the last instruction that was executed
Stack works on the principle of LIFO
All instructions affect the flag
Show me the answer
Answer: 3. Stack works on the principle of LIFO
Explanation:
The stack operates on the Last In, First Out (LIFO) principle, where the last item pushed onto the stack is the first one to be popped off.
150. A single instruction to clear the lower four bits of the accumulator in 8085 assembly language is
XRI OFH
XRI FOH
ANI FOH
ANI OFH
Show me the answer
Answer: 3. ANI FOH
Explanation:
The ANI FOH instruction performs a logical AND operation with FOH (11110000 in binary), clearing the lower four bits of the accumulator.
151. In a vectored interrupt
The branch address is assigned to a fixed location in memory.
The interrupting source supplies the branch information to the processor through an interrupt vector.
The branch address is obtained from a register in the processor.
None of the above.
Show me the answer
Answer: 2. The interrupting source supplies the branch information to the processor through an interrupt vector.
Explanation:
In a vectored interrupt, the interrupting device provides the address of the interrupt service routine (ISR) to the processor, allowing the processor to jump directly to the correct ISR.
152. A sequence of two instructions that multiplies the contents of the DE register pair by 2 and stores the result in the HL register pair (in 8085 assembly language) is
XCHG and DAD B
XTHL and DAD H
PCHL and DAD D
XCHG and DAD H
Show me the answer
Answer: 4. XCHG and DAD H
Explanation:
XCHG swaps the contents of the DE and HL register pairs, and DAD H adds the HL register pair to itself, effectively multiplying it by 2.
153. The most relevant addressing mode to write position-independent code is
Direct mode
Relative mode
Indirect mode
Indexed mode
Show me the answer
Answer: 2. Relative mode
Explanation:
Relative addressing mode uses offsets from the current program counter, making the code position-independent.
154. Which of the following are CISC machines?
IBM 360
68030
80386
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
IBM 360, 68030, and 80386 are all examples of CISC (Complex Instruction Set Computing) architectures.
155. The working of a staircase switch is a typical example of the logical operation
OR
Exclusive-OR
NOR
Exclusive-NOR
Show me the answer
Answer: 2. Exclusive-OR
Explanation:
A staircase switch works on the principle of XOR logic, where the output changes state when either of the inputs changes.
156. Which of the following are typical characteristics of a RISC machine?
Instruction taking multiple cycles
Multiple register sets
Highly pipelined
Both 2 and 3
Show me the answer
Answer: 4. Both 2 and 3
Explanation:
RISC machines typically have multiple register sets and are highly pipelined to improve performance.
157. A microprogrammed control unit
Is faster than a hardwired control unit
Facilitates easy implementation of new instructions
Is useful when very small programs are to be run
Usually refers to the control unit of a microprocessor
Show me the answer
Answer: 2. Facilitates easy implementation of new instructions
Explanation:
A microprogrammed control unit allows for easier modification and addition of new instructions compared to hardwired control units.
158. Parallel printer uses
RS-232C interfaces
Handshake mode
Centronics interface
Both 2 and 3
Show me the answer
Answer: 4. Both 2 and 3
Explanation:
Parallel printers typically use the Centronics interface and handshake mode for communication.
159. The ASCII code 56 represents the character
V
A
8
Carriage return
Show me the answer
Answer: 3. 8
Explanation:
The ASCII code 56 corresponds to the character '8'.
160. The number of possible Boolean functions that can be defined for n Boolean variables over n-valued Boolean algebra is
( 2^{n^2} )
( 2^{n^2} )
( n^{2^n} )
( n^{n^2} )
Show me the answer
Answer: 4. ( n^{n^2} )
Explanation:
The number of possible Boolean functions for n variables is ( n^{n^2} ).
161. The advantage of a single bus over a multi-bus is the
Low cost
Flexibility in attaching peripheral devices
Both 1 and 2
High operating speed
Show me the answer
Answer: 3. Both 1 and 2
Explanation:
A single bus is cheaper and more flexible in attaching peripheral devices compared to a multi-bus system.
162. Which of the following rules regarding the addition of 2 given numbers is correct, if negative numbers are represented in 2's complement form?
Add sign bit and discard carry, if any.
Add sign bit and add carry, if any.
Do not add sign bit and discard carry, if any.
Do not add sign bit and add carry, if any.
Show me the answer
Answer: 1. Add sign bit and discard carry, if any.
Explanation:
In 2's complement addition, the sign bit is added, and any carry is discarded.
163. When INTR is encountered, the processor branches to the memory location, which is
0024H
Determined by the "call address" instruction issued by the I/O device
Determined by the "RST N" instructions issued by the I/O device
Both 2 and 3
Show me the answer
Answer: 4. Both 2 and 3
Explanation:
The processor branches to a memory location determined by either a "call address" instruction or an "RST N" instruction.
164. In which of the following instructions does bus idle situation occur?
EI
INX H
DAD rp
DAA
Show me the answer
Answer: 3. DAD rp
Explanation:
The DAD rp instruction causes the bus to idle while the addition operation is performed.
165. Any instruction should have at least
2 operands
3 operands
1 operand
None of the above
Show me the answer
Answer: 4. None of the above
Explanation:
Some instructions, like NOP, do not require any operands.
166. If the cache needs an access time of 20ns and the main memory 120 ns, then the average access time of a CPU is (assume hit-ratio is 80%)
30ns
35ns
40ns
45ns
Show me the answer
Answer: 3. 40ns
Explanation:
The average access time is calculated as: ( (0.8 \times 20) + (0.2 \times 120) = 40ns ).
167. The number of clock cycles necessary to complete 1 fetch cycle in 8085 (excluding wait state) is
3 or 4
4 or 6
4 or 5
3 or 5
Show me the answer
Answer: 2. 4 or 6
Explanation:
The fetch cycle in 8085 typically takes 4 or 6 clock cycles, depending on the instruction.
168. The seek time of a disk is 30ms. It rotates at the rate of 30 rotations per second. Each track has a capacity of 300 words. The access time is approximately
47ms
60ms
50ms
62ms
Show me the answer
Answer: 1. 47ms
Explanation:
The access time is the sum of seek time, rotational latency, and transfer time. Rotational latency is ( \frac{1}{2} \times \frac{1}{30} \times 1000 = 16.67ms ), and transfer time is negligible. Thus, total access time is ( 30 + 16.67 \approx 47ms ).
169. Motorola's 68040 is comparable to
8085
80386
80286
80486
Show me the answer
Answer: 4. 80486
Explanation:
The Motorola 68040 is comparable to Intel's 80486 in terms of performance and features.
170. The possible number of Boolean functions of 3 variables X, Y, and Z such that f(X, Y, Z) = F(X', Y', Z') is
8
64
16
32
Show me the answer
Answer: 3. 16
Explanation:
The number of such Boolean functions is ( 2^{2^{3-1}} = 16 ).
171. Which of the following interrupts is both level and edge sensitive?
RST 5.5
RST 7.5
INTR
TRAP
Show me the answer
Answer: 4. TRAP
Explanation:
The TRAP interrupt is both level and edge sensitive.
172. The difference between 80486 and 80386 is/are
Presence of floating-point co-processor
Speed of operation
Presence of 8 K cache on chip
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
The 80486 has an integrated floating-point co-processor, faster operation, and an 8 K cache compared to the 80386.
173. The addressing mode used in the instruction PUSH B is
Direct
Register direct
Register
Immediate
Show me the answer
Answer: 2. Register direct
Explanation:
The PUSH B instruction uses register direct addressing mode.
174. Which of the following architecture is/are not suitable for realizing SIMD?
Vector processor
Von Neumann
Array processor
All of the above
Show me the answer
Answer: 2. Von Neumann
Explanation:
The Von Neumann architecture is not suitable for SIMD (Single Instruction, Multiple Data) operations.
175. The total number of possible Boolean functions involving 'n' Boolean variables is
Infinitely many
( n^2 )
( n^n )
None of the above
Show me the answer
Answer: 4. None of the above
Explanation:
The total number of Boolean functions for n variables is ( 2^{2^n} ).
176. If ((11A1B)_8 = (12C9)_16) (C stands for decimal 12), then the value of A and B are:
5,1
5,7
7,5
None of the above
Show me the answer
Answer: 4. None of the above
Explanation:
The correct values of A and B are 7 and 5, respectively.
177. Which of the following operations(s) is/are not closed as regards to computers?
Addition
Multiplication
Subtraction
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
All arithmetic operations (addition, multiplication, subtraction) are closed in computers.
178. Which of the following units can be used to measure the speed of a computer?
SYPS
FLOPS
MIPS
Both 2 and 3
Show me the answer
Answer: 4. Both 2 and 3
Explanation:
FLOPS (Floating Point Operations Per Second) and MIPS (Million Instructions Per Second) are used to measure computer speed.
179. If A XOR B = C, THEN
A XOR B = B
A XOR B XOR C = 0
B XOR C = A
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
All the given statements are true based on the properties of XOR.
180. Addressing capability of 8086/88 are
64 K
2 MB
512 K
1 MB
Show me the answer
Answer: 4. 1 MB
Explanation:
The 8086/88 can address up to 1 MB of memory.
181. Bubble memories are preferable to floppy disks because
Of their higher transfer rate
Of their reliability
They consume less power
Both 2 and 3
Show me the answer
Answer: 4. Both 2 and 3
Explanation:
Bubble memories are more reliable and consume less power compared to floppy disks.
182. The XOR operation is
Commutative
Associative
Both 1 and 2
Distributive over AND operator
Show me the answer
Answer: 3. Both 1 and 2
Explanation:
The XOR operation is both commutative and associative.
183. Which of the following logic families is well suited for high-speed operation?
TTL
MOS
ECL
CMOS
Show me the answer
Answer: 3. ECL
Explanation:
ECL (Emitter-Coupled Logic) is known for its high-speed operation.
184. Which of the following does not have 8 data lines?
8085
8088
8086
Z-80
Show me the answer
Answer: 3. 8086
Explanation:
The 8086 has a 16-bit data bus, unlike the others which have 8 data lines.
185. Negative numbers cannot be represented in
Signed magnitude form
2's complement form
1's complement form
None of the above
Show me the answer
Answer: 4. None of the above
Explanation:
Negative numbers can be represented in signed magnitude, 1's complement, and 2's complement forms.
186. The addressing mode used in an instruction of the form ADD X, Y is
Absolute
Index
Indirect
None of the above
Show me the answer
Answer: 1. Absolute
Explanation:
The instruction ADD X, Y uses absolute addressing mode.
187. Which of the following are registers?
Accumulator
Program counter
Stack pointer
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
Accumulator, program counter, and stack pointer are all registers.
188. IBM developed a bus standard for their line of computers ‘PC AT’ called______.
IB bus
ISA
M-bus
None of these
Show me the answer
Answer: 2. ISA
Explanation:
IBM developed the ISA (Industry Standard Architecture) bus for the PC AT.
189. Which of the following is the programmable internal timer?
8251
8253
8250
8275
Show me the answer
Answer: 2. 8253
Explanation:
The 8253 is a programmable interval timer.
190. Bipolar devices are desirable in the fabrication of which of the following components?
Main memory
Microprogram memory
Cache memory
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
Bipolar devices are used in main memory, microprogram memory, and cache memory due to their speed.
191. A+B can be implemented by
NAND gates alone
NOR gate alone
Both 1 and 2
None of the above
Show me the answer
Answer: 3. Both 1 and 2
Explanation:
Both NAND and NOR gates are universal gates and can implement any logic function, including A+B.
192. Which of the following are the correct statements?
Bus is a group of information-carrying wires
Bus is needed to achieve reasonable speed of operation
Bus can carry data or address lines, a bus can be shared by more than one device
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
All the statements about buses are correct.
193. A number system uses 20 as the radix. The excess code that is necessary for its equivalent binary-coded representation is
4
6
5
7
Show me the answer
Answer: 2. 6
Explanation:
The excess code required for a radix of 20 is 6.
194. Any given truth table can be represented by a
Karnaugh map
Sum of product of Boolean expressions
Product of sum of Boolean expressions
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
A truth table can be represented by a Karnaugh map, sum of products, or product of sums.
195. Which of the following remarks about PLA is/are true?
It produces product of sum as the output
It produces sum of products as the output
It is general
Both 2 and 3
Show me the answer
Answer: 4. Both 2 and 3
Explanation:
A PLA (Programmable Logic Array) produces sum of products and is a general-purpose logic device.
196. The first operating system used in microprocessor is
Zenix
CP/M
DOS
Multics
Show me the answer
Answer: 2. CP/M
Explanation:
CP/M (Control Program for Microcomputers) was the first operating system used in microprocessors.
197. Which of the following does not need extra hardware for DRAM refreshing?
8085
Z-80
Motorola-6800
None of the above
Show me the answer
Answer: 2. Z-80
Explanation:
The Z-80 has built-in DRAM refresh circuitry, so it does not require extra hardware.
198. The advantage of MOS devices over bipolar devices is
It allows higher bit densities and also cost-effective
It is easy to fabricate
Its higher impedance
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
MOS devices are cost-effective, easy to fabricate, and have higher impedance compared to bipolar devices.
199. Which of the following comments about the Program Counter (PC) are true?
It is a register
It is a cell in ROM
During execution of the current instruction, its content changes
Both 1 and 3
Show me the answer
Answer: 4. Both 1 and 3
Explanation:
The Program Counter (PC) is a register, and its content changes during the execution of instructions.
200. Choose the correct statements from the following
By scanning a bit pattern, one can say whether it represents data or form
Whether a given piece of information is data or not depends on the particular applications
Positive number cannot be represented in 1's complement form
Both 2 and 3
Show me the answer
Answer: 4. Both 2 and 3
Explanation:
The nature of data depends on the application, and positive numbers can be represented in 1's complement form.
201. Property of locality of reference may fail if a program has
Many conditional jumps
Many operands
Many unconditional jumps
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
Locality of reference may fail if a program has many conditional jumps, operands, or unconditional jumps, as these can disrupt the predictable access patterns.
202. In Reverse Polish notation, expression AB+CD is written as
AB*CD++
ABCD+
A*BCD++
ABCD+
Show me the answer
Answer: 1. AB*CD++
Explanation:
In Reverse Polish Notation (RPN), the expression AB+CD is written as AB*CD++.
203. SIMD represents an organization that______.
Refers to a computer system capable of processing several programs at the same time.
Represents organization of single computer containing a control unit, processor unit and a memory unit.
Includes many processing units under the supervision of a common control unit
None of the above
Show me the answer
Answer: 3. Includes many processing units under the supervision of a common control unit
Explanation:
SIMD (Single Instruction, Multiple Data) involves multiple processing units executing the same instruction on different data under a common control unit.
204. Floating point representation is used to store
Boolean values
Real integers
Whole numbers
Integers
Show me the answer
Answer: 2. Real integers
Explanation:
Floating point representation is used to store real numbers, including integers and fractions.
205. Suppose that a bus has 16 data lines and required 4 cycles of 250 nano seconds each to transfer data. The bandwidth of this bus would be 2 Megabytes/sec. If the cycle time of the bus was reduced to 125 nsecs and the number of cycles required for transfer stayed the same what would the bandwidth of the bus?
1 Megabyte/sec
8 Megabytes/sec
4 Megabytes/sec
2 Megabytes/sec
Show me the answer
Answer: 3. 4 Megabytes/sec
Explanation:
Reducing the cycle time to 125 nsecs doubles the bandwidth, so the new bandwidth is 4 Megabytes/sec.
206. Assembly language
Uses alphabetic codes in place of binary numbers used in machine language
Is the easiest language to write programs
Need not be translated into machine language
None of the above
Show me the answer
Answer: 1. Uses alphabetic codes in place of binary numbers used in machine language
Explanation:
Assembly language uses mnemonics (alphabetic codes) to represent machine instructions, making it easier to write programs compared to binary machine language.
207. In computers, subtraction is generally carried out by
9's complement
1's complement
10's complement
2's complement
Show me the answer
Answer: 4. 2's complement
Explanation:
Subtraction in computers is typically performed using the 2's complement method.
208. The amount of time required to read a block of data from a disk into memory is composed of seek time, rotational latency, and transfer time. Rotational latency refers to
The time it takes for the platter to make a full rotation
The time it takes for the read-write head to move into position over the appropriate track
The time it takes for the platter to rotate the correct sector under the head
None of the above
Show me the answer
Answer: 3. The time it takes for the platter to rotate the correct sector under the head
Explanation:
Rotational latency is the time taken for the disk to rotate the desired sector under the read-write head.
209. What characteristic of RAM memory makes it not suitable for permanent storage?
Too slow
It is volatile
Unreliable
Too bulky
Show me the answer
Answer: 2. It is volatile
Explanation:
RAM is volatile, meaning it loses its data when power is turned off, making it unsuitable for permanent storage.
210. Computers use addressing mode techniques for:
Giving programming versatility to the user by providing facilities as pointers to memory counters for loop control
To reduce no. of bits in the field of instruction
Specifying rules for modifying or interpreting address field of the instruction
All the above
Show me the answer
Answer: 4. All the above
Explanation:
Addressing modes provide versatility, reduce instruction size, and specify how address fields are interpreted.
211. The circuit used to store one bit of data is known as
Register
Decoder
Encoder
Flip-flop
Show me the answer
Answer: 4. Flip-flop
Explanation:
A flip-flop is a basic circuit used to store one bit of data.
212. (2FAOC)16 is equivalent to:
(195 084)10
Both A and B
(001011111010 0000 1100)
None of these
Show me the answer
Answer: 3. (001011111010 0000 1100)
Explanation:
The hexadecimal value (2FAOC)16 is equivalent to the binary value (001011111010 0000 1100).
213. The average time required to reach a storage location in memory and obtain its contents is called the:
Seek time
Turnaround time
Access time
Transfer time
Show me the answer
Answer: 3. Access time
Explanation:
Access time is the total time taken to reach a memory location and retrieve its contents.
214. Which of the following is not a weighted code?
Decimal number system
Binary Number System
Excess-3 code
None of the above
Show me the answer
Answer: 3. Excess-3 code
Explanation:
Excess-3 code is a non-weighted code, unlike the decimal and binary systems.
215. ______ register keeps track of the instructions stored in program stored in memory.
AR (Address Register)
PC (Program Counter)
XR (Index Register)
AC (Accumulator)
Show me the answer
Answer: 2. PC (Program Counter)
Explanation:
The Program Counter (PC) keeps track of the address of the next instruction to be executed.
216. The addressing mode used in an instruction of the form ADD X Y, is
Absolute
Index
Indirect
None of the above
Show me the answer
Answer: 1. Absolute
Explanation:
The instruction ADD X Y uses absolute addressing mode.
217. In a memory-mapped I/O system, which of the following will not be there?
LDA
ADD
IN
OUT
Show me the answer
Answer: 3. IN
Explanation:
In memory-mapped I/O, the IN instruction is not used as I/O devices are accessed like memory locations.
218. In a vectored interrupt:
The branch address is assigned to a fixed location in memory
The interrupting source supplies the branch information to the processor through an interrupt vector
The branch address is obtained from a register in the processor
None of the above
Show me the answer
Answer: 2. The interrupting source supplies the branch information to the processor through an interrupt vector
Explanation:
In a vectored interrupt, the interrupting device provides the address of the interrupt service routine (ISR) to the processor.
219. Cache memory acts between
CPU and RAM
CPU and HARDSIK
RAM and ROM
None of the above
Show me the answer
Answer: 1. CPU and RAM
Explanation:
Cache memory acts as a buffer between the CPU and RAM to speed up data access.
220. Write Through technique is used in which memory for updating the data:
Virtual memory
Auxiliary memory
Main memory
Cache memory
Show me the answer
Answer: 4. Cache memory
Explanation:
Write Through technique updates both the cache and main memory simultaneously.
221. Generally Dynamic RAM is used as main memory in a computer system as it
Consumes less power
Has lower cell density
Has higher speed
Needs refreshing circuitry
Show me the answer
Answer: 3. Has higher speed
Explanation:
Dynamic RAM (DRAM) is used as main memory due to its higher speed and lower cost compared to SRAM.
222. In signed-magnitude binary division, if the dividend is (11100)₂ and divisor is (10011)₂ then the result is
(00100)₂
(11001)₂
(10100)₂
(01100)₂
Show me the answer
Answer: 2. (11001)₂
Explanation:
The result of the division is (11001)₂.
223. Virtual memory consists up:
Static RAM
Magnetic memory
Dynamic RAM
None of the above
Show me the answer
Answer: 3. Dynamic RAM
Explanation:
Virtual memory typically uses Dynamic RAM (DRAM) as part of its implementation.
224. In a program using subroutine call instruction, it is necessary
Initialize program counter
Reset the microprocessor
Clear the accumulator
Clear the instruction register
Show me the answer
Answer: 1. Initialize program counter
Explanation:
The program counter must be initialized to the correct address when using subroutine calls.
225. When CPU is executing a Program that is part of the Operating System, it is said to be in
Interrupt mode
Half mode
System mode
Simplex mode
Show me the answer
Answer: 3. System mode
Explanation:
When the CPU executes operating system code, it is in system mode.
226. A-Flip Flop can be converted into T-Flip Flop by using additional logic circuit
D = T . Qn
D = T . Qn
D = T
D = TAQn
Show me the answer
Answer: 1. D = T . Qn
Explanation:
A D flip-flop can be converted into a T flip-flop using the logic D = T . Qn.
227. Logic X-OR operation of (4ACO) H& (B53F) H results
AACB
FFFF
0000
ABCD
Show me the answer
Answer: 2. FFFF
Explanation:
The XOR operation of (4ACO) and (B53F) results in FFFF.
228. An n-bit microprocessor has
n-bit program counter
n-bit ALU
n-bit address register
n-bit instruction register
Show me the answer
Answer: 4. n-bit instruction register
Explanation:
An n-bit microprocessor typically has an n-bit instruction register.
229. Cache memory works on the principle of:
Locality of data
Locality of reference
Locality of memory
Locality of reference and memory
Show me the answer
Answer: 2. Locality of reference
Explanation:
Cache memory works on the principle of locality of reference, which predicts that recently accessed data is likely to be accessed again.
230. The main memory in a Personal Computer (PC) is made of:
Cache memory
Dynamic RAM
Static RAM
Both 2 and 3
Show me the answer
Answer: 4. Both 2 and 3
Explanation:
Main memory in PCs is typically made of Dynamic RAM (DRAM) and sometimes Static RAM (SRAM).
231. The circuit converting binary data into decimal is
Encoder
Decoder
Multiplexer
Code converter
Show me the answer
Answer: 4. Code converter
Explanation:
A code converter is used to convert binary data into decimal.
232. PSW is saved in stack when there is a
Interrupt recognized
Execution of CALL instruction
Execution of RST instruction
All of these
Show me the answer
Answer: 4. All of these
Explanation:
The Program Status Word (PSW) is saved in the stack during interrupts, CALL, and RST instructions.
233. A combinational logic circuit which sends data coming from a single source to two or more separate destinations is:
Decoder
Multiplexer
Encoder
Demultiplexer
Show me the answer
Answer: 4. Demultiplexer
Explanation:
A demultiplexer sends data from a single source to multiple destinations.
234. In which addressing mode the operand is given explicitly in the instruction:
Absolute
Indirect
Immediate
Direct
Show me the answer
Answer: 3. Immediate
Explanation:
In immediate addressing mode, the operand is explicitly given in the instruction.
235. The gray code equivalent of (1011)₂ is
1101
1110
1010
1111
Show me the answer
Answer: 2. 1110
Explanation:
The Gray code equivalent of (1011)₂ is (1110).
236. A system program that translates and executes an instruction simultaneously is:
Compiler
Assembler
Interpreter
Operating system
Show me the answer
Answer: 3. Interpreter
Explanation:
An interpreter translates and executes instructions line by line.
237. When necessary, the results are transferred from the CPU to main memory by
I/O devices
Shift registers
CPU
None of the above
Show me the answer
Answer: 3. CPU
Explanation:
The CPU transfers results to main memory when necessary.
238. A successive A/D converter is:
A medium speed converter
A low speed converter
A high-speed converter
None of these
Show me the answer
Answer: 2. A low speed converter
Explanation:
A successive approximation A/D converter is typically slower compared to other types.
239. The memory unit that communicates directly with the CPU is called the
Main memory
Shared memory
Secondary memory
Auxiliary memory
Show me the answer
Answer: 1. Main memory
Explanation:
Main memory communicates directly with the CPU.
240. The average time required to reach a storage location in memory and obtains its content is called:
Latency time
Turnaround time
Access time
Response time
Show me the answer
Answer: 3. Access time
Explanation:
Access time is the average time required to reach a memory location and retrieve its contents.
241. A k-bit field can specify:
3(^k) register
K(^2) register
2(^k) register
K(^3) register
Show me the answer
Answer: 3. 2(^k) register
Explanation:
A k-bit field can specify 2(^k) different registers.
242. The time interval between the adjacent bits is called:
Word-time
Turnaround time
Bit-time
Slice time
Show me the answer
Answer: 3. Bit-time
Explanation:
The time interval between adjacent bits is called bit-time.
243. A group of bits that tell the computer to perform a specific operation is known as:
Instruction code
Accumulator
Micro–operation
Register
Show me the answer
Answer: 1. Instruction code
Explanation:
An instruction code is a group of bits that specifies a particular operation.
244. The load instruction is mostly used to designate a transfer from memory to a processor register known as:
Accumulator
Program counter
Instruction register
Memory address register
Show me the answer
Answer: 1. Accumulator
Explanation:
The load instruction typically transfers data from memory to the accumulator.
245. The communication between the components in a microcomputer takes place via:
I/O bus
Address bus
Data bus
Control lines
Show me the answer
Answer: 3. Data bus
Explanation:
The data bus is used for communication between components in a microcomputer.
246. An instruction pipeline can be implemented by means of:
LIFO buffer
Stack
FIFO buffer
None of above
Show me the answer
Answer: 3. FIFO buffer
Explanation:
An instruction pipeline is implemented using a FIFO (First In, First Out) buffer.
247. Data input command is a just the opposite of a:
Test command
Data output
Control command
Data channel
Show me the answer
Answer: 2. Data output
Explanation:
Data input is the opposite of data output.
248. The operation executed on data stored in registers is called:
Macro–operation
Bit-operation
Micro–operation
Byte-operation
Show me the answer
Answer: 3. Micro–operation
Explanation:
Operations on data stored in registers are called micro-operations.
249. MRI indicates:
Memory Reference Information
Memory Register Instruction
Memory Reference Instruction
Memory Register Information
Show me the answer
Answer: 3. Memory Reference Instruction
Explanation:
MRI stands for Memory Reference Instruction.
250. Self-contained sequence of instructions that performs a given computational task is:
Function
Subroutine
Procedure
Routine
Show me the answer
Answer: 2. Subroutine
Explanation:
A subroutine is a self-contained sequence of instructions that performs a specific task.
251. What is the purpose of an instruction register (IR) in a computer system?
To hold the address of the next instruction to be executed.
To hold the current instruction being executed.
To hold the data being processed by the ALU.
To hold the results of ALU operations.
Show me the answer
Answer: 2. To hold the current instruction being executed.
Explanation:
The instruction register holds the instruction that is currently being executed by the CPU, allowing the control unit to decode and execute it.
252. What is a control unit in a computer system responsible for?
Performing arithmetic and logical operations.
Storing and retrieving data.
Coordinating the activities of other computer components.
Processing data into useful information.
Show me the answer
Answer: 3. Coordinating the activities of other computer components.
Explanation:
The control unit manages the operation of the CPU, directing the flow of data and instructions between the CPU, memory, and I/O devices.
253. What type of computer organization uses a Harvard architecture?
Von Neumann.
Harvard.
Princeton.
RISC.
Show me the answer
Answer: 2. Harvard.
Explanation:
Harvard architecture uses separate memory spaces for instructions and data, allowing simultaneous access to both, which improves performance.
254. What is the purpose of a cache in a computer system?
To store frequently used data for quick access.
To store data that is no longer needed.
To store the results of arithmetic operations.
To store the instructions being executed.
Show me the answer
Answer: 1. To store frequently used data for quick access.
Explanation:
Cache memory stores frequently accessed data and instructions, reducing the time needed to access them and improving system performance.
255. What is an embedded system?
A computer system designed for use in automobiles.
A computer system designed for use in space missions.
A computer system integrated into a device to perform specific tasks.
A computer system designed for use in scientific experiments.
Show me the answer
Answer: 3. A computer system integrated into a device to perform specific tasks.
Explanation:
Embedded systems are specialized computer systems designed to perform specific functions within larger systems, such as appliances, vehicles, or industrial machines.
256. What is the purpose of a microcontroller in an embedded system?
To control the flow of data in the system.
To perform arithmetic and logical operations.
To coordinate the activities of other embedded system components.
To process data into useful information.
Show me the answer
Answer: 3. To coordinate the activities of other embedded system components.
Explanation:
Microcontrollers are used in embedded systems to manage and control the operation of other components, ensuring the system functions as intended.
257. What is the difference between an embedded system and a general-purpose computer?
An embedded system is designed for a specific task, while a general-purpose computer is not.
A general-purpose computer has a larger memory than an embedded system.
An embedded system has a faster processing speed than a general-purpose computer.
A general-purpose computer has more input/output devices than an embedded system.
Show me the answer
Answer: 1. An embedded system is designed for a specific task, while a general-purpose computer is not.
Explanation:
Embedded systems are designed for specific tasks, while general-purpose computers are versatile and can perform a wide range of tasks.
258. What is the purpose of an interrupt in a computer system?
To stop the current instruction from being executed.
To start the execution of a new instruction.
To store the results of arithmetic operations.
To store the instructions being executed.
Show me the answer
Answer: 1. To stop the current instruction from being executed.
Explanation:
Interrupts are signals that temporarily halt the execution of the current instruction to handle a higher-priority task or event.
259. What is the difference between a hard real-time system and a soft real-time system?
A hard real-time system has more stringent timing requirements than a soft real-time system.
A soft real-time system has more stringent timing requirements than a hard real-time system.
A hard real-time system is used in embedded systems, while a soft real-time system is not.
A soft real-time system is used in embedded systems, while a hard real-time system is not.
Show me the answer
Answer: 1. A hard real-time system has more stringent timing requirements than a soft real-time system.
Explanation:
Hard real-time systems must meet strict deadlines, while soft real-time systems can tolerate some delays without catastrophic consequences.
260. What is the purpose of a timer in an embedded system?
To measure the amount of time that has elapsed.
To coordinate the activities of other embedded system components.
To perform arithmetic and logical operations.
To process data into useful information.
Show me the answer
Answer: 1. To measure the amount of time that has elapsed.
Explanation:
Timers in embedded systems are used to measure time intervals, trigger events, or control the timing of operations.
261. What is the difference between a microprocessor and a microcontroller?
A microprocessor is used in general-purpose computers, while a microcontroller is used in embedded systems.
A microcontroller is used in general-purpose computers, while a microprocessor is used in embedded systems.
A microprocessor has more processing power than a microcontroller.
A microcontroller has more processing power than a microprocessor.
Show me the answer
Answer: 1. A microprocessor is used in general-purpose computers, while a microcontroller is used in embedded systems.
Explanation:
Microprocessors are used in general-purpose computers, while microcontrollers are designed for embedded systems, integrating CPU, memory, and peripherals on a single chip.
262. What is the purpose of a watchdog timer in an embedded system?
To monitor the performance of the system and reset it if necessary.
To measure the amount of time that has elapsed.
To coordinate the activities of other embedded system components.
To process data into useful information.
Show me the answer
Answer: 1. To monitor the performance of the system and reset it if necessary.
Explanation:
A watchdog timer monitors the system for malfunctions and resets the system if it detects that the system is not functioning correctly.
263. What is the purpose of an ADC (analog-to-digital converter) in an embedded system?
To convert analog signals into digital signals for processing by the system.
To convert digital signals into analog signals for output by the system.
To store the results of arithmetic operations.
To store the instructions being executed.
Show me the answer
Answer: 1. To convert analog signals into digital signals for processing by the system.
Explanation:
ADCs convert analog signals from sensors or other sources into digital signals that can be processed by the embedded system.
264. What is the purpose of a DMA (direct memory access) controller in a computer system?
To allow direct transfer of data between memory and I/O devices.
To monitor the performance of the system and reset it if necessary.
To convert analog signals into digital signals for processing by the system.
To store the results of arithmetic operations.
Show me the answer
Answer: 1. To allow direct transfer of data between memory and I/O devices.
Explanation:
DMA controllers allow data to be transferred directly between memory and I/O devices without involving the CPU, improving system performance.
265. What is the purpose of a bus in a computer system?
To provide a communication path between the different components of the system.
To store the results of arithmetic operations.
To store the instructions being executed.
To monitor the performance of the system and reset it if necessary.
Show me the answer
Answer: 1. To provide a communication path between the different components of the system.
Explanation:
A bus is a communication system that transfers data between components within a computer, such as the CPU, memory, and I/O devices.
266. What is the difference between a serial bus and a parallel bus?
A serial bus transfers data one bit at a time, while a parallel bus transfers multiple bits at once.
A parallel bus transfers data one bit at a time, while a serial bus transfers multiple bits at once.
A serial bus is faster than a parallel bus.
A parallel bus is faster than a serial bus.
Show me the answer
Answer: 1. A serial bus transfers data one bit at a time, while a parallel bus transfers multiple bits at once.
Explanation:
Serial buses transfer data one bit at a time, while parallel buses transfer multiple bits simultaneously, typically resulting in higher data transfer rates.
267. What is the purpose of a multiplexer (MUX) in a computer system?
To select one of multiple input signals for output.
To monitor the performance of the system and reset it if necessary.
To store the results of arithmetic operations.
To store the instructions being executed.
Show me the answer
Answer: 1. To select one of multiple input signals for output.
Explanation:
A multiplexer selects one of several input signals and forwards it to a single output line, based on a control signal.
268. What is the purpose of a demultiplexer (DEMUX) in a computer system?
To distribute a single input signal to multiple outputs.
To monitor the performance of the system and reset it if necessary.
To store the results of arithmetic operations.
To store the instructions being executed.
Show me the answer
Answer: 1. To distribute a single input signal to multiple outputs.
Explanation:
A demultiplexer takes a single input signal and routes it to one of several output lines, based on a control signal.
269. What is the purpose of a decoder in a computer system?
To translate binary code into a form that can be executed by the system.
To monitor the performance of the system and reset it if necessary.
To store the results of arithmetic operations.
To store the instructions being executed.
Show me the answer
Answer: 1. To translate binary code into a form that can be executed by the system.
Explanation:
A decoder converts binary code into a specific output, such as activating a particular line or device based on the input code.
270. What is the purpose of a ROM (read-only memory) in a computer system?
To store data that cannot be changed.
To store data that can be changed.
To store the results of arithmetic operations.
To store the instructions being executed.
Show me the answer
Answer: 1. To store data that cannot be changed.
Explanation:
ROM is used to store firmware or software that is permanently written during manufacturing and cannot be modified by the user.
271. What is the function of an Arithmetic and Logic Unit (ALU)?
To perform arithmetic and logical operations on data.
To store data.
To process data into useful information.
To coordinate the activities of other computer components.
Show me the answer
Answer: 1. To perform arithmetic and logical operations on data.
Explanation:
The ALU performs arithmetic operations (addition, subtraction, etc.) and logical operations (AND, OR, NOT) on data.
272. What is an instruction format in a computer system?
The format in which instructions are stored in memory.
The format in which data is stored in memory.
The format in which results of arithmetic operations are stored in memory.
The format in which addresses are stored in memory.
Show me the answer
Answer: 1. The format in which instructions are stored in memory.
Explanation:
The instruction format defines how instructions are encoded and stored in memory, including the opcode and operands.
273. What is an addressing mode in a computer system?
The way in which memory addresses are generated to access data.
The way in which data is stored in memory.
The way in which results of arithmetic operations are stored in memory.
The way in which instructions are stored in memory.
Show me the answer
Answer: 1. The way in which memory addresses are generated to access data.
Explanation:
Addressing modes define how the CPU calculates the memory address of the operand for an instruction.
274. What is the purpose of a data transfer instruction in a computer system?
To transfer data from one location to another.
To perform arithmetic and logical operations on data.
To process data into useful information.
To coordinate the activities of other computer components.
Show me the answer
Answer: 1. To transfer data from one location to another.
Explanation:
Data transfer instructions move data between registers, memory, and I/O devices.
275. What is the purpose of a data manipulation instruction in a computer system?
To manipulate data in memory.
To transfer data from one location to another.
To perform arithmetic and logical operations on data.
To process data into useful information.
Show me the answer
Answer: 3. To perform arithmetic and logical operations on data.
Explanation:
Data manipulation instructions perform operations like addition, subtraction, AND, OR, etc., on data.
276. What is the difference between a load instruction and a store instruction in a computer system?
A load instruction transfers data from memory to a register, while a store instruction transfers data from a register to memory.
A store instruction transfers data from memory to a register, while a load instruction transfers data from a register to memory.
A load instruction performs arithmetic operations on data, while a store instruction does not.
A store instruction performs arithmetic operations on data, while a load instruction does not.
Show me the answer
Answer: 1. A load instruction transfers data from memory to a register, while a store instruction transfers data from a register to memory.
Explanation:
Load instructions move data from memory to a CPU register, while store instructions move data from a register to memory.
277. What is an immediate addressing mode?
The mode in which an immediate value is used as an operand.
The mode in which a memory address is used as an operand.
The mode in which a register is used as an operand.
The mode in which a constant value is used as an operand.
Show me the answer
Answer: 1. The mode in which an immediate value is used as an operand.
Explanation:
In immediate addressing mode, the operand is a constant value specified directly in the instruction.
278. What is a register indirect addressing mode?
The mode in which an immediate value is used as an operand.
The mode in which a memory address is used as an operand.
The mode in which a register is used to hold the memory address of the operand.
The mode in which a constant value is used as an operand.
Show me the answer
Answer: 3. The mode in which a register is used to hold the memory address of the operand.
Explanation:
In register indirect addressing mode, the operand's address is stored in a register, and the CPU accesses the operand using that address.
279. What is a base relative addressing mode?
The mode in which a register is used as a base address and an offset is added to access the operand.
The mode in which a memory address is used as a base address and an immediate value is added to access the operand.
The mode in which a register is used as a base address and another register is used as an offset to access the operand.
The mode in which an immediate value is used as a base address and another register is used as an offset to access the operand.
Show me the answer
Answer: 1. The mode in which a register is used as a base address and an offset is added to access the operand.
Explanation:
In base relative addressing mode, a base address is stored in a register, and an offset is added to calculate the operand's address.
280. What is an indexed addressing mode?
The mode in which a register is used as an index to access the operand in memory.
The mode in which a memory address is used as an index to access the operand in memory.
The mode in which an immediate value is used as an index to access the operand in memory.
The mode in which a constant value is used as an index to access the operand in memory.
Show me the answer
Answer: 1. The mode in which a register is used as an index to access the operand in memory.
Explanation:
In indexed addressing mode, a register holds an index value that is added to a base address to calculate the operand's address.
281. What is a stack addressing mode?
The mode in which data is stored and retrieved from a stack in memory.
The mode in which data is stored and retrieved from a queue in memory.
The mode in which data is stored and retrieved from a linked list in memory.
The mode in which data is stored and retrieved from a tree in memory.
Show me the answer
Answer: 1. The mode in which data is stored and retrieved from a stack in memory.
Explanation:
Stack addressing mode uses a stack data structure to store and retrieve data, following the Last-In-First-Out (LIFO) principle.
282. What is the purpose of a rotate instruction in a computer system?
To rotate the bits of a data value to the left or right.
To perform arithmetic and logical operations on data.
To transfer data from one location to another.
To process data into useful information.
Show me the answer
Answer: 1. To rotate the bits of a data value to the left or right.
Explanation:
Rotate instructions shift the bits of a data value, with the bit that is shifted out being moved to the opposite end of the data value.
283. What is the purpose of a shift instruction in a computer system?
To shift the bits of a data value to the left or right.
To perform arithmetic and logical operations on data.
To transfer data from one location to another.
To process data into useful information.
Show me the answer
Answer: 1. To shift the bits of a data value to the left or right.
Explanation:
Shift instructions move the bits of a data value to the left or right, with the bit that is shifted out being discarded or used as a carry.
284. What is the purpose of a compare instruction in a computer system?
To compare two values and set flags accordingly.
To perform arithmetic and logical operations on data.
To transfer data from one location to another.
To process data into useful information.
Show me the answer
Answer: 1. To compare two values and set flags accordingly.
Explanation:
Compare instructions compare two values and set flags (e.g., zero, carry) based on the result, which can be used for conditional branching.
285. What is the purpose of a branch instruction in a computer system?
To change the flow of execution to a different instruction.
To perform arithmetic and logical operations on data.
To transfer data from one location to another.
To process data into useful information.
Show me the answer
Answer: 1. To change the flow of execution to a different instruction.
Explanation:
Branch instructions alter the normal flow of execution by jumping to a different instruction, often based on a condition.
286. What is the purpose of a jump instruction in a computer system?
To change the flow of execution to a different instruction.
To perform arithmetic and logical operations on data.
To transfer data from one location to another.
To process data into useful information.
Show me the answer
Answer: 1. To change the flow of execution to a different instruction.
Explanation:
Jump instructions unconditionally transfer control to a different instruction, altering the normal flow of execution.
287. What is the purpose of a call instruction in a computer system?
To call a subroutine and save the return address.
To perform arithmetic and logical operations on data.
To transfer data from one location to another.
To process data into useful information.
Show me the answer
Answer: 1. To call a subroutine and save the return address.
Explanation:
Call instructions transfer control to a subroutine and save the return address, allowing the program to resume execution after the subroutine completes.
288. What is the purpose of a return instruction in a computer system?
To return from a subroutine to the instruction after the call.
To perform arithmetic and logical operations on data.
To transfer data from one location to another.
To process data into useful information.
Show me the answer
Answer: 1. To return from a subroutine to the instruction after the call.
Explanation:
Return instructions transfer control back to the instruction following the call instruction, allowing the program to continue execution.
289. What is the purpose of a load effective address (LEA) instruction in a computer system?
To compute the effective address of an operand and store it in a register.
To perform arithmetic and logical operations on data.
To transfer data from one location to another.
To process data into useful information.
Show me the answer
Answer: 1. To compute the effective address of an operand and store it in a register.
Explanation:
LEA instructions calculate the address of an operand and store it in a register, without accessing the memory location.
290. What is the purpose of a clear instruction in a computer system?
To clear the contents of a register or memory location.
To perform arithmetic and logical operations on data.
To transfer data from one location to another.
To process data into useful information.
Show me the answer
Answer: 1. To clear the contents of a register or memory location.
Explanation:
Clear instructions set the contents of a register or memory location to zero or a default value.
291. What is the purpose of a memory hierarchy?
To ensure that data is stored in a single location for easy retrieval.
To provide a range of storage options to balance speed and cost.
To limit the amount of data that can be stored at any one time.
To prevent unauthorized access to data.
Show me the answer
Answer: 2. To provide a range of storage options to balance speed and cost.
Explanation:
Memory hierarchy organizes storage devices by speed and cost, with faster but more expensive memory (e.g., cache) closer to the CPU and slower but cheaper memory (e.g., disk) further away.
292. Which of the following is an example of internal memory?
Hard disk.
CD-ROM.
RAM.
USB flash drive.
Show me the answer
Answer: 3. RAM.
Explanation:
Internal memory, such as RAM, is directly accessible by the CPU and is used for temporary storage of data and instructions.
293. Which of the following is an example of external memory?
Cache memory.
Magnetic tape.
Registers.
Virtual memory.
Show me the answer
Answer: 2. Magnetic tape.
Explanation:
External memory, such as magnetic tape, is used for long-term storage and is not directly accessible by the CPU.
294. What is the purpose of cache memory?
To provide additional storage for the operating system.
To store frequently accessed data for faster access.
To protect data from unauthorized access.
To provide backup storage in case of a system failure.
Show me the answer
Answer: 2. To store frequently accessed data for faster access.
Explanation:
Cache memory stores frequently accessed data and instructions, reducing the time needed to access them and improving system performance.
295. Which of the following is true about cache memory?
It is larger in size than RAM.
It is slower than main memory.
It is located closer to the CPU than main memory.
It has a longer access time than main memory.
Show me the answer
Answer: 3. It is located closer to the CPU than main memory.
Explanation:
Cache memory is smaller but faster than main memory and is located closer to the CPU to reduce access time.
296. Which type of cache memory is integrated into the CPU?
Level 1 (L1) cache.
Level 2 (L2) cache.
Level 3 (L3) cache.
Virtual cache.
Show me the answer
Answer: 1. Level 1 (L1) cache.
Explanation:
L1 cache is the fastest and smallest cache, integrated directly into the CPU.
297. Which type of cache memory is the largest in size?
Level 1 (L1) cache.
Level 2 (L2) cache.
Level 3 (L3) cache.
Virtual cache.
Show me the answer
Answer: 3. Level 3 (L3) cache.
Explanation:
L3 cache is the largest and slowest cache, shared among multiple CPU cores.
298. Which type of memory is used to provide a bridge between main memory and secondary storage devices?
Virtual memory.
Cache memory.
Flash memory.
Magnetic memory.
Show me the answer
Answer: 1. Virtual memory.
Explanation:
Virtual memory uses disk space as an extension of RAM, allowing the system to run more applications than the physical memory would normally allow.
299. Which of the following is an advantage of using virtual memory?
It reduces the amount of main memory required.
It improves the access time of data.
It allows multiple programs to run simultaneously.
It provides faster data transfer rates.
Show me the answer
Answer: 3. It allows multiple programs to run simultaneously.
Explanation:
Virtual memory allows the system to run more programs than the physical memory would normally allow by using disk space as an extension of RAM.
261. Content of the program counter is added to the address part of the instruction in order to obtain the effective address is called:
Relative address mode
Register mode
Index addressing mode
Implied mode
Show me the answer
Answer: 1. Relative address mode
Explanation:
In relative addressing mode, the effective address is calculated by adding the content of the program counter to the address part of the instruction.
262. An interface that provides I/O transfer of data directly to and from the memory unit and peripheral is termed as:
DDA
BR
Serial interface
DMA
Show me the answer
Answer: 4. DMA
Explanation:
DMA (Direct Memory Access) allows peripherals to transfer data directly to and from memory without CPU intervention.
263. The 2's complement form (Use 6-bit word) of the number 1010 is:
111100
110111
110110
1011
Show me the answer
Answer: 3. 110110
Explanation:
The 2's complement of 1010 (in 6-bit) is calculated by inverting the bits and adding 1, resulting in 110110.
264. A register capable of shifting its binary information either to the right or the left is called a:
Parallel register
Shift register
Serial register
Storage register
Show me the answer
Answer: 2. Shift register
Explanation:
A shift register can shift its binary data either left or right.
265. What is the content of stack pointer (SP)?
Address of current instruction
Address of the next instruction
Address of the top element of the stack
Size of the stack
Show me the answer
Answer: 3. Address of the top element of the stack
Explanation:
The stack pointer (SP) holds the address of the top element of the stack.
266. Which of the following interrupt is non-maskable?
INTR
RST 6.5
RST 7.5
TRAP
Show me the answer
Answer: 4. TRAP
Explanation:
The TRAP interrupt is non-maskable, meaning it cannot be disabled.
267. Which of the following is a main memory?
Secondary memory
Cache memory
Auxiliary memory
Virtual memory
Show me the answer
Answer: 2. Cache memory
Explanation:
Cache memory is a type of main memory that provides faster access to frequently used data.
268. Which of the following are not a machine instruction?
MOV
END
ORG
Both B and C
Show me the answer
Answer: 4. Both B and C
Explanation:
END and ORG are assembler directives, not machine instructions.
269. In Assembly language programming, minimum number of operands required for an instruction is/are:
Zero
Two
One
Both B and C
Show me the answer
Answer: 1. Zero
Explanation:
Some instructions, like NOP (No Operation), require zero operands.
270. The maximum addressing capacity of a microprocessor which uses 16-bit database & 32-bit address base is:
64 K
Both A and B
4 GB
None of the above
Show me the answer
Answer: 3. 4 GB
Explanation:
A 32-bit address base allows addressing up to 232 bytes, which is 4 GB.
271. A combinational logic circuit which sends data coming from a single source to two or more separate destinations is:
Decoder
Multiplexer
Encoder
Demultiplexer
Show me the answer
Answer: 4. Demultiplexer
Explanation:
A demultiplexer routes data from a single input to one of many outputs.
272. A Program Counter contains a number 825 and address part of the instruction contains the number 24. The effective address in the relative address mode, when an instruction is read from the memory is:
849
801
850
802
Show me the answer
Answer: 3. 850
Explanation:
The effective address is calculated as 825+24=849.
273. A system program that translates and executes an instruction simultaneously is:
Compiler
Assembler
Interpreter
Operating system
Show me the answer
Answer: 3. Interpreter
Explanation:
An interpreter translates and executes instructions line by line.
274. The cache memory of 1K words uses direct mapping with a block size of 4 words. How many blocks can the cache accommodate?
256 words
1024 words
512 words
128 words
Show me the answer
Answer: 1. 256 words
Explanation:
The cache can accommodate 1024/4=256 blocks.
275. Logic gates with a set of input and outputs is arrangement of:
Combinational circuits
Design circuits
Logic circuit
Register
Show me the answer
Answer: 1. Combinational circuits
Explanation:
Combinational circuits consist of logic gates with inputs and outputs.
276. The BSA instruction is:
Branch and store accumulator
Branch and shift address
Branch and save return address
Branch and show accumulator
Show me the answer
Answer: 3. Branch and save return address
Explanation:
The BSA instruction branches to a subroutine and saves the return address.
277. A floating-point number that has an O in the MSB of mantissa is said to have:
Overflow
Important number
Underflow
Undefined
Show me the answer
Answer: 3. Underflow
Explanation:
A floating-point number with a 0 in the MSB of the mantissa indicates underflow.
278. Aging registers are:
Counters which indicate how long ago their associated pages have been referenced
Registers which keep track of when the program was last accessed
Counters to keep track of last accessed instruction
Counters to keep track of the latest data structure referred
Show me the answer
Answer: 1. Counters which indicate how long ago their associated pages have been referenced
Explanation:
Aging registers track the time since pages were last referenced for page replacement algorithms.
279. The instruction “ORG O” is a:
Machine instruction
High level instruction
Pseudo instruction
Memory instruction
Show me the answer
Answer: 3. Pseudo instruction
Explanation:
ORG (Origin) is a pseudo-instruction used in assembly language to set the starting address of a program.
280. Translation from symbolic program into binary is done in:
Two passes
Three passes
Directly
Four passes
Show me the answer
Answer: 1. Two passes
Explanation:
Assemblers typically use a two-pass process to translate symbolic code into binary.
281. To put the microprocessor in the wait state:
Lower the HOLD input
Raise the HOLD input
Lower the READY input
Raise the READY input
Show me the answer
Answer: 3. Lower the READY input
Explanation:
Lowering the READY input puts the microprocessor in a wait state.
282. A basic instruction that can be interpreted by a computer generally has:
An operand and an address
Sequential register and decoder
A decoder and an accumulator
An address and decoder
Show me the answer
Answer: 1. An operand and an address
Explanation:
A basic instruction typically consists of an operand and an address.
283. In a microprocessor system with memory mapped I/O:
Devices have 8-bit addresses
Devices are accessed using IN and OUT instructions
There can be a maximum of 256 input devices
Arithmetic and logic operations can be directly performed with the I/O data
Show me the answer
Answer: 4. Arithmetic and logic operations can be directly performed with the I/O data
Explanation:
In memory-mapped I/O, I/O devices are treated like memory locations, allowing direct arithmetic and logic operations.
284. Which of the following information holds the information before going to the decoder?
Control register
Accumulator
Data register
Address register
Show me the answer
Answer: 3. Data register
Explanation:
The data register holds information before it is sent to the decoder.
285. The device which is used to connect a peripheral to bus is called:
Control register
Communication
Interface
None of these
Show me the answer
Answer: 3. Interface
Explanation:
An interface connects peripherals to the bus.
286. Which of the following is the set of general-purpose internal registers?
Stack
Address register
Scratch pad
Status register
Show me the answer
Answer: 3. Scratch pad
Explanation:
Scratch pad registers are general-purpose internal registers used for temporary storage.
287. The register used as a working area in CPU is:
Program counter
Instruction decoder
Instruction register
Accumulator
Show me the answer
Answer: 4. Accumulator
Explanation:
The accumulator is a working register used for arithmetic and logic operations.
288. Which of the following is used as storage location both in the ALU and the control section of a computer?
Accumulator
Adder
Register
Decoder
Show me the answer
Answer: 3. Register
Explanation:
Registers are used for storage in both the ALU and control sections.
289. The register which holds the address of the location to or from which data are to be transferred is called:
Index register
Memory address register
Instruction register
Memory data register
Show me the answer
Answer: 2. Memory address register
Explanation:
The memory address register (MAR) holds the address of the memory location for data transfer.
290. The register which contains the data to be written into or read out of the address location is called:
Memory address register
Program counter
Memory data register
Index register
Show me the answer
Answer: 3. Memory data register
Explanation:
The memory data register (MDR) holds the data to be written to or read from memory.
291. Which of the following register is used in the control unit of the CPU to indicate the next instruction which is to be executed?
Accumulator
Instruction decoder
Index register
Program counter
Show me the answer
Answer: 4. Program counter
Explanation:
The program counter (PC) holds the address of the next instruction to be executed.
292. An interrupt can be temporarily ignored by counter is called:
Vectored interrupt
Maskable interrupt
Non-maskable interrupt
Low priority interrupt
Show me the answer
Answer: 2. Maskable interrupt
Explanation:
Maskable interrupts can be temporarily ignored or disabled by the CPU.
293. The ability to temporarily halt the CPU and used this time to send information on buses is called:
Direct memory access
Polling
Vectoring the interrupt
Cycle stealing
Show me the answer
Answer: 4. Cycle stealing
Explanation:
Cycle stealing allows peripherals to temporarily halt the CPU and use the bus for data transfer.
294. Number of machine cycle required for RET instruction in 8085 micro-processors is:
One
Three
Two
Five
Show me the answer
Answer: 2. Three
Explanation:
The RET instruction in the 8085 microprocessor requires three machine cycles.
295. In a microprocessor system, the RST instruction will cause an interrupt:
Only if an interrupt service routine is not being executed
Only if a bit in the interrupt mask is made zero
Only if interrupt have been enabled by an EI instruction
None of the above
Show me the answer
Answer: 3. Only if interrupt have been enabled by an EI instruction
Explanation:
The RST instruction triggers an interrupt only if interrupts are enabled using the EI instruction.
296. An instruction used to set the carry flag in a computer can be classified as:
Data transfer group
Logical
Process control
Program control
Show me the answer
Answer: 3. Process control
Explanation:
Instructions that set the carry flag are part of the process control group.
297. Microprocessor 8085 is the enhanced version of ______ with essentially the same construction set.
6800
8080
68000
8000
Show me the answer
Answer: 2. 8080
Explanation:
The 8085 is an enhanced version of the 8080 microprocessor.
298. In a generic microprocessor instruction cycle time is:
Shorter than machine cycle time
Larger than machine cycle time
Exactly double the machine cycle time
Exactly same as the machine cycle time
Show me the answer
Answer: 4. Exactly same as the machine cycle time
Explanation:
The instruction cycle time is typically the same as the machine cycle time.
299. If we use 3 bits in the instruction word to indicate if an index register is to be used and if necessary, which one is to be used, and then the number of index register to be used in the machine will be:
Three
Seven
Six
Eight
Show me the answer
Answer: 1. Three
Explanation:
With 3 bits, up to 23=8 combinations are possible, but only 3 index registers can be specified.
300. In a multi-processor configuration, two processor are connected to the host 8086 processor. The two-co-processor instruction set:
Must be the same
Must be disjoint
May overlap
Must be the same as that of the host
Show me the answer
Answer: 4. Must be the same as that of the host
Explanation:
The co-processor instruction set must match the host processor's instruction set.
301. A certain processor supports only the immediate and the direct addressing modes. Which of the following programming language features cannot be implemented on this pointer?
Pointers
Records
Arrays
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
Without indirect addressing, features like pointers, records, and arrays cannot be fully implemented.
302. The 8085 microprocessor responds to the presence of an interrupt:
As soon as the TRAP pin becomes high
By checking the TRAP pin for high status at the end of each instruction fetch
By checking the TRAP pin for high status at the end of the execution of each instruction
By checking the TRAP pin for high status at regular intervals
Show me the answer
Answer: 3. By checking the TRAP pin for high status at the end of the execution of each instruction
Explanation:
The 8085 checks the TRAP pin at the end of each instruction execution to detect interrupts.
303. Which of the following need not necessarily be saved on a context switch between processes?
General purpose registers
Program counter
Translation look aside buffer
All of these
Show me the answer
Answer: 3. Translation look aside buffer
Explanation:
The Translation Lookaside Buffer (TLB) is not necessarily saved during a context switch.
304. If a processor does not have any stack pointer register then:
It cannot have subroutine call instruction
It can have subroutine call instruction, but no nested subroutine calls
Nested subroutine calls are possible, but interrupts are not
All sequence of subroutine calls and also interrupts are possible
Show me the answer
Answer: 4. All sequence of subroutine calls and also interrupts are possible
Explanation:
Even without a stack pointer, subroutine calls and interrupts can be managed using other mechanisms.
305. CPU has two modes-privileged and non-privileged. In order to change the mode from privileged to non-privileged:
A hardware interrupt is needed
A software interrupt is needed
A privileged instruction (which does not generate an interrupt) is needed
A non-privileged instruction (which does not generate an interrupt) is needed
Show me the answer
Answer: 3. A privileged instruction (which does not generate an interrupt) is needed
Explanation:
A privileged instruction is required to switch from privileged to non-privileged mode.
306. In the absolute addressing mode:
An operand is inside the instruction
Address of the operand is inside the instruction
Register containing the address of the operand is specified inside the instruction
Location of the operand is implicit
Show me the answer
Answer: 2. Address of the operand is inside the instruction
Explanation:
In absolute addressing mode, the instruction contains the direct address of the operand.
307. The capacity of program counter (PC) is:
8 bits
16 bits
12 bits
32 bits
Show me the answer
Answer: 2. 16 bits
Explanation:
The program counter (PC) in many microprocessors is 16 bits wide.
308. The function of program counter (PC) holds:
Temporary
Memory operand
Address for memory
Address for instruction
Show me the answer
Answer: 4. Address for instruction
Explanation:
The program counter holds the address of the next instruction to be executed.
309. The Program Counter (PC):
Is a register
During execution of the current instruction, its content changes
Both (A) and (B)
None of the above
Show me the answer
Answer: 3. Both (A) and (B)
Explanation:
The PC is a register, and its content changes during instruction execution.
310. The TRAP interrupt mechanism of the 8085 microprocessor executes:
An RST by hardware
The instructions supplied by external device through the INTA signal
An instruction from memory location 20H
None of the above
Show me the answer
Answer: 1. An RST by hardware
Explanation:
The TRAP interrupt executes an RST (Restart) instruction by hardware.
311. Pseudo-instructions are:
Assembler directives
Instructions in any program that have no corresponding machine code instruction
Instruction in any program whose presence or absence will not change the output for any input
None of the above
Show me the answer
Answer: 1. Assembler directives
Explanation:
Pseudo-instructions are assembler directives that do not translate directly into machine code.
312. “The number of instructions needed to add ‘n’ numbers and store the result in memory using only one address instructions is:
n
n-1
n+1
Independent of n
Show me the answer
Answer: 3. n+1
Explanation:
Adding n numbers requires n instructions, and one additional instruction to store the result.
313. The addressing mode used in the instruction PUSH B is:
Direct
Register indirect
Register
Immediate
Show me the answer
Answer: 2. Register indirect
Explanation:
The PUSH B instruction uses register indirect addressing to push the contents of the B register onto the stack.
314. The process of fetching and executing instructions one at a time, in order to increasing an address is called:
Instruction execution
Instruction fetch
Straight line sequencing
Random sequencing
Show me the answer
Answer: 3. Straight line sequencing
Explanation:
Straight line sequencing refers to executing instructions in a linear, sequential manner.
315. The CPU of a computer takes instruction from the memory and executes them. This process is called:
Load cycle
Fetch-execute cycle
Time sequence
Clock cycle
Show me the answer
Answer: 2. Fetch-execute cycle
Explanation:
The fetch-execute cycle is the process by which the CPU retrieves and executes instructions.
316. In a microprocessor, WAIT states are used to:
Make the processor wait during a DMA operation
Make the processor wait during a power interrupt processing
Make the processor wait during a power shutdown
Interface slow peripheral to the processor
Show me the answer
Answer: 4. Interface slow peripheral to the processor
Explanation:
WAIT states are used to synchronize the processor with slower peripherals.
317. When a program is being executed in an 8085 microprocessor, its program counter contains:
Number of instructions in the current program that have already been executed
The total number of instructions in the program being executed
Memory address of the instructions that is being currently executed
Memory address of the instructions that is to be executed next
Show me the answer
Answer: 4. Memory address of the instructions that is to be executed next
Explanation:
The program counter holds the address of the next instruction to be executed.
318. When the HLT instructions of an 8085 microprocessor is executed, the microprocessor:
Is disconnected from the system bus till the reset is pressed
Halts execution of the program and returns to monitor
Enters into a halt-state and the buses are tri-stated
Reloads the program from the location 0024 and 0025
Show me the answer
Answer: 3. Enters into a halt-state and the buses are tri-stated
Explanation:
The HLT instruction stops the processor and tri-states the buses.
319. Serial input data of 8085 can be loaded into bit 7 of the accumulator by:
Executing a RIM instruction
Using TRAP
Executing RST 1
None of the above
Show me the answer
Answer: 1. Executing a RIM instruction
Explanation:
The RIM (Read Interrupt Mask) instruction loads serial input data into bit 7 of the accumulator.
320. Which of the following interrupts are unmaskable interrupts?
RST 5.5
TRAP
RST 7.5
INTR 1
Show me the answer
Answer: 2. TRAP
Explanation:
The TRAP interrupt is non-maskable and cannot be disabled.
321. The memory address ranges to which RAM will respond:
0000 H to 1 FFF H
4000 H to 5 FFF H
0000 H to 5 FFF H
3000 H to FFFF H
Show me the answer
Answer: 2. 4000 H to 5 FFF H
Explanation:
The RAM responds to addresses within the range 4000 H to 5 FFF H.
322. The address range to which I/O chip will respond is:
0000 H to FFFF H
4000H to 5FFF H
0000H to 5FFFH
3000 H to FFFF H
Show me the answer
Answer: 3. 0000H to 5FFFH
Explanation:
The I/O chip responds to addresses within the range 0000 H to 5 FFF H.
323. Both the arithmetic logic unit (ALU) and control section of CPU employ special purpose storage location called:
Decoder
Multiplexer
Buffers
Registers
Show me the answer
Answer: 4. Registers
Explanation:
Registers are used for temporary storage in the ALU and control unit.
324. A basic instruction that can be interpreted by a computer generally has:
An operand and an address
Sequence register and decoder
A decoder and an accumulator
An address and decoder
Show me the answer
Answer: 1. An operand and an address
Explanation:
A basic instruction typically consists of an operand and an address.
325. The differences between PLA and ROM is:
PLA is combination ROM is sequential
PLA economizes on the number of minterms
PLA has fixed AND array, ROM has fixed OR array
None of these
Show me the answer
Answer: 2. PLA economizes on the number of minterms
Explanation:
PLA (Programmable Logic Array) reduces the number of minterms compared to ROM.
326. The control unit of computer:
Performs ALU operations on the data
Controls the operation of the output devices
Is a device for manually operating the computer
Directs the other unit of computers
Show me the answer
Answer: 4. Directs the other unit of computers
Explanation:
The control unit directs the operations of other units in the computer.
327. The ALU of a computer normally contains a number of high-speed storage elements called:
Semiconductor memory
Hard disk
Registers
Magnetic disks
Show me the answer
Answer: 3. Registers
Explanation:
The ALU uses registers for high-speed storage of data.
328. The unit of a computer system which executes program, communication with and often controls the operation of other subsystems of the computer is the:
CPU
I/O unit
Control unit
Peripheral unit
Show me the answer
Answer: 1. CPU
Explanation:
The CPU (Central Processing Unit) executes programs and controls other subsystems.
329. The ability of a medium size computer system to increase in data processing capability by addition of such devices as mass storage device, I/O device etc. is called:
Computer expandability
Computer enhancement
Computer mobility
Computer upward capability
Show me the answer
Answer: 1. Computer expandability
Explanation:
Computer expandability refers to the ability to increase processing capability by adding devices.
330. The technique which repeatedly uses the same block of internal storage during different stage of problem is called:
Overlay
Swapping
Overlapping
Reuse
Show me the answer
Answer: 1. Overlay
Explanation:
Overlay is a technique where the same memory block is reused for different stages of a program.
331. The registers used as a working area in CPU is:
Program counter
Instruction decoder
Instruction register
Accumulator
Show me the answer
Answer: 4. Accumulator
Explanation:
The accumulator is a working register used for arithmetic and logic operations.
332. Which of the following information holds the information before going to the decoder?
Control register
Accumulator
Data register
Address register
Show me the answer
Answer: 3. Data register
Explanation:
The data register holds information before it is sent to the decoder.
333. Which of the following unit is used to supervise each instruction in the CPU?
Control logic unit
ALU
Accumulator
Control register
Show me the answer
Answer: 1. Control logic unit
Explanation:
The control logic unit supervises the execution of each instruction in the CPU.
334. The bus which is used to transfer data from main memory to peripheral device is:
Data bus
DMA bus
Input bus
Output bus
Show me the answer
Answer: 2. DMA bus
Explanation:
The DMA (Direct Memory Access) bus is used for transferring data between memory and peripherals.
335. The device which is used to connect a peripheral to bus is called:
Control register
Communication protocol
Interface
None of these
Show me the answer
Answer: 3. Interface
Explanation:
An interface connects peripherals to the bus.
336. The bus connected between the CPU and main memory that permits transfer of information between main memory and the CPU is called:
DMA bus
Address bus
Memory bus
Control bus
Show me the answer
Answer: 3. Memory bus
Explanation:
The memory bus facilitates data transfer between the CPU and main memory.
337. What is the storage capacity of a Hollerith card which is organized into nibbles?
32
120
64
240
Show me the answer
Answer: 2. 120
Explanation:
A Hollerith card organized into nibbles can store 120 bits of data.
338. How many addresses are required for 25x40 video RAM?
1020
1000
1920
2000
Show me the answer
Answer: 2. 1000
Explanation:
A 25x40 video RAM requires 1000 addresses (25 rows x 40 columns).
339. Microprogramming is a technique for:
Writing small program effectively
Programming output/input routines
Programming the microprocessor
Programming the control steps of a computer
Show me the answer
Answer: 4. Programming the control steps of a computer
Explanation:
Microprogramming is used to program the control steps of a computer.
340. A device that works in conjunction with a computer but not as part of it is called:
Microprocessor
Hardware
Peripheral device
Memory
Show me the answer
Answer: 3. Peripheral device
Explanation:
A peripheral device works with a computer but is not part of the core system.
341. A system of letters, numbers symbols adopted by computer manufacture as an abbreviation form of instruction sets is called
Mesh
Modern
Monitor
Mnemonic
Show me the answer
Answer: 4. Mnemonic
Explanation:
Mnemonics are symbolic representations of instructions used in assembly language programming.
342. When a subroutine is called, then address of the instruction following the CALL instruction is stored in/on the
Stack pointer
Program counter
Accumulator
Stack
Show me the answer
Answer: 4. Stack
Explanation:
When a subroutine is called, the return address (the address of the instruction following the CALL) is stored on the stack.
343. In 8085 microprocessors, the value of the most significant bit of the result following the execution of any arithmetic or Boolean instruction is stored in the
Carry status flag
Sign status flag
Auxiliary carry status flag
Zero status flag
Show me the answer
Answer: 2. Sign status flag
Explanation:
The Sign flag (S) in the 8085 microprocessor stores the value of the most significant bit (MSB) of the result after arithmetic or logical operations.
344. PLA
Produces sum of products as the outputs
Is dedicated for a particular operation
Is general
Both A and B
Show me the answer
Answer: 4. Both A and B
Explanation:
PLA (Programmable Logic Array) produces sum-of-products outputs and can be dedicated for specific operations.
345. The sequence of events that happen during a typical fetch operation is
PC-MAR-Memory-MDR-IR
PC-Memory-IR
PC-Memory-MDR-IR
PC-MAR-Memory-IR
Show me the answer
Answer: 1. PC-MAR-Memory-MDR-IR
Explanation:
During a fetch operation, the Program Counter (PC) sends the address to the Memory Address Register (MAR), which fetches the instruction from memory into the Memory Data Register (MDR), and then the instruction is loaded into the Instruction Register (IR).
346. Which of the following is not a form of memory?
Instruction cache
Instruction opcode
Instruction register
Translation lookaside buffer
Show me the answer
Answer: 2. Instruction opcode
Explanation:
Instruction opcode is part of the instruction itself, not a form of memory.
347. Which memory is difficult to interface with processor?
Static memory
ROM
Dynamic memory
RAM
Show me the answer
Answer: 3. Dynamic memory
Explanation:
Dynamic memory (DRAM) requires periodic refreshing, making it more complex to interface with the processor compared to static memory.
348. Desirable characteristic(s) of a memory system is(are)
Speed and reliability
Durability and compactness
Low power consumption
All of these
Show me the answer
Answer: 4. All of these
Explanation:
A good memory system should be fast, reliable, durable, compact, and consume low power.
349. The minimum time delay required between initiation of two successive memory operation is called
Memory cycle time
Transmission time
Memory access time
Skip time
Show me the answer
Answer: 1. Memory cycle time
Explanation:
Memory cycle time is the minimum time required between two successive memory operations.
350. Which of the following statement is wrong?
RAM is a type of volatile
Magnetic tape is non-volatile
Magnetic core and semiconductor memories are used as mass memory medium
An EPROM can be programmed, erased and reprogrammed by user with an EPROM programming instruction
Show me the answer
Answer: 3. Magnetic core and semiconductor memories are used as mass memory medium
Explanation:
Magnetic core memory is outdated and not used as a mass memory medium today. Semiconductor memories like DRAM and flash memory are more common.
351. The refreshing rate of dynamic RAMs is approximately once in:
Two microseconds
Fifty milliseconds
Two milliseconds
Two seconds
Show me the answer
Answer: 3. Two milliseconds
Explanation:
Dynamic RAMs (DRAMs) require refreshing approximately every 2 milliseconds to retain data.
352. In comparison with static RAM memory, the dynamic RAM memory has:
Lower bit density and higher power consumption
Higher bit density and higher power consumption
Lower bit density and lower power consumption
Higher bit density and lower power consumption
Show me the answer
Answer: 4. Higher bit density and lower power consumption
Explanation:
DRAM has higher bit density and consumes less power compared to SRAM.
353. Disadvantage of dynamic RAM over static RAM is:
Higher power consumption
Variable speed
Need to refresh the capacitor charge every once in two milliseconds
Higher bit density
Show me the answer
Answer: 3. Need to refresh the capacitor charge every once in two milliseconds
Explanation:
DRAM requires periodic refreshing, which is a disadvantage compared to SRAM.
354. The access time of magnetic bubble memory is approximately:
30 nanoseconds
30 milliseconds
30 microseconds
0.3 seconds
Show me the answer
Answer: 3. 30 microseconds
Explanation:
Magnetic bubble memory has an access time of approximately 30 microseconds.
355. Serial access memories are useful in applications where:
Data consists of numbers
Short access time is required
Each stored word is processed differently
Data naturally needs to flow in and out in serial form
Show me the answer
Answer: 4. Data naturally needs to flow in and out in serial form
Explanation:
Serial access memories are used when data flows in and out serially, such as in shift registers.
356. What is the main advantage of magnetic core memory over semiconductor RAM memory?
More compact and smaller
More economical
A bit does not have to be written after reading
Non-volatile
Show me the answer
Answer: 4. Non-volatile
Explanation:
Magnetic core memory is non-volatile, meaning it retains data even when power is lost.
357. Fastest types of memory from the following list is:
Tape
Disk
Semiconductor
Bubble memory
Show me the answer
Answer: 3. Semiconductor
Explanation:
Semiconductor memory (e.g., SRAM, DRAM) is the fastest among the listed options.
358. The use of hardware in Memory management is through segment relocation and protection is:
To perform address translation to reduce size of the memory
To perform address translation to reduce execution time overhead
Both A and B
None of these
Show me the answer
Answer: 3. Both A and B
Explanation:
Segment relocation and protection help in address translation and reduce execution time overhead.
359. Memory refreshing may be done:
By the CPU that contains a spec regress counter, only
By an external refresh counter, only
Either by CPU or by an extern refresh counter
None of the above
Show me the answer
Answer: 3. Either by CPU or by an extern refresh counter
Explanation:
Memory refreshing can be handled by the CPU or an external refresh counter.
360. Choose the correct statement from the following:
PROM contains a programmable AND array and a fixed OR array
PLA contains a fixed AND array and a programmable OR array
PROM contains a fixed AND array and a programmable OR array
None of the above
Show me the answer
Answer: 3. PROM contains a fixed AND array and a programmable OR array
Explanation:
PROM (Programmable Read-Only Memory) has a fixed AND array and a programmable OR array.
361. Which of the following is not true of primary storage?
It represents the decimal number through string of binary digits
It stores operating system programs
It stores data while they are being processed by CPU
It stores the bulk of data used by computer application
Show me the answer
Answer: 4. It stores the bulk of data used by computer application
Explanation:
Primary storage (e.g., RAM) is used for temporary data storage, not for bulk data storage.
362. A dynamic RAM consists up:
Six transistors
One transistor and one capacitor
Two transistors and two capacitors
Two capacitors only
Show me the answer
Answer: 2. One transistor and one capacitor
Explanation:
DRAM cells consist of one transistor and one capacitor.
363. Semiconductor memory is:
Somewhat slower than magnetic core memory
A volatile memory
Somewhat longer than magnetic core memory
All of the above
Show me the answer
Answer: 2. A volatile memory
Explanation:
Semiconductor memory (e.g., RAM) is volatile, meaning it loses data when power is turned off.
364. Which of the following is the internal memory of the system (computer)?
CPU registers
Main memory
Cache memory
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
CPU registers, main memory, and cache memory are all part of the internal memory system.
365. A software program stored in a ROM that cannot be changed easily is called:
Hardware
Editor
Linker
Firmware
Show me the answer
Answer: 4. Firmware
Explanation:
Firmware is software embedded in ROM that cannot be easily changed.
366. An advantage of memory interfacing is that:
A large memory is obtained
Effective speed of the memory is increased
The cost of the memory is reduced
A non-volatile memory is obtained
Show me the answer
Answer: 2. Effective speed of the memory is increased
Explanation:
Memory interfacing improves the effective speed of memory access.
367. In a virtual memory system, the address space specified by the address line of the CPU must be ______ than the physical memory size and ______ than the secondary storage size.
Smaller, smaller
Larger, smaller
Smaller, larger
Larger, larger
Show me the answer
Answer: 2. Larger, smaller
Explanation:
Virtual memory allows the address space to be larger than physical memory but smaller than secondary storage.
368. Which of the following is /are advantage of virtual memory?
Faster access to memory on a average
Processes can be given protected address space
Both A and B
Program larger than the physical memory size can be run
Show me the answer
Answer: 3. Both A and B
Explanation:
Virtual memory provides faster access and protected address spaces for processes.
369. Which of the following need extra hardware for DRAM refreshing?
8085
Motorola 68000
Both (A) and (B)
None of the above
Show me the answer
Answer: 3. Both (A) and (B)
Explanation:
Both the 8085 and Motorola 68000 require extra hardware for DRAM refreshing.
371. Memory consisting of electronic circuit attached into silicon chip is known as:
Magnetic core memory
Thin film memory
Semiconductor memory
MOS memory
Show me the answer
Answer: 3. Semiconductor memory
Explanation:
Semiconductor memory is made up of electronic circuits integrated into silicon chips, making it a key component in modern computing.
372. Which of the following memory is capable of operating at electronic speed?
Semiconductor memory
Magnetic drums
Magnetic disks
Magnetic tapes
Show me the answer
Answer: 1. Semiconductor memory
Explanation:
Semiconductor memory operates at electronic speeds, making it much faster than magnetic storage devices like drums, disks, or tapes.
373. The larger the RAM of a computer, the faster is its speed, since it eliminates
Need of ROM
Frequency disk I/O
Need for external memory
Need for a data-wide path
Show me the answer
Answer: 2. Frequency disk I/O
Explanation:
Larger RAM reduces the need for frequent disk I/O operations, which are slower compared to accessing data directly from RAM.
374. What is the average access time for a drum rotating at 4000 revolution per minute?
2.5 milli seconds
7.5 milli seconds
5.0 milli seconds
4.0 milli seconds
Show me the answer
Answer: 1. 2.5 milli seconds
Explanation:
The average access time for a drum rotating at 4000 RPM is calculated as half the time for one full rotation, which is 2.5 milliseconds.
375. How many input lines are needed to construct 1024-bit coincident 'core plan?'
10
32
16
64
Show me the answer
Answer: 4. 64
Explanation:
To construct a 1024-bit coincident core plane, 64 input lines are needed (since 1024 = 2^10, and 64 = 2^6).
376. What is the byte capacity of a drum which is 5-inch-high, 10-inch diameter, and which has 60 tracks per inch bit density of 800 bits per inch?
942000 bytes
188400 bytes
471000 bytes
16384 bytes
Show me the answer
Answer: 3. 471000 bytes
Explanation:
The byte capacity is calculated by multiplying the number of tracks, bits per track, and converting bits to bytes. The drum has 60 tracks per inch, 800 bits per inch, and a circumference of 10 inches, resulting in 471000 bytes.
377. The main advantage of multiple bus organization over single bus is,
Reduction in the number of cycles for execution
Increase in size of the registers
Better Connectivity
None of these
Show me the answer
Answer: 1. Reduction in the number of cycles for execution
Explanation:
Multiple bus organization allows parallel data transfer, reducing the number of cycles needed for execution compared to a single bus system.
378. Property of locality of reference may fail, if a program has
Many conditional jumps
Many operands
Many unconditional jumps
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
Locality of reference may fail if a program has many conditional jumps, operands, or unconditional jumps, as these can disrupt the predictable access patterns.
379. How many RAM chips of size (256x1 bit) are required to build 1M byte memory?
8
24
10
32
Show me theanswer
Answer: 4. 32
Explanation:
To build 1M byte memory using 256x1 bit chips, you need 32 chips (1M byte = 8M bits, and 256x1 bit chips provide 256 bits each, so 8M / 256 = 32).
380. If each address space represents one byte of storage space, how many address lines are needed to access RAM chips arranged in a 4x6 array, where each chip is 8K x 4 bits?
13
16
15
17
Show me the answer
Answer: 4. 17
Explanation:
Each chip is 8K x 4 bits, so 8K = 8192 bytes. For a 4x6 array, the total memory is 4 * 6 * 8192 = 196608 bytes. To address this, you need 17 address lines (2^17 = 131072, which is sufficient).
381. Four memory chips of 16x4 size have their address bases connected together. The system will be of size
64x64
32x8
16x16
256x1
Show me the answer
Answer: 3. 16x16
Explanation:
Four 16x4 chips connected together result in a 16x16 system, as the address bases are shared, and the data width is increased.
382. Arrange the following configurations for CPU in decreasing order or operating speeds:
Hard wired control, vertical micro-programming, horizontal micro-programming
Hard wired control, horizontal micro-programming, vertical micro-programming
Horizontal micro-programming, vertical micro-programming, hard wired control
Vertical micro-programming, horizontal micro-programming, hard wired control
Show me the answer
Answer: 2. Hard wired control, horizontal micro-programming, vertical micro-programming
Explanation:
Hardwired control is the fastest, followed by horizontal micro-programming, and then vertical micro-programming, which is the slowest.
383. The main difference (a) between a CISC and a RISC processor is/are that a RISC processor typically
Has fewer instructions and addressing modes
Has more registers
Is easier to implements using hard-wired control logic
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
RISC processors typically have fewer instructions, more registers, and are easier to implement using hard-wired control logic compared to CISC processors.
384. Comparing the time T1 taken for a single instruction on a pipelined CPU with time T2 taken on a non-pipelined but identical CPU, we can say that
T1=T2
T1>T2
T1<T2
T1 is T2 plus time taken for one instruction fetch cycle
Show me the answer
Answer: 3. T1<T2
Explanation:
Pipelining allows multiple instructions to be processed simultaneously, reducing the time taken for a single instruction compared to a non-pipelined CPU.
385. Performance of a pipelined processor suffers if
The pipeline stages have different delays
Consecutive instructions are dependent on each other
The pipeline stages share hardware resources
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
Pipeline performance suffers if stages have different delays, instructions are dependent, or stages share hardware resources, leading to stalls or bottlenecks.
386. A micro-programmed control unit
Is faster than a hard-wired control unit
Facilitates easy implementation of new instruction
Is useful when very small programs are to be run
Usually refers to the control unit of a microprocessor
Show me the answer
Answer: 2. Facilitates easy implementation of new instruction
Explanation:
A micro-programmed control unit allows for easier implementation of new instructions compared to hard-wired control units, as it uses software to define control logic.
387. Which of the following are typical characteristics of a RISC machine?
Highly pipelined
Multiple register sets
Both (A) and (B)
None of these
Show me the answer
Answer: 3. Both (A) and (B)
Explanation:
RISC machines are typically highly pipelined and have multiple register sets to improve performance and efficiency.
388. In an 8085-microprocessor system with memory mapped I/O
I/O device have 8-bit addresses
I/O devices are accessed using IN and OUT instruction
There can be a maximum of 256 input devices and 256 output devices
Arithmetic and logic operations can be directly performed with the I/O data
Show me the answer
Answer: 4. Arithmetic and logic operations can be directly performed with the I/O data
Explanation:
In memory-mapped I/O, I/O devices are treated like memory locations, allowing arithmetic and logic operations to be performed directly on I/O data.
389. How many types of storage loops exist in magnetic bubble memory?
8
3
4
2
Show me the answer
Answer: 4. 2
Explanation:
Magnetic bubble memory typically uses two types of storage loops: major loops and minor loops.
390. How many wires are threaded through the cores in a coincident current core memory?
2
4
3
6
Show me the answer
Answer: 1. 2
Explanation:
Coincident current core memory uses two wires threaded through the cores: one for the X-axis and one for the Y-axis.
391. When we move from the outermost track to the innermost track in a magnetic disk, then density (bits per liner inch)
Increases
Remains the same
Decreases
Either remains constant or decreases
Show me the answer
Answer: 1. Increases
Explanation:
As we move from the outermost track to the innermost track on a magnetic disk, the bit density (bits per linear inch) increases due to the smaller circumference of the inner tracks.
392. The use of hardware in Memory management is through segment relocation and protection is
To perform address translation to reduce size of the memory
To perform address translation to reduce execution time overhead
Both A and B
None of the above
Show me the answer
Answer: 3. Both A and B
Explanation:
Hardware in memory management is used for segment relocation and protection to perform address translation, which reduces memory size and execution time overhead.
393. The parallel operation is preferred because
Circuitry is simple
It is faster than series operation
It requires less memory
All of the above
Show me the answer
Answer: 2. It is faster than series operation
Explanation:
Parallel operation is preferred because it allows multiple operations to be performed simultaneously, making it faster than serial operation.
394. In comparison to the internal (main) memory, tape or disk memory is
Slower and more expensive
Faster and more expensive
Slower and less expensive
Faster and less expensive
Show me the answer
Answer: 3. Slower and less expensive
Explanation:
Tape or disk memory is slower than internal (main) memory but is less expensive, making it suitable for bulk storage.
395. The number of records contained within a block of data on magnetic tape is defined by the
Block definition
Blocking factor
Record contain clause
Record per block factor
Show me the answer
Answer: 2. Blocking factor
Explanation:
The blocking factor defines the number of records contained within a block of data on magnetic tape.
396. Transfer of information from main storage is typically n times faster than the transfer form auxiliary storage, where n is about
5
100
10
200
Show me the answer
Answer: 2. 100
Explanation:
Transfer of information from main storage is typically about 100 times faster than from auxiliary storage due to the speed difference between RAM and disk storage.
397. Which access method is used for obtaining a record form a cassette tape?
Direct
Random
Sequential
Parallel
Show me the answer
Answer: 3. Sequential
Explanation:
Cassette tapes use sequential access, meaning data must be read in the order it is stored on the tape.
398. An advantage of blocking a tape is that
The additional processing time is consumed
The direct file method can be emulated
The tapes contains less data and longer tapes
Less tape is used to store the same amount of data
Show me the answer
Answer: 4. Less tape is used to store the same amount of data
Explanation:
Blocking a tape reduces the amount of tape used to store the same amount of data by grouping records into blocks, reducing overhead.
399. The ISA standard Buses are used to connect,
RAM and processor
Hard disk and Processor
GPU and processor
CD/DVD drives and Processor
Show me the answer
Answer: 1. RAM and processor
Explanation:
ISA (Industry Standard Architecture) buses are primarily used to connect RAM and the processor in older computer systems.
400. Which of the following is not true of primary storage?
It represents the decimal number through string of binary digits.
It stores operating system programs
It stores data while they are being processed by CPU.
It stores the bulk of data used by computer application
Show me the answer
Answer: 4. It stores the bulk of data used by computer application
Explanation:
Primary storage (RAM) is used for temporary data storage while the CPU processes it, but it does not store the bulk of data used by applications, which is typically stored in secondary storage.
401. In modern computers bipolar semiconductor chips are often used in the arithmetic logic unit. What material is used for the slower and less expensive primary storage section?
Gallium arsenide (GaAs)
Silicon
Metal oxide semiconductor
Gallium arsenide chips
Show me the answer
Answer: 3. Metal oxide semiconductor
Explanation:
Metal oxide semiconductor (MOS) technology is used for slower and less expensive primary storage, such as DRAM, due to its cost-effectiveness and scalability.
402. Which type of memory chips are likely to be used in the primary storage of the future generation of computers?
Selenium chips
Bio chips
Optical chips
Gallium arsenide chips
Show me the answer
Answer: 3. Optical chips
Explanation:
Optical chips, which use light instead of electricity, are a promising technology for future primary storage due to their potential for high speed and low power consumption.
403. How many bits can be stored in the 8K capital?
8000
4000
8192
4096
Show me the answer
Answer: 3. 8192
Explanation:
8K (kilobytes) is equivalent to 8192 bytes, and since each byte is 8 bits, the total number of bits is 8192 * 8 = 65536 bits.
404. If a computer has a 1024 K memory, then what does the letter K stands for?
Kilometer
1024
Thousand
Core
Show me the answer
Answer: 2. 1024
Explanation:
In computing, "K" stands for 1024 (2^10), not 1000, as memory sizes are based on binary multiples.
405. What was the amount of memory required by the earliest operating system called dos 1.0?
4K
16K
8K
32K
Show me the answer
Answer: 3. 8K
Explanation:
DOS 1.0 required a minimum of 8K of memory to operate, making it suitable for early personal computers with limited resources.
406. The storage device which is used to compensate for the difference in rates of flow of data from one device to another is called
Cache
Buffer
Concentrator
I/O device
Show me the answer
Answer: 2. Buffer
Explanation:
A buffer is used to temporarily store data to compensate for differences in data flow rates between devices, ensuring smooth data transfer.
407. As a secondary storage medium, what is the most important advantage of a video disk?
Laser disk
Durability
Potential capacity
Cost effectiveness
Show me the answer
Answer: 3. Potential capacity
Explanation:
Video disks offer high potential capacity, making them suitable for storing large amounts of data, such as video and multimedia content.
408. What is the size of optical compact disk which is used for recording high quality music?
4.7-inch
5½ inch
3½ inch
8 inch
Show me the answer
Answer: 1. 4.7-inch
Explanation:
The standard size for optical compact disks (CDs) used for recording high-quality music is 4.7 inches in diameter.
409. Which part of the diskette never be touched?
Hub
Oval slot
Hole in the center
Corner
Show me the answer
Answer: 2. Oval slot
Explanation:
The oval slot on a diskette should never be touched, as it exposes the magnetic surface, which can be easily damaged.
410. Memory is
A device that performs a sequence of operations specified by instruction in memory
The device where information in stored
A sequence of instruction
Typically characterized by interactive processing and time-slicing of the CPU's time to allow quick response to each user
Show me the answer
Answer: 2. The device where information in stored
Explanation:
Memory is a device where information is stored, allowing the CPU to access and process data as needed.
411. Virtual memory
Is a method of memory allocation by which the program is subdivided into equal portions, 8 pages and core is subdivided into equal portions
Consists of those addresses that may be generated by a processor during execution of a computation
Is a method of allocating processor time
Allows multiple programs to reside in separate areas of core at a time
Show me the answer
Answer: 2. Consists of those addresses that may be generated by a processor during execution of a computation
Explanation:
Virtual memory consists of addresses that may be generated by a processor during execution, allowing programs to use more memory than physically available.
412. AROM is used to store the table for multiplication of two 8 -bit unsigned integers. The size of ROM required is
256K x 6
4K x 16
64K x 8
64K x 16
Show me the answer
Answer: 3. 64K x 8
Explanation:
To store the multiplication table for two 8-bit unsigned integers, a 64K x 8 ROM is required, as it can store 65536 (2^16) entries, each 8 bits wide.
413. The controller uses ______ to help with the transfers when handling network interfaces.
Input Buffer Storage
Bridge circuits
Signal enhancers
All of the above
Show me the answer
Answer: 1. Input Buffer Storage
Explanation:
Input buffer storage is used by the controller to temporarily hold data during transfers, ensuring smooth communication between network interfaces.
414. To overcome the conflict over the possession of the BUS we use ______.
Optimizers
Multiple BUS structure
BUS arbitrators
None of the above
Show me the answer
Answer: 3. BUS arbitrators
Explanation:
BUS arbitrators are used to resolve conflicts over bus access, ensuring fair and efficient sharing of the bus among multiple devices.
415. The seek time of a disk is 30 ms. It rotates at the rate of 30 rotations/second. The capacity of each track is 300 words. The access time is (approximately)
62 ms
50 ms
60 ms
47 ms
Show me the answer
Answer: 4. 47 ms
Explanation:
The access time is calculated as the sum of seek time (30 ms) and rotational latency (16.67 ms, since 30 rotations/second = 33.33 ms per rotation, and average latency is half of that). Thus, 30 + 16.67 ≈ 47 ms.
416. How many RAM chips of size (256K x 1 bit) are required to build 1 M byte memory?
8
24
10
32
Show me the answer
Answer: 4. 32
Explanation:
To build 1M byte memory using 256K x 1 bit chips, you need 32 chips (1M byte = 8M bits, and 256K x 1 bit chips provide 256K bits each, so 8M / 256K = 32).
417. If each address space represents one byte of storage space, how many address lines are needed to access RAM chips arranged in a 4 x 6 array, where each chip is 8K x 4 bits?
13
16
15
17
Show me the answer
Answer: 4. 17
Explanation:
Each chip is 8K x 4 bits, so 8K = 8192 bytes. For a 4x6 array, the total memory is 4 * 6 * 8192 = 196608 bytes. To address this, you need 17 address lines (2^17 = 131072, which is sufficient).
418. In a memory system, four 256 x 8 PROM chips are used to make total memory of size 1024 x 4. What is the number of address bus lines?
4
10
8
16
Show me the answer
Answer: 2. 10
Explanation:
Four 256 x 8 PROM chips make a total memory of 1024 x 4, requiring 10 address lines (2^10 = 1024).
419. Consider a high speed 40 ns memory cache with a successful hit ratio of 80%. The regular memory has an access time of 100 ns. What is the average effective time for CPU to access memory?
52 ns
70 ns
60 ns
80 ns
Show me the answer
Answer: 1. 52 ns
Explanation:
The average effective access time is calculated as (Hit ratio * Cache access time) + (Miss ratio * Memory access time) = (0.8 * 40) + (0.2 * 100) = 32 + 20 = 52 ns.
420. What is the hit ratio of a cache if a system performs memory access at 30 nano seconds with the cache and 150 nano seconds without it? Assume that the each uses 20 nano sec memory, choose the closest approximate
81%
92%
75%
87%
Show me the answer
Answer: 2. 92%
Explanation:
The hit ratio can be calculated using the formula: Hit ratio = (Memory access time without cache - Memory access time with cache) / (Cache access time - Memory access time without cache). Plugging in the values: (150 - 30) / (20 - 150) ≈ 92%.
421. Consider a disk with the following characteristics
Track size: 10,000 bytes
Rotational latency: 10 ms / revaluation
Block size: 1,000 bytes
What is the maximum transfer rate per track measured in bits per second as is conventional for this disk unit?
400 Mbps
6,400 Mbps
8 Mbps
4,250 Mbps
Show me the answer
Answer: 3. 8 Mbps
Explanation:
The maximum transfer rate per track is calculated as (Track size / Rotational latency) = (10,000 bytes / 10 ms) = 1,000,000 bytes per second = 8 Mbps (since 1 byte = 8 bits).
422. Increasing the RAM of a computer typically improves the performance because:
Virtual memory increases
Larger RAMs are faster
Fewer page faults occurs
Fewer segmentation faults occur
Show me the answer
Answer: 3. Fewer page faults occurs
Explanation:
Increasing RAM reduces the number of page faults, as more data can be stored in physical memory, reducing the need to access slower secondary storage.
423. Which of the following requires a device driver?
Register
Cache
Main memory
Disk
Show me the answer
Answer: 4. Disk
Explanation:
Disks require device drivers to manage communication between the operating system and the disk hardware.
424. Which one of the following statements is false?
Virtual memory implements the translation of a programs address space into physical memory address
Virtual memory allows each program to exceed the size of the primary memory
Virtual memory increases the degree of multiprogramming
Virtual memory reduces the context switching overhead
Show me the answer
Answer: 4. Virtual memory reduces the context switching overhead
Explanation:
Virtual memory does not reduce context switching overhead; it may even increase it due to the need to manage page tables and swap space.
425. The advantage of CMOS technology over a MOS is
Lower power dissipation
Greater speed
Smaller chip size
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
CMOS technology offers lower power dissipation, greater speed, and smaller chip size compared to traditional MOS technology.
426. The advantage of synchronous circuits over asynchronous one is...
Faster operation
Better noise immunity
Both A and B
Lower hardware equipment
Show me the answer
Answer: 3. Both A and B
Explanation:
Synchronous circuits offer faster operation and better noise immunity compared to asynchronous circuits, making them more reliable and efficient.
427. Which of the following is not a form of memory?
Instruction cache
Instruction register
Instruction code
Translation lookaside buffer
Show me the answer
Answer: 3. Instruction code
Explanation:
Instruction code is not a form of memory; it refers to the binary representation of instructions executed by the CPU.
428. In 2's complement, addition overflow
Is tagged whenever there is a carry for sign bit addition
Cannot occur when a positive value is added to a negative value
Is flagged when the carries from sign bit and previous bit match
None of the above
Show me the answer
Answer: 3. Is flagged when the carries from sign bit and previous bit match
Explanation:
In 2's complement addition, overflow is flagged when the carries from the sign bit and the previous bit match, indicating an incorrect result.
429. The performance of the pipelined processor suffers if...
The pipeline stage has different delay
Consecutive instructions depend on each other
The pipeline sages share hardware resources
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
Pipeline performance suffers if stages have different delays, instructions are dependent, or stages share hardware resources, leading to stalls or bottlenecks.
430. In absolute addressing mode...
The operand is inside the instruction
The address of the operand is inside the instruction
The register containing the address of the operand is specified in the instruction
Location of the operand is implicit
Show me the answer
Answer: 2. The address of the operand is inside the instruction
Explanation:
In absolute addressing mode, the address of the operand is directly specified in the instruction, allowing direct access to memory locations.
431. A processor needs software interrupt to
Test the interrupt system of the processor
Implement co routines
Obtain system services which need execution of privileged instructions
Return from subroutine
Show me the answer
Answer: 3. Obtain system services which need execution of privileged instructions
Explanation:
Software interrupts are used by a processor to obtain system services that require the execution of privileged instructions, such as accessing hardware resources.
432. Horizontal microprogramming...
Does not require use of signal decoders
Results in larger sized micro-instructions than vertical micro-programming
Use one bit for each control signal
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
Horizontal microprogramming uses one bit for each control signal, resulting in larger micro-instructions and eliminating the need for signal decoders.
433. The main difference (s) between a CISC and RISC processor is/are that a RISC processor typically has
A fewer instruction
A fewer addressing mode
A more register, an ease to implement using hardwired control logic
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
RISC processors typically have fewer instructions, fewer addressing modes, more registers, and are easier to implement using hardwired control logic compared to CISC processors.
434. The exponent of a floating-point number is represented in excess -N code so that
The dynamic range is large
The precision is high
The smallest number is represented by all zeros
Overflow is avoided
Show me the answer
Answer: 3. The smallest number is represented by all zeros
Explanation:
The exponent in floating-point numbers is represented in excess-N code so that the smallest number is represented by all zeros, simplifying comparisons and arithmetic operations.
435. If negative numbers are stored in 2's complement form, the range of numbers that can be stored in 8 bits is......
-128 to +128
-128 to +127
-127 to +128
-127 to +127
Show me the answer
Answer: 2. -128 to +127
Explanation:
In 2's complement form, an 8-bit number can represent values from -128 to +127, as the most significant bit is used to indicate the sign.
436. On receiving an interrupt from an I/O device, the CPU
Halts for a pre-determined time
Hands over control of address bus and data bus to the interrupting device
Branches off to the interrupt service routine immediately
Branches off to the interrupt service routine after completion of the current instruction
Show me the answer
Answer: 4. Branches off to the interrupt service routine after completion of the current instruction
Explanation:
The CPU typically completes the current instruction before branching to the interrupt service routine to ensure the integrity of the program state.
437. In serial communication, an extra clock is needed
To synchronize the devices
For programmed baud rate control
To make efficient use of RS-232
None of the above
Show me the answer
Answer: 1. To synchronize the devices
Explanation:
In serial communication, an extra clock is needed to synchronize the transmitting and receiving devices, ensuring accurate data transfer.
438. Which of the following rules regarding the addition of 2 given numbers is correct, if negative numbers are represented in 2's complement form?
Add sign bit and discard carry, if any.
Add sign bit and add carry, if any.
Don't add sign bit and discard carry, if any.
Don't add sign bit and add carry, if any.
Show me the answer
Answer: 4. Don't add sign bit and add carry, if any.
Explanation:
In 2's complement addition, the sign bit is not added separately, and the carry is added to the result if it occurs, ensuring correct arithmetic operations.
439. The difference between 80486 and 80386 is/are...
Presence of floating-point co-processor
Speed of operation
Presence of 8 K cache on chip, presence of memory controller
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
The 80486 includes a floating-point co-processor, operates at higher speeds, and has an 8K on-chip cache and memory controller, distinguishing it from the 80386.
440. In virtual memory system, the addresses used by the programmer belongs to
Memory space
Physical addresses
Address space
Main memory address
Show me the answer
Answer: 3. Address space
Explanation:
In a virtual memory system, the addresses used by the programmer belong to the address space, which is mapped to physical memory by the memory management unit.
441. The method for updating the main memory as soon as word is removed from the cache is called
Write-through
Write-back
Protected-write
Cache write
Show me the answer
Answer: 2. Write-back
Explanation:
The write-back method updates main memory only when a word is removed from the cache, reducing the number of memory writes and improving performance.
442. Which is true for a typical RISC architecture?
Micro programmed control unit
Instruction takes multiple cycles
Have fewer register in CPU
Emphasis on optimizing instruction pipelines.
Show me the answer
Answer: 4. Emphasis on optimizing instruction pipelines.
Explanation:
RISC architectures emphasize optimizing instruction pipelines to improve performance, often using hardwired control units and single-cycle instructions.
443. After reset, CPU begins execution of instruction from memory address
0101H
8000H
0000H
FFFFH
Show me the answer
Answer: 3. 0000H
Explanation:
After a reset, the CPU typically begins execution from memory address 0000H, where the bootloader or initial program is stored.
444. In 8085 microprocessors how many I/O devices can be interfaced in I/O mapped I/O technique?
Either 256 input devices or 256 output devices.
256 I/O devices.
256 input devices & 256 output devices.
512 input-output devices.
Show me the answer
Answer: 2. 256 I/O devices.
Explanation:
In I/O mapped I/O technique, the 8085 microprocessor can interface up to 256 I/O devices, using 8-bit addressing.
445. DMA interface unit eliminates the need to use CPU registers to transfer data from
MAR to MBR
I/O units to memory
MBR to MAR
Memory to I/O units
Show me the answer
Answer: 2. I/O units to memory
Explanation:
The DMA (Direct Memory Access) interface unit allows data to be transferred directly between I/O units and memory without involving the CPU registers.
446. How many 128 x 8 RAM chips are needed to provide a memory capacity of 2048 bytes?
8
16
24
32
Show me the answer
Answer: 2. 16
Explanation:
To provide 2048 bytes of memory using 128 x 8 RAM chips, you need 16 chips (2048 bytes / 128 bytes per chip = 16).
447. What is the bit storage capacity of a ROM with a 512 x 4-organization?
2049
2048
2047
2046
Show me the answer
Answer: 2. 2048
Explanation:
A ROM with a 512 x 4 organization has a bit storage capacity of 512 * 4 = 2048 bits.
448. How many different addresses are required by the memories that contain 16K words?
16,380
16,382
16,384
16,386
Show me the answer
Answer: 3. 16,384
Explanation:
A memory containing 16K words requires 16,384 unique addresses (16K = 16 * 1024 = 16,384).
449. The content of a 4-bit register is initially 1101. The register is shifted 2 times to the right with the serial input being 1011101. What is the content of the register after each shift?
1110,0111
0001,1000
1101,1011
1001,1001
Show me the answer
Answer: 1. 1110,0111
Explanation:
After two right shifts with the serial input 1011101, the register content changes to 1110 and then 0111.
450. ABCD - seven segment decoder / driver in connected to an LED display. Which segments are illuminated for the input code DCBA = 0001?
b,c
c,b
a,b,c
a,b,c,d
Show me the answer
Answer: 1. b,c
Explanation:
For the input code DCBA = 0001, segments b and c are illuminated in a seven-segment display, representing the digit "1".
451. Address symbol table is generated by
Memory management software
Assembler
Match logic of associative memory
Generated by operating system
Show me the answer
Answer: 2. Assembler
Explanation:
The address symbol table is generated by the assembler during the assembly process. It maps symbolic addresses to their corresponding memory addresses.
452. When an instruction is read from the memory, it is called
Memory read cycle
Fetch cycle
Instruction cycle
Memory write cycle
Show me the answer
Answer: 2. Fetch cycle
Explanation:
The fetch cycle is the process of retrieving an instruction from memory. It is the first step in the instruction cycle.
453. Which activity does not take place during execution cycle?
ALU performs the arithmetic and logical operation
Effective address is calculated
Next instruction is fetched
Branch address is calculated and branching conditions are checked
Show me the answer
Answer: 3. Next instruction is fetched
Explanation:
The next instruction is fetched during the fetch cycle, not the execution cycle. The execution cycle involves performing operations like ALU calculations, effective address calculation, and branching.
454. The time for which the D-input of a D-FF must not change after the clock is applied is known as
Hold time
Set-up time
Transition time
Delay time
Show me the answer
Answer: 1. Hold time
Explanation:
Hold time is the minimum time for which the input (D-input) must remain stable after the clock edge to ensure proper operation of the flip-flop.
455. How many memory chips of (128 x 8) are needed to provide a memory capacity of 4096 x 16?
64
16
32
128
Show me the answer
Answer: 1. 64
Explanation:
Each chip provides 128 x 8 bits = 1024 bits. For 4096 x 16 bits = 65536 bits, the number of chips required is 65536 / 1024 = 64.
456. In addition of two signed numbers, represented in 2's complement form generates an overflow if
A. B = 0
A = 0
A. B = 1
A + B = 1
Show me the answer
Answer: 3. A. B = 1
Explanation:
Overflow occurs in 2's complement addition if the sign bits of the operands are the same but differ from the sign bit of the result.
457. In DMA the data transfer is controlled by...
Microprocessor
RAM
Memory
I/O devices
Show me the answer
Answer: 4. I/O devices
Explanation:
In DMA (Direct Memory Access), data transfer is controlled by I/O devices, bypassing the CPU to directly access memory.
458. Synchronous means...
At irregular intervals
At same time
At variable time
None of the above
Show me the answer
Answer: 2. At same time
Explanation:
Synchronous operations occur at the same time or are coordinated by a clock signal.
459. Excess-3 equivalent representation of (1234) H is
(1237) Ex-3
(4567) Ex-3
(7993) Ex-3
(4663) Ex-3
Show me the answer
Answer: 2. (4567) Ex-3
Explanation:
Excess-3 code is obtained by adding 3 to each digit of the hexadecimal number. For (1234)H, the Excess-3 equivalent is (4567)Ex-3.
460. Which of the memory holds the information when the Power Supply is switched off?
Static RAM
Dynamic RAM
EEROM
None of the above
Show me the answer
Answer: 3. EEROM
Explanation:
EEROM (Electrically Erasable Read-Only Memory) retains data even when the power is switched off, unlike volatile memories like SRAM and DRAM.
461. Minimum no. of NAND gate required implementing an Ex-OR function is
2
3
4
5
Show me the answer
Answer: 3. 4
Explanation:
A minimum of 4 NAND gates are required to implement an XOR function.
462. Which of the following expression is not equivalent to x?
x NAND x
x NOR x
x NAND 1
x NOR 1
Show me the answer
Answer: 4. x NOR 1
Explanation:
The expression x NOR 1 is equivalent to NOT x, which is not the same as x.
463. BCD equivalent of Two's complement is
Nine's complement
One's complement+1
Ten's complement
None of the above
Show me the answer
Answer: 3. Ten's complement
Explanation:
The BCD equivalent of Two's complement is Ten's complement.
464. Associative memory is sometimes called as...
Virtual memory
Cache memory
Main memory
Content addressable memory
Show me the answer
Answer: 4. Content addressable memory
Explanation:
Associative memory is also known as Content Addressable Memory (CAM), where data is accessed based on its content rather than an address.
465. When CPU is not fully loaded, which of the following method of data transfer is preferred?
DMA
Interrupt
Polling
None of the above
Show me the answer
Answer: 2. Interrupt
Explanation:
When the CPU is not fully loaded, interrupt-driven data transfer is preferred as it allows the CPU to handle other tasks while waiting for I/O operations.
466. 8085 microprocessor carryout the subtraction by
BCD subtraction method
Hexadecimal subtraction method
2's complement method
Floating Point subtraction method
Show me the answer
Answer: 3. 2's complement method
Explanation:
The 8085 microprocessor performs subtraction using the 2's complement method.
467. PAL circuit consists of
Fixed OR & programmable AND logic
Programmable OR & Fixed AND Logic
Fixed OR & fixed AND logic
Programmable OR & programmable AND logic
Show me the answer
Answer: 1. Fixed OR & programmable AND logic
Explanation:
PAL (Programmable Array Logic) consists of a fixed OR array and a programmable AND array.
468. CPU checks for an interrupt signal during
Starting of last Machine cycle
First T-State of interrupt cycle
Last T-State of instruction cycle
Fetch cycle
Show me the answer
Answer: 3. Last T-State of instruction cycle
Explanation:
The CPU checks for interrupt signals during the last T-State of the instruction cycle.
469. Which of the following is not a characteristic of RISC architecture......?
Larger instruction set
Simple addressing mode
One instruction per cycle
Register to register operation
Show me the answer
Answer: 1. Larger instruction set
Explanation:
RISC architecture is characterized by a smaller instruction set, not a larger one.
470. Memory interleaving technique is used to address the memory modules in order to have
Higher average utilization
Faster access to a block of data
Reduced complexity in mapping hardware
Both (A) and (B)
Show me the answer
Answer: 4. Both (A) and (B)
Explanation:
Memory interleaving improves average utilization and provides faster access to data blocks by distributing memory accesses across multiple modules.
471. In a multiprogramming system, which of the following is used?
Data parallelism
L1 cache
Paging concept
None of the above
Show me the answer
Answer: 3. Paging concept
Explanation:
Multiprogramming systems use the paging concept to manage memory efficiently and allow multiple programs to run concurrently.
472. Cycle stealing technique is used in
Interrupt based data transfer
DMA based data transfer
Polled mode data transfer
None of the above
Show me the answer
Answer: 2. DMA based data transfer
Explanation:
Cycle stealing is a technique used in DMA (Direct Memory Access) where the DMA controller temporarily takes control of the bus to transfer data.
473. During DMA acknowledge cycle, CPU relinquishes
Address bus only
Control bus and data bus
Address bus and control bus
Data bus and address bus
Show me the answer
Answer: 4. Data bus and address bus
Explanation:
During a DMA acknowledge cycle, the CPU relinquishes control of the data bus and address bus to the DMA controller.
474. If the stack pointer is initialized with (4FEB) H, then after execution of Push operation in 8085 microprocessors, the Stack Pointer shall be
4FEA
4FEC
4FED
4FE9
Show me the answer
Answer: 1. 4FEA
Explanation:
In the 8085 microprocessor, the stack pointer decrements by 2 after a push operation. So, 4FEB - 2 = 4FEA.
475. A more efficient way to organize a Page Table is by means of an associative memory having
Number of words equal to number of pages
Number of words more than the number of pages
Number of words less than the number of pages
Any one of the above
Show me the answer
Answer: 1. Number of words equal to number of pages
Explanation:
An associative memory (like a TLB) is most efficient when the number of words equals the number of pages.
476. If there are four ROM ICs of 8K and two RAM ICs of 4K words, then the address range of 1st RAM is (Assume initial addresses correspond to ROMs)
(8000) H to (9FFF) H
(8000) H to (8FFF) H
(6000) H to (7FFF) H
(9000) H to (9FFF) H
Show me the answer
Answer: 2. (8000) H to (8FFF) H
Explanation:
The first RAM starts after the ROMs. Since ROMs occupy 32K (4 x 8K), the RAM starts at 8000H and ends at 8FFFH.
477. A.B.C is equal to A B C for
A=0, B=1, C=0
A=1, B=0, C=1
A=1, B=1, C=1
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
The expression A.B.C is equivalent to A B C for all combinations of A, B, and C.
478. Gray code equivalent of (1000)2 is
1111
1100
1000
None of the above
Show me the answer
Answer: 2. 1100
Explanation:
The Gray code equivalent of binary 1000 is 1100.
479. The memory blocks are mapped on to the cache with the help of......
Hash functions
Vectors
Mapping functions
None of the above
Show me the answer
Answer: 3. Mapping functions
Explanation:
Memory blocks are mapped to cache using mapping functions like direct, associative, or set-associative mapping.
480. During a write operation if the required block is not present in the cache then...... occurs
Write latency
Write hit
Write delay
Write miss
Show me the answer
Answer: 4. Write miss
Explanation:
A write miss occurs when the required block is not present in the cache during a write operation.
481. In...... protocol the information is directly written into main....
Write through
Write back
Write first
None of the above
Show me the answer
Answer: 1. Write through
Explanation:
In the write-through protocol, data is written directly to both the cache and the main memory.
482. The method of mapping the consecutive memory blocks to consecutive cache blocks is called....
Set associative
Associative
Direct
Indirect
Show me the answer
Answer: 3. Direct
Explanation:
Direct mapping maps consecutive memory blocks to consecutive cache blocks in a fixed manner.
483. While using the direct mapping technique, in a 16-bit system the higher order 5 bits is used for....
Tag
Block
Word
Id
Show me the answer
Answer: 1. Tag
Explanation:
In direct mapping, the higher-order bits are used as the tag to identify the memory block.
484. The technique of searching for a block by going through all tags is......
Linear search
Binary search
Associative search
None of the above
Show me the answer
Answer: 3. Associative search
Explanation:
Associative search involves comparing all tags simultaneously to find a match.
485. In case of Zero-address instruction method the operands are stored in....
Register
Accumulators
Push down stack
Cache
Show me the answer
Answer: 3. Push down stack
Explanation:
In zero-address instructions, operands are stored in a push-down stack.
486. The addressing mode which makes use of in-direction pointer is......
Indirect addressing mode
Index addressing mode
Relative addressing mode
Offset addressing mode
Show me the answer
Answer: 1. Indirect addressing mode
Explanation:
Indirect addressing mode uses a pointer to the memory location where the actual operand is stored.
487. The addressing mode, where you directly specify the operand value is
Immediate
Direct
Definite
Relative
Show me the answer
Answer: 1. Immediate
Explanation:
Immediate addressing mode directly specifies the operand value in the instruction.
488. ...addressing mode is most suitable to change the normal sequence of execution of instructions.
Relative
Indirect
Index with offset
Immediate
Show me the answer
Answer: 1. Relative
Explanation:
Relative addressing mode is used to change the normal sequence of execution by specifying an offset from the current instruction pointer.
489. The pipelining process is also called as....
Superscalar operation
Assembly line operation
Von Neumann cycle
None of the mentioned
Show me the answer
Answer: 2. Assembly line operation
Explanation:
Pipelining is often compared to an assembly line, where multiple stages of instruction execution overlap.
490. The fetch and execution cycles are interleaved with the help of......
Modification in processor architecture
Clock
Special unit
Control unit
Show me the answer
Answer: 2. Clock
Explanation:
The clock synchronizes the fetch and execution cycles, allowing them to interleave efficiently.
491. The situation where in the data of operands are not available is called...
Data hazard
Stock
Deadlock
Structural hazard
Show me the answer
Answer: 1. Data hazard
Explanation:
A data hazard occurs when the data required for an instruction is not yet available.
492. The reason for the implementation of the cache memory is
To increase the internal memory of the system
The difference in speeds of operation of the processor and memory
To reduce the memory access and cycle time
All of the above
Show me the answer
Answer: 2. The difference in speeds of operation of the processor and memory
Explanation:
Cache memory is implemented to bridge the speed gap between the processor and main memory.
493. The effectiveness of the cache memory is based on the property of ______.
Locality of reference
Memory localization
Memory size
None of the above
Show me the answer
Answer: 1. Locality of reference
Explanation:
Cache memory leverages the principle of locality of reference, where programs tend to access the same data or nearby data repeatedly.
494. The temporal aspect of the locality of reference means
That the recently executed instruction won't be executed soon
That the recently executed instruction is temporarily not referenced
That the recently executed instruction will be executed soon again
None of the above
Show me the answer
Answer: 3. That the recently executed instruction will be executed soon again
Explanation:
Temporal locality refers to the tendency of a program to reuse the same data or instructions in the near future.
495. The spatial aspect of the locality of reference means
That the recently executed instruction is executed again next
That the recently executed won't be executed again
That the instruction executed will be executed at a later time
That the instruction in close proximity of the instruction executed will be executed in future
Show me the answer
Answer: 4. That the instruction in close proximity of the instruction executed will be executed in future
Explanation:
Spatial locality refers to the tendency of a program to access data or instructions that are close to recently accessed data.
496. The algorithm to remove and place new contents into the cache is called ______.
Renewal algorithm
Updating
Replacement algorithm
None of the above
Show me the answer
Answer: 3. Replacement algorithm
Explanation:
The replacement algorithm determines which cache block to replace when new data needs to be loaded.
497. The key factor/s in commercial success of a computer is/are......
Performance
Cost
Speed
Both A and B
Show me the answer
Answer: 4. Both A and B
Explanation:
The commercial success of a computer depends on both performance and cost.
498. The main objective of the computer system is
To provide optimal power operation
To provide best performance at low cost
To provide speedy operation at low power consumption
All of the above
Show me the answer
Answer: 2. To provide best performance at low cost
Explanation:
The primary objective of a computer system is to deliver the best performance at the lowest possible cost.
499. A common measure of performance is:
Price/performance ratio
Performance /price ratio
Operation/price ratio
None of the above
Show me the answer
Answer: 1. Price/performance ratio
Explanation:
The price/performance ratio is a common metric used to evaluate the efficiency of a computer system.
500. The main purpose of having memory hierarchy is to
Reduce access time
Provide large capacity
Reduce propagation time
Both A and B
Show me the answer
Answer: 4. Both A and B
Explanation:
Memory hierarchy aims to reduce access time and provide large storage capacity.
501. Who developed the basic architecture of computer?
Blaise Pascal
Charles Babbage
John Von Neumann
None of the above
Show me the answer
Answer: 3. John Von Neumann
Explanation:
John Von Neumann developed the basic architecture of modern computers, known as the Von Neumann architecture.
502. Which of the following allows simultaneous write and read operations?
ROM
FROM
RAM
None of the above
Show me the answer
Answer: 3. RAM
Explanation:
RAM (Random Access Memory) allows simultaneous read and write operations.
503. Which of the following is not considered as a peripheral device?
CPU
Keyboard
Monitor
All of the above
Show me the answer
Answer: 1. CPU
Explanation:
The CPU is the central processing unit and is not considered a peripheral device. Peripherals include input/output devices like keyboards and monitors.
504. Which of the following computer memory is fastest?
Register
Hard disk
RAM
None of the above
Show me the answer
Answer: 1. Register
Explanation:
Registers are the fastest memory in a computer, located directly in the CPU.
505. Which of the following operations is/are performed by the ALU?
Data manipulation
Exponential
Square root
All of the above
Show me the answer
Answer: 4. All of the above
Explanation:
The ALU (Arithmetic Logic Unit) performs data manipulation, exponential calculations, and square root operations, among others.
506. Which of the following format is used to store data?
Decimal
Octal
BCD
Hexadecimal
Show me the answer
Answer: 3. BCD
Explanation:
BCD (Binary Coded Decimal) is a format used to store decimal numbers in binary form.
507. Which of the following memory of the computer is used to speed up the computer processing?
Cache memory
RAM
ROM
None of the above
Show me the answer
Answer: 1. Cache memory
Explanation:
Cache memory is used to speed up computer processing by storing frequently accessed data closer to the CPU.
508. Computer address, bus is -
Multidirectional
Bidirectional
Unidirectional
None of the above
Show me the answer
Answer: 3. Unidirectional
Explanation:
The address bus is unidirectional, carrying addresses from the CPU to memory or I/O devices.
509. Which of the following circuit is used to store one bit of data?
Flip Flop
Decoder
Encoder
Register
Show me the answer
Answer: 1. Flip Flop
Explanation:
A flip-flop is a basic circuit used to store one bit of data.
510. Which of the following is a way in which the components of a computer are connected to each other?
Computer parts
Computer architecture
Computer hardware
None of the above
Show me the answer
Answer: 2. Computer architecture
Explanation:
Computer architecture defines how components of a computer are connected and interact with each other.
511. Which of the following circuit convert the binary data into a decimal?
Decoder
Encoder
Code converter
Multiplexer
Show me the answer
Answer: 3. Code converter
Explanation:
A code converter is used to convert binary data into decimal or other formats.
512. The address in the main memory is known as -
Logical address
Physical address
Memory address
None of the above
Show me the answer
Answer: 2. Physical address
Explanation:
The address in the main memory is referred to as the physical address.
513. Subtraction in computers is carried out by -
1's complement
2's complement
3's complement
9's complement
Show me the answer
Answer: 2. 2's complement
Explanation:
Subtraction in computers is typically performed using the 2's complement method.
514. Which of the following computer bus connects the CPU to a memory on the system board?
Expansion bus
Width bus
System bus
None of the above
Show me the answer
Answer: 3. System bus
Explanation:
The system bus connects the CPU to memory and other components on the system board.
515. Which of the following memory unit communicates directly with the CPU?
Auxiliary memory
Main memory
Secondary memory
None of the above
Show me the answer
Answer: 2. Main memory
Explanation:
Main memory (RAM) communicates directly with the CPU.
516. The collection of 8-bits is called as -
Byte
Nibble
Word
Record
Show me the answer
Answer: 1. Byte
Explanation:
A collection of 8 bits is called a byte.
517. Which of the following register can interact with the secondary storage?
PC
MAR
MDR
IR
Show me the answer
Answer: 3. MDR
Explanation:
The Memory Data Register (MDR) interacts with secondary storage during data transfer.
518. In which of the following form the computer stores its data in memory?
Hexadecimal form
Octal form
Binary form
Decimal form
Show me the answer
Answer: 3. Binary form
Explanation:
Computers store data in binary form (0s and 1s).
519. Which of the following is a combinational logic circuit which sends data from a single source to two or more separate destinations?
Multiplexer
Demultiplexer
Encoder
Decoder
Show me the answer
Answer: 2. Demultiplexer
Explanation:
A demultiplexer sends data from a single source to multiple destinations.
520. Which of the following is a group of bits that tells the computer to perform a particular operation?
Accumulator
Register
Instruction code
None of the above
Show me the answer
Answer: 3. Instruction code
Explanation:
The instruction code is a group of bits that tells the computer what operation to perform.
521. Where is the document temporarily stored during working on a document on PC?
ROM
CPU
RAM
Flash memory
Show me the answer
Answer: 3. RAM
Explanation:
Documents are temporarily stored in RAM while being worked on.
522. Where is the decoded instruction stored?
Registers
MDR
PC
IR
Show me the answer
Answer: 4. IR
Explanation:
The decoded instruction is stored in the Instruction Register (IR).
523. What does MIMD stand for?
Multiple Instruction Memory Data
Multiple Instruction Multiple Data
Memory Instruction Multiple Data
Memory Information Memory Data
Show me the answer
Answer: 2. Multiple Instruction Multiple Data
Explanation:
MIMD stands for Multiple Instruction Multiple Data, a parallel computing architecture.
524. The status bit is also called as -
Unsigned bit
Signed bit
Flag bit
None of the above
Show me the answer
Answer: 3. Flag bit
Explanation:
The status bit is also known as the flag bit, indicating the status of operations.
525. Which of the following register keeps track of the instructions stored in the program stored in memory?
Accumulator
Address Register
Program Counter
Index Register
Show me the answer
Answer: 3. Program Counter
Explanation:
The Program Counter (PC) keeps track of the next instruction to be executed.
526. The Program Counter is also called as
Instruction Pointer
Data Counter
Memory pointer
None of the above
Show me the answer
Answer: 1. Instruction Pointer
Explanation:
The Program Counter (PC) is also known as the Instruction Pointer.
527. Which of the following topology is used in Ethernet?
Ring topology
Bus topology
Mesh topology
Star topology
Show me the answer
Answer: 2. Bus topology
Explanation:
Ethernet commonly uses a bus topology.
528. Which of the following is correct about memory and storage?
Memory is temporary, Storage is temporary
Memory is temporary, Storage is permanent
Memory is permanent, Storage is temporary
Memory is slow, Storage is fast
Show me the answer
Answer: 2. Memory is temporary, Storage is permanent
Explanation:
Memory (RAM) is temporary, while storage (like hard drives) is permanent.
529. Which of the following is equal to 4 bits?
Byte
Nibble
Record
All of the above
Show me the answer
Answer: 2. Nibble
Explanation:
A nibble is equal to 4 bits.
530. What does one thousand bytes represent?
Kilobyte (KB)
Megabyte (MB)
Gigabyte (GB)
Terabyte (TB)
Show me the answer
Answer: 1. Kilobyte (KB)
Explanation:
One thousand bytes represent a kilobyte (KB).
531. What is the content of stack pointer (SP)?
Address of the top element in the stack
Address of current instruction
Address of next instruction
None of the above
Show me the answer
Answer: 1. Address of the top element in the stack
Explanation:
The stack pointer (SP) holds the address of the top element in the stack, which is the last element added to the stack.
532. An n-bit microprocessor has -
n-bit instruction register
n-bit address register
n-bit program counter
None of the above
Show me the answer
Answer: 1. n-bit instruction register
Explanation:
An n-bit microprocessor typically has an n-bit instruction register to hold the current instruction being executed.
533. Which of the following is the operation executed on data stored in registers?
Byte operation
Bit operation
Macrooperation
Microoperation
Show me the answer
Answer: 4. Microoperation
Explanation:
Microoperations are the basic operations performed on data stored in registers, such as arithmetic, logic, and shift operations.
534. What does a computer bus line consist of?
Set of parallel lines
Accumulators
Registers
None of the above
Show me the answer
Answer: 1. Set of parallel lines
Explanation:
A computer bus consists of a set of parallel lines that carry data, addresses, and control signals between components.
535. Which of the following is performed by half adder?
Binary addition operation for 2 decimal inputs
Binary addition operation for 2 binary inputs
Decimal addition operation for 2 decimal inputs
Binary addition operation for 2 binary inputs
Show me the answer
Answer: 2. Binary addition operation for 2 binary inputs
Explanation:
A half adder performs binary addition on two single-bit binary inputs, producing a sum and a carry output.
536. Which of the following is a combinational logic circuit which converts binary information from n coded inputs to a maximum of 2n unique outputs?
Multiplexer
Demultiplexer
Encoder
Decoder
Show me the answer
Answer: 4. Decoder
Explanation:
A decoder converts binary information from n inputs to a maximum of 2^n unique outputs, typically used in address decoding.
537. Which of the following is a combinational logic circuit that change the binary information into N output lines?
Multiplexer
Demultiplexer
Encoder
Decoder
Show me the answer
Answer: 2. Demultiplexer
Explanation:
A demultiplexer takes a single input and directs it to one of several output lines based on the control signals.
538. Which of the following is a combinational logic circuit that has 2^n input lines and a single output line?
Multiplexer
Demultiplexer
Encoder
Decoder
Show me the answer
Answer: 1. Multiplexer
Explanation:
A multiplexer selects one of several input lines and forwards it to a single output line based on control signals.
539. Which of the following building block can be used to implement any combinational logic circuit?
AND
OR
NAND
None of the above
Show me the answer
Answer: 3. NAND
Explanation:
NAND gates are universal gates, meaning any combinational logic circuit can be implemented using only NAND gates.
540. Which of the following is the circuit board on which chips and processor are placed?
Master circuit
Motherboard
Big board
None of the above
Show me the answer
Answer: 2. Motherboard
Explanation:
The motherboard is the main circuit board in a computer, where the CPU, memory, and other components are connected.
541. Which of the following computer register collects the result of computation?
Accumulator
Instruction Pointer
Storage register
None of the above
Show me the answer
Answer: 1. Accumulator
Explanation:
The accumulator is a register that stores the results of arithmetic and logic operations performed by the CPU.
542. CISC stands for -
Complex Instruction Set Computer
Complete Instruction Sequential Compilation
Complex Instruction Sequential Compiler
None of the above
Show me the answer
Answer: 1. Complex Instruction Set Computer
Explanation:
CISC (Complex Instruction Set Computer) is a type of microprocessor architecture that uses complex instructions to perform multiple operations in a single instruction.
543. Which of the following is the function of the control unit in the CPU?
It stores program instruction
It decodes program instruction
It performs logic operations
None of the above
Show me the answer
Answer: 2. It decodes program instruction
Explanation:
The control unit in the CPU is responsible for decoding instructions and generating control signals to execute them.
544. What does EEPROM stands for?
Electrically Erasable and Programmable Read-Only Memory
Electronically Erasable and Programmable Read-Only Memory
Electrically Enabled and Programmable Read-Only Memory
None of the above
Show me the answer
Answer: 1. Electrically Erasable and Programmable Read-Only Memory
Explanation:
EEPROM (Electrically Erasable and Programmable Read-Only Memory) is a type of non-volatile memory that can be erased and reprogrammed electrically.
545. In which of the following term the performance of cache memory is measured?
Chat ratio
Hit ratio
Copy ratio
Data ratio
Show me the answer
Answer: 2. Hit ratio
Explanation:
The performance of cache memory is often measured by the hit ratio, which is the percentage of memory accesses that are found in the cache.
546. RISC stands for -
Reduce Instruction Set Computer
Risk Instruction Sequential Compilation
Risk Instruction Source Compiler
None of the above
Show me the answer
Answer: 1. Reduce Instruction Set Computer
Explanation:
RISC (Reduced Instruction Set Computer) is a type of microprocessor architecture that uses a small, highly optimized set of instructions.
547. Which of the following is an essential data transfer technique?
MMA
DMA
CAD
CAM
Show me the answer
Answer: 2. DMA
Explanation:
DMA (Direct Memory Access) is a data transfer technique that allows peripherals to access memory directly without CPU intervention.
548. Which of the following is page fault?
Page fault occurs when a program accesses a page of another program
Page fault occurs when a program accesses a page in main memory
Page fault occurs when there is an error in particular page
Page fault occurs when a program accesses a page which is not present in main memory
Show me the answer
Answer: 4. Page fault occurs when a program accesses a page which is not present in main memory
Explanation:
A page fault occurs when a program tries to access a page that is not currently in the main memory, requiring the operating system to load it from secondary storage.
549. What does DRAM stand for?
Dynamic Read Access Memory
Digital Random-Access Memory
Dynamic Random-Access Memory
Dynamic Read Allocation Memory
Show me the answer
Answer: 3. Dynamic Random-Access Memory
Explanation:
DRAM (Dynamic Random-Access Memory) is a type of volatile memory that stores each bit of data in a separate capacitor within an integrated circuit.
550. Which of the following is known as the step by step procedure to solve a problem?
Graph
Table
Algorithm
None of the above
Show me the answer
Answer: 3. Algorithm
Explanation:
An algorithm is a step-by-step procedure or set of rules to solve a problem or perform a computation.
