# set-9

#### 401. A 32-bit data word consists of

1. 2 bytes
2. 4 bytes
3. 4 nibbles
4. 3 bytes and 1 nibble

<details>

<summary>Show me the answer</summary>

**Answer:** 2. 4 bytes

**Explanation:**

* A 32-bit data word consists of 32 bits.
* Since 1 byte = 8 bits, a 32-bit word is equal to:\
  $$\frac{32}{8} = 4 \text{ bytes}$$
* Therefore, the correct answer is **4 bytes**.

</details>

#### 402. Data are stored in a random-access memory (RAM) during the

1. Read operation
2. Write operation
3. Enable operation
4. Addressing operation

<details>

<summary>Show me the answer</summary>

**Answer:** 2. Write operation

**Explanation:**

* Data is stored in RAM during the **write operation**.
* During the write operation, data is written into the memory location specified by the address.
* Therefore, the correct answer is **Write operation**.

</details>

#### 403. Data that are stored at a given address in a random-access memory (RAM) is lost when

1. Power goes off
2. New data are written at the address
3. The data are read from the address
4. Answer (A) and (B)

<details>

<summary>Show me the answer</summary>

**Answer:** 4. Answer (A) and (B)

**Explanation:**

* Data stored in RAM is volatile, meaning it is lost when **power goes off**.
* Additionally, if **new data is written** to the same address, the previous data is overwritten and lost.
* Therefore, the correct answer is **Answer (A) and (B)**.

</details>

#### 404. A ROM is a

1. Nonvolatile memory
2. Read/write memory
3. Volatile memory
4. Byte-organized memory

<details>

<summary>Show me the answer</summary>

**Answer:** 1. Nonvolatile memory

**Explanation:**

* ROM (Read-Only Memory) is a type of **nonvolatile memory**, meaning it retains its data even when power is turned off.
* Therefore, the correct answer is **Nonvolatile memory**.

</details>

#### 405. A memory with 256 addresses has

1. 256 address lines
2. A address lines
3. A address lines
4. 8 address lines

<details>

<summary>Show me the answer</summary>

**Answer:** 4. 8 address lines

**Explanation:**

* A memory with 256 addresses requires:\
  $$\log\_2{256} = 8 \text{ address lines}$$
* Therefore, the correct answer is **8 address lines**.

</details>

#### 406. A byte-organized memory has

1. 1 data output
2. 8 data output
3. 4 data output
4. 16 data output

<details>

<summary>Show me the answer</summary>

**Answer:** 2. 8 data output

**Explanation:**

* A byte-organized memory has **8 data outputs** because a byte consists of 8 bits.
* Therefore, the correct answer is **8 data output**.

</details>

#### 407. The storage cell in a SRAM is

1. A flip-flop
2. A fuse
3. A capacitor
4. A magnetic domain

<details>

<summary>Show me the answer</summary>

**Answer:** 1. A flip-flop

**Explanation:**

* The storage cell in SRAM (Static Random-Access Memory) is typically a **flip-flop**, which retains data as long as power is supplied.
* Therefore, the correct answer is **A flip-flop**.

</details>

#### 408. A DRAM must be

1. Replaced periodically
2. Always enabled
3. Refreshed periodically
4. Programmed before each use

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Refreshed periodically

**Explanation:**

* DRAM (Dynamic Random-Access Memory) uses capacitors to store data, which leak charge over time.
* Therefore, DRAM must be **refreshed periodically** to maintain data integrity.
* The correct answer is **Refreshed periodically**.

</details>

#### 409. A flash memory is

1. Nonvolatile
2. A read/write memory
3. A read-only memory
4. Answers (A) and (B)

<details>

<summary>Show me the answer</summary>

**Answer:** 4. Answers (A) and (B)

**Explanation:**

* Flash memory is **nonvolatile**, meaning it retains data without power.
* It is also a **read/write memory**, allowing data to be written and read multiple times.
* Therefore, the correct answer is **Answers (A) and (B)**.

</details>

#### 410. Hard disk, floppy disk, Zip disk, and Jaz disk are all

1. Magneto-optical storage devices
2. Magnetic storage devices
3. Semiconductor storage devices
4. Optical storage devices

<details>

<summary>Show me the answer</summary>

**Answer:** 2. Magnetic storage devices

**Explanation:**

* Hard disks, floppy disks, Zip disks, and Jaz disks all use **magnetic storage** to store data.
* Therefore, the correct answer is **Magnetic storage devices**.

</details>

#### 411. Optical storage devices employ

1. Ultraviolet light
2. Optical couplers
3. Electromagnetic field
4. Lasers

<details>

<summary>Show me the answer</summary>

**Answer:** 4. Lasers

**Explanation:**

* Optical storage devices, such as CDs and DVDs, use **lasers** to read and write data.
* Therefore, the correct answer is **Lasers**.

</details>

#### 412. A fixed-function IC package containing four AND gates in an example of

1. MSI
2. SOIC
3. SMT
4. SSI

<details>

<summary>Show me the answer</summary>

**Answer:** 4. SSI

**Explanation:**

* SSI (Small-Scale Integration) refers to ICs containing a small number of gates, typically fewer than 10.
* A package with four AND gates is an example of **SSI**.
* Therefore, the correct answer is **SSI**.

</details>

#### 413. An LSI device has a circuit complexity of

1. 12 to 99 equivalent gates
2. 2000 to 5000 equivalent gates
3. 100 to 9999 equivalent gates
4. 10,000 to 99,999 equivalent gates

<details>

<summary>Show me the answer</summary>

**Answer:** 4. 10,000 to 99,999 equivalent gates

**Explanation:**

* LSI (Large-Scale Integration) refers to ICs with a complexity of **10,000 to 99,999 equivalent gates**.
* Therefore, the correct answer is **10,000 to 99,999 equivalent gates**.

</details>

#### 414. A positive-going pulse is applied to an inverter. The time interval from the leading edge of the input to the leading edge of the output is 7 ns. This parameter is

1. Speed-power product
2. Propagation delay $$t(\_{PLH})$$
3. Propagation delay, $$t(\_{PLH})$$
4. Pulse width

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Propagation delay, $$t(\_{PLH})$$

**Explanation:**

* The time interval from the leading edge of the input to the leading edge of the output is known as **propagation delay** $$(t(\_{PLH}))$$.
* Therefore, the correct answer is **Propagation delay,** $$(t(\_{PLH}))$$.

</details>

#### 415. The CMOS family with the fastest switching speed is

1. AC
2. ACT
3. HC
4. ALVC

<details>

<summary>Show me the answer</summary>

**Answer:** 4. ALVC

**Explanation:**

* The **ALVC (Advanced Low-Voltage CMOS)** family is known for its **fastest switching speed** among CMOS families.
* Therefore, the correct answer is **ALVC**.

</details>

#### 416. If power were the major criterion in the design of a digital system, the logic family that you would probably use is

1. HCL
2. LV
3. ALVC
4. LVC

<details>

<summary>Show me the answer</summary>

**Answer:** 4. LVC

**Explanation:**

* **LVC (Low-Voltage CMOS)** is designed for **low power consumption**, making it suitable for power-sensitive designs.
* Therefore, the correct answer is **LVC**.

</details>

#### 417. When the frequency of the input signal to a CMOS gate is increased, the average power dissipation

1. Decreases
2. Does not change
3. Increases
4. Decreases exponentially

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Increases

**Explanation:**

* In CMOS gates, **power dissipation increases** with the frequency of the input signal due to increased switching activity.
* Therefore, the correct answer is **Increases**.

</details>

#### 418. CMOS operates more reliably than TTL in a high-noise environment because of its

1. Lower noise margin
2. Higher noise margin
3. Input capacitance
4. Smaller power dissipation

<details>

<summary>Show me the answer</summary>

**Answer:** 2. Higher noise margin

**Explanation:**

* CMOS has a **higher noise margin** compared to TTL, making it more reliable in high-noise environments.
* Therefore, the correct answer is **Higher noise margin**.

</details>

#### 419. Proper handling of a CMOS device is necessary because of its

1. Fragile construction
2. High-noise immunity
3. Susceptibility to electrostatic discharge
4. Low power dissipation

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Susceptibility to electrostatic discharge

**Explanation:**

* CMOS devices are highly sensitive to **electrostatic discharge (ESD)**, which can damage the device.
* Therefore, the correct answer is **Susceptibility to electrostatic discharge**.

</details>

#### 420. Which of the following is not a TTL circuit?

1. 74F00
2. 74HC00
3. 74AS00
4. 74ALS00

<details>

<summary>Show me the answer</summary>

**Answer:** 2. 74HC00

**Explanation:**

* The **74HC00** is a CMOS device, not a TTL (Transistor-Transistor Logic) circuit.
* Therefore, the correct answer is **74HC00**.

</details>

#### 421. An open TTL NOR gate input

1. Acts as a LOW
2. Should be grounded
3. Acts as a HIGH
4. Answers (B) and (C)

<details>

<summary>Show me the answer</summary>

**Answer:** 4. Answers (B) and (C)

**Explanation:**

* An open TTL NOR gate input **acts as a HIGH** because TTL inputs float high when left unconnected.
* It is also recommended to **ground unused inputs** to avoid noise.
* Therefore, the correct answer is **Answers (B) and (C)**.

</details>

#### 422. An LS TTL gate can drive a maximum of

1. 20 unit loads
2. 40 unit loads
3. 10 unit loads
4. Unlimited unit loads

<details>

<summary>Show me the answer</summary>

**Answer:** 1. 20 unit loads

**Explanation:**

* An LS TTL gate can drive a maximum of **20 unit loads**.
* Therefore, the correct answer is **20 unit loads**.

</details>

#### 423. If two unused inputs of a LS TTL gate are connected to an input being driven by another LS TTL gate, the total number of remaining unit loads that can be driven by this gate is

1. Seven
2. Seventeen
3. Eight
4. Unlimited

<details>

<summary>Show me the answer</summary>

**Answer:** 2. Seventeen

**Explanation:**

* Each unused input of an LS TTL gate counts as **1 unit load**.
* If two unused inputs are connected, they consume **2 unit loads**, leaving **17 unit loads** remaining.
* Therefore, the correct answer is **Seventeen**.

</details>

#### 424. The main advantage of ECL over TTL or CMOS is

1. ECL is less expensive
2. ECL consumes less power
3. ECL is available in a greater variety of circuit type
4. ECL is faster

<details>

<summary>Show me the answer</summary>

**Answer:** 4. ECL is faster

**Explanation:**

* The main advantage of ECL (Emitter-Coupled Logic) over TTL or CMOS is its **high speed**.
* Therefore, the correct answer is **ECL is faster**.

</details>

#### 425. ECL cannot be used in

1. High-noise environments
2. High-frequency applications
3. Damp environments
4. ECL is less expensive

<details>

<summary>Show me the answer</summary>

**Answer:** 1. High-noise environments

**Explanation:**

* ECL is not suitable for **high-noise environments** due to its low noise immunity.
* Therefore, the correct answer is **High-noise environments**.

</details>

#### 426. The basic mechanism for storing a data bit in an $$E(^2)$$CMOS cell is

1. Control gate
2. Floating gate
3. Floating drain
4. Cell current

<details>

<summary>Show me the answer</summary>

**Answer:** 2. Floating gate

**Explanation:**

* In E(^2)CMOS (Electrically Erasable CMOS), data is stored using a **floating gate**.
* Therefore, the correct answer is **Floating gate**.

</details>

#### 427. A CPLD is a

1. CMOS programmable logic device
2. Capacitive programmable logic device
3. Complex programmable logic device
4. Complementary process latching device

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Complex programmable logic device

**Explanation:**

* A CPLD (Complex Programmable Logic Device) is a type of programmable logic device with a higher complexity than simpler PLDs.
* Therefore, the correct answer is **Complex programmable logic device**.

</details>

#### 428. VHDL is a

1. Logic device
2. Computer language
3. PLD programming language
4. Very high density logic

<details>

<summary>Show me the answer</summary>

**Answer:** 3. PLD programming language

**Explanation:**

* VHDL (VHSIC Hardware Description Language) is a **PLD programming language** used for designing and simulating digital circuits.
* Therefore, the correct answer is **PLD programming language**.

</details>

#### 429. The types of SPLDs do not include

1. GAL
2. RAM
3. PROM
4. PAL

<details>

<summary>Show me the answer</summary>

**Answer:** 2. RAM

**Explanation:**

* SPLDs (Simple Programmable Logic Devices) include GAL, PROM, and PAL, but **RAM** is not an SPLD.
* Therefore, the correct answer is **RAM**.

</details>

#### 430. A GAL has

1. A reprogrammable AND array, a fixed OR array, and programmable output logic
2. A fixed AND array and a programmable OR array
3. One-time programmable AND and OR array
4. Reprogrammable AND and OR array

<details>

<summary>Show me the answer</summary>

**Answer:** 1. A reprogrammable AND array, a fixed OR array, and programmable output logic

**Explanation:**

* A GAL (Generic Array Logic) has a **reprogrammable AND array**, a **fixed OR array**, and **programmable output logic**.
* Therefore, the correct answer is **A reprogrammable AND array, a fixed OR array, and programmable output logic**.

</details>

#### 431. An SPLD that has a programmable AND array and a fixed OR array is a

1. PROM
2. PAL
3. PLA
4. GAL

<details>

<summary>Show me the answer</summary>

**Answer:** 2. PAL

**Explanation:**

* A PAL (Programmable Array Logic) has a **programmable AND array** and a **fixed OR array**.
* Therefore, the correct answer is **PAL**.

</details>

#### 432. A connection between a row and column in a PAL array is made by

1. Blowing a fusible link
2. Leaving a fusible link intact
3. Connecting an input variable to the input line
4. Connecting an input variable to the product tem line

<details>

<summary>Show me the answer</summary>

**Answer:** 2. Leaving a fusible link intact

**Explanation:**

* In a PAL array, connections are made by **leaving a fusible link intact**.
* Therefore, the correct answer is **Leaving a fusible link intact**.

</details>

#### 433. The device number PAL14H4 indicates

1. A PAL with fourteen active-HIGH outputs and four inputs
2. A PAL that implements fourteen AND gates and four OR gates
3. A PAL with implements and four active-HIGH outputs
4. Who the manufacturer is

<details>

<summary>Show me the answer</summary>

**Answer:** 3. A PAL with implements and four active-HIGH outputs

**Explanation:**

* The device number **PAL14H4** indicates a PAL with **four active-HIGH outputs**.
* Therefore, the correct answer is **A PAL with implements and four active-HIGH outputs**.

</details>

#### 434. A GAL is different from a PAL because

1. A GAL has more inputs and outputs
2. A GAL is implemented with a different technology
3. A GAL can replace several different PALs
4. All except answer 1

<details>

<summary>Show me the answer</summary>

**Answer:** 4. All except answer 1

**Explanation:**

* A GAL (Generic Array Logic) is different from a PAL because it uses **different technology**, can **replace several PALs**, and has **programmable output logic**.
* Therefore, the correct answer is **All except answer 1**.

</details>

#### 435. The reprogrammable cells in a GAL array are

1. TTL
2. ECL
3. E$$^2$$CMOS
4. Bipolar fuses

<details>

<summary>Show me the answer</summary>

**Answer:** 3. E(^2)CMOS

**Explanation:**

* The reprogrammable cells in a GAL array are made using **E(^2)CMOS** technology.
* Therefore, the correct answer is **E(^2)CMOS**.

</details>

#### 436. OLMC is an acronym for

1. Output Logic Main Cell
2. Output Logic Macrocell
3. Optimum Logic Multiple Channel
4. Odd-parity Logic Master Check

<details>

<summary>Show me the answer</summary>

**Answer:** 2. Output Logic Macrocell

**Explanation:**

* OLMC stands for **Output Logic Macrocell**, which is a key feature in GAL devices.
* Therefore, the correct answer is **Output Logic Macrocell**.

</details>

#### 437. Two ways in which a GAL output can be configured are

1. Combinational and I/O
2. Fixed and variable
3. Simple and complex
4. Combinational and registered

<details>

<summary>Show me the answer</summary>

**Answer:** 4. Combinational and registered

**Explanation:**

* A GAL output can be configured as either **combinational** or **registered**.
* Therefore, the correct answer is **Combinational and registered**.

</details>

#### 438. The device number GAL22V10 means that

1. The device has22 dedicated inputs and 10 dedicated outputs
2. The device has 22 inputs including dedicated inputs and I/Os and 10 outputs either dedicated or I/Os
3. The device has a variable number of inputs form a maximum of 22 to a minimum of 10
4. The device has 24 inputs including dedicated inputs and I/Os and 14 outputs either dedicated or I/Os

<details>

<summary>Show me the answer</summary>

**Answer:** 2. The device has 22 inputs including dedicated inputs and I/Os and 10 outputs either dedicated or I/Os

**Explanation:**

* The device number **GAL22V10** indicates that the device has **22 inputs** (including dedicated inputs and I/Os) and **10 outputs** (either dedicated or I/Os).
* Therefore, the correct answer is **The device has 22 inputs including dedicated inputs and I/Os and 10 outputs either dedicated or I/Os**.

</details>

#### 439. To conventionally program an SPLD, you need a

1. Special fixture
2. Special fixture and a master PLD that has been preprogrammed at the factory
3. Computer, a programmer, and HDL software
4. Computer, a programmer, and BASIC software

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Computer, a programmer, and HDL software

**Explanation:**

* To conventionally program an SPLD, you need a **computer**, a **programmer**, and **HDL software**.
* Therefore, the correct answer is **Computer, a programmer, and HDL software**.

</details>

#### 440. ISP stands for

1. In-System Programmable
2. Integrated Silicon Program
3. Integrated System Program
4. In-System Integrated Programming

<details>

<summary>Show me the answer</summary>

**Answer:** 1. In-System Programmable

**Explanation:**

* ISP stands for **In-System Programmable**, which allows devices to be programmed while installed in the system.
* Therefore, the correct answer is **In-System Programmable**.

</details>

#### 441. The GAL22V10 has

1. 10 inputs and 22outputs
2. 22 dedicated inputs and 10 outputs
3. 12 dedicated inputs and 10 dedicated outputs
4. 12 dedicated inputs and 10 outputs, any of which can be an input

<details>

<summary>Show me the answer</summary>

**Answer:** 4. 12 dedicated inputs and 10 outputs, any of which can be an input

**Explanation:**

* The **GAL22V10** has **12 dedicated inputs** and **10 outputs**, any of which can also function as inputs.
* Therefore, the correct answer is **12 dedicated inputs and 10 outputs, any of which can be an input**.

</details>

#### 442. The GAL22V10 operates on a dc supply voltage of

1. 5V
2. 3.3V
3. 10V
4. 1.2V

<details>

<summary>Show me the answer</summary>

**Answer:** 2. 3.3V

**Explanation:**

* The **GAL22V10** operates on a **3.3V DC supply voltage**.
* Therefore, the correct answer is **3.3V**.

</details>

#### 443. OLMC stand for

1. Output logic modular circuit
2. Output latch memory cell
3. Output logic macrocell
4. Overall logic matrix circuit

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Output logic macrocell

**Explanation:**

* OLMC stands for **Output Logic Macrocell**, which is a key feature in GAL devices.
* Therefore, the correct answer is **Output logic macrocell**.

</details>

#### 444. The three states of a tri-state output buffer are

1. HIGH, LOW, high impedance
2. HIGH, LOW, in between
3. HIGH, LOW, ground
4. Right, left, centre

<details>

<summary>Show me the answer</summary>

**Answer:** 1. HIGH, LOW, high impedance

**Explanation:**

* A tri-state output buffer can be in one of three states: **HIGH**, **LOW**, or **high impedance**.
* Therefore, the correct answer is **HIGH, LOW, high impedance**.

</details>

#### 445. The OLMC of the GAL22V10 contains

1. One OR gate, one flip-flop, two multiplexers
2. One OR gate, one flip-flop, one multiplexer
3. One AND gate, one latch, two multiplexers
4. One OR gate, one flip-flop, two decoders

<details>

<summary>Show me the answer</summary>

**Answer:** 1. One OR gate, one flip-flop, two multiplexers

**Explanation:**

* The OLMC (Output Logic Macrocell) of the **GAL22V10** contains **one OR gate**, **one flip-flop**, and **two multiplexers**.
* Therefore, the correct answer is **One OR gate, one flip-flop, two multiplexers**.

</details>

#### 446. The GAL16V8 has

1. 16 dedicated inputs and 8 outputs
2. 8 dedicated inputs and 8 inputs /outputs
3. 8 inputs and 16 outputs
4. 16 input/outputs and 8 outputs

<details>

<summary>Show me the answer</summary>

**Answer:** 2. 8 dedicated inputs and 8 inputs /outputs

**Explanation:**

* The **GAL16V8** has **8 dedicated inputs** and **8 inputs/outputs**.
* Therefore, the correct answer is **8 dedicated inputs and 8 inputs /outputs**.

</details>

#### 447. A typical OLMC consists of

1. Gates, multiplexers, and a flip-flop
2. Gates, and a shift register
3. A Gray code counter
4. A fixed logic array

<details>

<summary>Show me the answer</summary>

**Answer:** 1. Gates, multiplexers, and a flip-flop

**Explanation:**

* A typical OLMC (Output Logic Macrocell) consists of **gates**, **multiplexers**, and a **flip-flop**.
* Therefore, the correct answer is **Gates, multiplexers, and a flip-flop**.

</details>

#### 448. A CPLD is a

1. CMOS PLD
2. Complementary PLD
3. Complex PLD
4. A fixed logic array

<details>

<summary>Show me the answer</summary>

**Answer:** 3. Complex PLD

**Explanation:**

* A CPLD (Complex Programmable Logic Device) is a type of **Complex PLD**.
* Therefore, the correct answer is **Complex PLD**.

</details>

#### 449. A CPLD contains

1. Shift registers
2. Logic arrays
3. Programmable interconnections
4. Answers (B) and (C)

<details>

<summary>Show me the answer</summary>

**Answer:** 4. Answers (B) and (C)

**Explanation:**

* A CPLD contains **logic arrays** and **programmable interconnections**.
* Therefore, the correct answer is **Answers (B) and (C)**.

</details>

#### 450. FPGA stands for

1. Fast propagation gate array
2. Field programmable gate array
3. Field presentable gate application
4. File programmable gate array

<details>

<summary>Show me the answer</summary>

**Answer:** 2. Field programmable gate array

**Explanation:**

* FPGA stands for **Field Programmable Gate Array**, which is a type of programmable logic device.
* Therefore, the correct answer is **Field programmable gate array**.

</details>
