> For the complete documentation index, see [llms.txt](https://nec-license.gitbook.io/books/llms.txt). Markdown versions of documentation pages are available by appending `.md` to page URLs; this page is available as [Markdown](https://nec-license.gitbook.io/books/2.-digital-logic-and-microprocessor/mcqs/mcqs-on-digital-logic/set-7.md).
# set-7
#### 301. The output of an SR flip-flop when $$S = 1$$ and $$R = 0$$ is:
1. $$1$$
2. $$\text{No change}$$
3. $$0$$
4. $$\text{High impedance}$$
Show me the answer
**Answer:** 1. $$1$$
**Explanation:**
* When $$S = 1$$ and $$R = 0$$, the SR flip-flop sets the output to $$1$$.
#### 302. The number of flip-flops contained in IC 7490 is:
1. $$2$$
2. $$4$$
3. $$3$$
4. $$10$$
Show me the answer
**Answer:** 2. $$4$$
**Explanation:**
* The IC 7490 contains **4 flip-flops**.
#### 303. The number of control lines for a 32-to-1 multiplexer is:
1. $$4$$
2. $$16$$
3. $$5$$
4. $$6$$
Show me the answer
**Answer:** 3. $$5$$
**Explanation:**
* A 32-to-1 multiplexer requires $$5$$ control lines because $$2^5 = 32$$.
#### 304. How many two-input AND & OR gates are required to realize $$Y = CD + EF + G$$?
1. $$2, 2$$
2. $$3, 3$$
3. $$2, 3$$
4. $$\text{None of these}$$
Show me the answer
**Answer:** 1. $$2, 2$$
**Explanation:**
* Two **AND gates** are required for $$CD$$ and $$EF$$, and two **OR gates** are required for combining the terms.
#### 305. Which of the following cannot be accessed randomly?
1. $$\text{DRAM}$$
2. $$\text{ROM}$$
3. $$\text{SRAM}$$
4. $$\text{Magnetic tape}$$
Show me the answer
**Answer:** 4. $$\text{Magnetic tape}$$
**Explanation:**
* Magnetic tape is a **sequential access memory** and cannot be accessed randomly.
#### 306. The excess-3 code of decimal 7 is represented by:
1. $$1100$$
2. $$1011$$
3. $$1001$$
4. $$1010$$
Show me the answer
**Answer:** 2. $$1011$$
**Explanation:**
* The excess-3 code of 7 is obtained by adding 3 to 7, resulting in $$10$$, which is $$1010$$ in binary.
#### 307. When an input signal $$A = 11001$$ is applied to a NOT gate serially, its output signal is:
1. $$00111$$
2. $$10101$$
3. $$00110$$
4. $$11001$$
Show me the answer
**Answer:** 3. $$00110$$
**Explanation:**
* The NOT gate inverts each bit of the input signal, so $$11001$$ becomes $$00110$$.
#### 308. The result of adding the hexadecimal number A6 to 3A is:
1. $$DD$$
2. $$F0$$
3. $$E0$$
4. $$EF$$
Show me the answer
**Answer:** 3. $$E0$$
**Explanation:**
* Adding A6 ($$166$$ in decimal) and 3A ($$58$$ in decimal) gives E0 ($$224$$ in decimal).
#### 309. A universal logic gate is one that can be used to generate any logic function. Which of the following is a universal logic gate?
1. $$\text{OR}$$
2. $$\text{XOR}$$
3. $$\text{AND}$$
4. $$\text{NAND}$$
Show me the answer
**Answer:** 4. $$\text{NAND}$$
**Explanation:**
* NAND gates are universal because they can be used to implement any logic function.
#### 310. The logic 0 level of a CMOS logic device is approximately:
1. $$1.2 \text{ volts}$$
2. $$5 \text{ volts}$$
3. $$0.4 \text{ volts}$$
4. $$0 \text{ volts}$$
Show me the answer
**Answer:** 4. $$0 \text{ volts}$$
**Explanation:**
* In CMOS logic, a logic 0 is represented by a voltage close to $$0$$ volts.
#### 311. A Karnaugh map is used for the purpose of:
1. $$\text{Reducing the electronic circuits used}$$
2. $$\text{Mapping the given Boolean logic function}$$
3. $$\text{Minimizing the terms in a Boolean expression}$$
4. $$\text{Maximizing the terms of a given Boolean expression}$$
Show me the answer
**Answer:** 3. $$\text{Minimizing the terms in a Boolean expression}$$
**Explanation:**
* Karnaugh maps are used to simplify Boolean expressions by minimizing the number of terms.
#### 312. A full adder logic circuit will have:
1. $$\text{Two inputs and one output}$$
2. $$\text{Three inputs and three outputs}$$
3. $$\text{Two inputs and two outputs}$$
4. $$\text{Three inputs and two outputs}$$
Show me the answer
**Answer:** 4. $$\text{Three inputs and two outputs}$$
**Explanation:**
* A full adder has three inputs (A, B, and carry-in) and two outputs (sum and carry-out).
#### 313. An eight-stage ripple counter uses flip-flops with a propagation delay of 75 nanoseconds each. The pulse width of the strobe is 50 ns. The frequency of the input signal which can be used for proper operation of the counter is approximately:
1. $$1 \text{ MHz}$$
2. $$2 \text{ MHz}$$
3. $$500 \text{ MHz}$$
4. $$4 \text{ MHz}$$
Show me the answer
**Answer:** 1. $$1 \text{ MHz}$$
**Explanation:**
* The maximum frequency is determined by the total propagation delay, which is $$8 \times 75 \text{ ns} = 600 \text{ ns}$$. The frequency is $$1 / 600 \text{ ns} \approx 1.67 \text{ MHz}$$, so 1 MHz is the closest option.
#### 314. The output of a JK flip-flop with asynchronous preset and clear inputs is '1'. The output can be changed to '0' with one of the following conditions:
1. $$\text{By applying } J = 0, K = 0 \text{ and using a clock}$$
2. $$\text{By applying } J = 1, K = 0 \text{ and using the clock}$$
3. $$\text{By applying } J = 1, K = 1 \text{ and using the clock}$$
4. $$\text{By applying a synchronous preset input}$$
Show me the answer
**Answer:** 3. $$\text{By applying } J = 1, K = 1 \text{ and using the clock}$$
**Explanation:**
* When $$J = 1$$ and $$K = 1$$, the JK flip-flop toggles its output on the clock pulse, changing it from 1 to 0.
#### 315. The information in ROM is stored:
1. $$\text{By the user any number of times}$$
2. $$\text{By the manufacturer during fabrication of the device}$$
3. $$\text{By the user using ultraviolet light}$$
4. $$\text{By the user once and only once}$$
Show me the answer
**Answer:** 2. $$\text{By the manufacturer during fabrication of the device}$$
**Explanation:**
* ROM (Read-Only Memory) is programmed by the manufacturer and cannot be modified by the user.
#### 316. The conversion speed of an analog-to-digital converter is maximum with the following technique:
1. $$\text{Dual slope A/D converter}$$
2. $$\text{Serial comparator A/D converter}$$
3. $$\text{Successive approximation A/D converter}$$
4. $$\text{Parallel comparator A/D converter}$$
Show me the answer
**Answer:** 4. $$\text{Parallel comparator A/D converter}$$
**Explanation:**
* Parallel comparator A/D converters have the fastest conversion speed.
#### 317. A weighted resistor digital-to-analog converter using N bits requires a total of:
1. $$N \text{ precision resistors}$$
2. $$N + 1 \text{ precision resistors}$$
3. $$2N \text{ precision resistors}$$
4. $$N - 1 \text{ precision resistors}$$
Show me the answer
**Answer:** 1. $$N \text{ precision resistors}$$
**Explanation:**
* A weighted resistor DAC requires one precision resistor for each bit.
#### 318. The 2's complement of the number 1101110 is:
1. $$0010001$$
2. $$0010010$$
3. $$0010001$$
4. $$\text{None}$$
Show me the answer
**Answer:** 2. $$0010010$$
**Explanation:**
* The 2's complement of 1101110 is obtained by inverting the bits and adding 1, resulting in $$0010010$$.
#### 319. The decimal equivalent of the binary number 10101 is:
1. $$21$$
2. $$26$$
3. $$31$$
4. $$28$$
Show me the answer
**Answer:** 1. $$21$$
**Explanation:**
* The binary number $$10101$$ converts to the decimal number $$21$$.
#### 320. How many two-input AND gates and two-input OR gates are required to realize $$Y = BD + CE + AB$$?
1. $$1, 1$$
2. $$3, 2$$
3. $$4, 2$$
4. $$2, 3$$
Show me the answer
**Answer:** 2. $$3, 2$$
**Explanation:**
* Three **AND gates** are required for $$BD$$, $$CE$$, and $$AB$$, and two **OR gates** are required for combining the terms.
#### 321. How many select lines will a 32-to-1 multiplexer have?
1. $$5$$
2. $$9$$
3. $$8$$
4. $$11$$
Show me the answer
**Answer:** 1. $$5$$
**Explanation:**
* A 32-to-1 multiplexer requires $$5$$ select lines because $$2^5 = 32$$.
#### 322. How many address bits are required to represent 4K memory?
1. $$5 \text{ bits}$$
2. $$8 \text{ bits}$$
3. $$12 \text{ bits}$$
4. $$10 \text{ bits}$$
Show me the answer
**Answer:** 3. $$12 \text{ bits}$$
**Explanation:**
* A 4K memory requires $$\log\_2(4096) = 12$$ address bits.
#### 323. For a JK flip-flop with $$J = 0$$ and $$K = 1$$, the output after a clock pulse will be:
1. $$1$$
2. $$0$$
3. $$\text{No change}$$
4. $$\text{High impedance}$$
Show me the answer
**Answer:** 2. $$0$$
**Explanation:**
* When $$J = 0$$ and $$K = 1$$, the JK flip-flop resets the output to $$0$$.
#### 324. Which of the following are known as universal gates?
1. $$\text{NAND and NOR}$$
2. $$\text{XOR and OR}$$
3. $$\text{AND and OR}$$
4. $$\text{None}$$
Show me the answer
**Answer:** 1. $$\text{NAND and NOR}$$
**Explanation:**
* NAND and NOR gates are universal because they can be used to implement any logic function.
#### 325. Which of the following memories stores the most number of bits?
1. $$\text{64Kx8 memory}$$
2. $$\text{32Mx8 memory}$$
3. $$\text{1Mx8 memory}$$
4. $$\text{64x6 memory}$$
Show me the answer
**Answer:** 2. $$\text{32Mx8 memory}$$
**Explanation:**
* A 32Mx8 memory stores $$32 \times 8 = 256$$ million bits, which is the largest among the options.
#### 326. Which of the following consumes minimum power?
1. $$\text{TTL}$$
2. $$\text{DTL}$$
3. $$\text{CMOS}$$
4. $$\text{RTL}$$
Show me the answer
**Answer:** 3. $$\text{CMOS}$$
**Explanation:**
* CMOS logic consumes the least power among the given options.
#### 327. The complement of a variable is always:
1. $$0$$
2. $$\text{Equal to the variable}$$
3. $$1$$
4. $$\text{The inverse of the variable}$$
Show me the answer
**Answer:** 4. $$\text{The inverse of the variable}$$
**Explanation:**
* The complement of a variable is its inverse (e.g., $$\overline{A}$$).
#### 328. The Boolean expression $$A + B + C$$ is:
1. $$\text{A sum term}$$
2. $$\text{A product term}$$
3. $$\text{A literal term}$$
4. $$\text{A complement term}$$
Show me the answer
**Answer:** 1. $$\text{A sum term}$$
**Explanation:**
* The expression $$A + B + C$$ is a sum term because it represents the logical OR of the variables.
#### 329. The Boolean expression $$AB'CD'$$ is:
1. $$\text{A sum term}$$
2. $$\text{A literal}$$
3. $$\text{A product term}$$
4. $$\text{Always 1}$$
Show me the answer
**Answer:** 3. $$\text{A product term}$$
**Explanation:**
* The expression $$AB'CD'$$ is a product term because it represents the logical AND of the variables.
#### 330. The domain of the expression $$AB'CD + AB' + C'D + B$$ is:
1. $$A \text{ and } D$$
2. $$A, B, C, \text{ and } D$$
3. $$B \text{ only}$$
4. $$\text{None of the above}$$
Show me the answer
**Answer:** 2. $$A, B, C, \text{ and } D$$
**Explanation:**
* The domain of the expression includes all variables $$A, B, C, \text{ and } D$$.
#### 331. According to the commutative law of addition:
1. $$AB = BA$$
2. $$A + (B + C) = (A + B) + C$$
3. $$A = A + A$$
4. $$A + B = B + A$$
Show me the answer
**Answer:** 4. $$A + B = B + A$$
**Explanation:**
* The commutative law of addition states that the order of operands does not affect the result, so $$A + B = B + A$$.
#### 332. According to the associative law of multiplication:
1. $$B = BB$$
2. $$A + B = B + A$$
3. $$A(BC) = (AB)C$$
4. $$B + B(B + 0)$$
Show me the answer
**Answer:** 3. $$A(BC) = (AB)C$$
**Explanation:**
* The associative law of multiplication states that the grouping of operands does not affect the result, so $$A(BC) = (AB)C$$.
#### 333. According to the distributive law:
1. $$A(B + C) = AB + AC$$
2. $$A(A + 1) = A$$
3. $$A(BC) = (AB)C$$
4. $$A + AB = A$$
Show me the answer
**Answer:** 1. $$A(B + C) = AB + AC$$
**Explanation:**
* The distributive law states that multiplication distributes over addition, so $$A(B + C) = AB + AC$$.
#### 334. Which one of the following is not a valid rule of Boolean algebra?
1. $$A + 1 = 1$$
2. $$AA = A$$
3. $$A = A$$
4. $$A + 0 = A$$
Show me the answer
**Answer:** 3. $$A = A$$
**Explanation:**
* The statement $$A = A$$ is not a rule of Boolean algebra; it is an identity.
#### 335. Which of the following rules states that if one input of an AND gate is always 1, the output is equal to the other input?
1. $$A + 1 = 1$$
2. $$AA = A$$
3. $$A + A = A$$
4. $$A \cdot 1 = A$$
Show me the answer
**Answer:** 4. $$A \cdot 1 = A$$
**Explanation:**
* The rule $$A \cdot 1 = A$$ states that if one input of an AND gate is 1, the output is equal to the other input.
#### 336. According to De Morgan’s theorems, the following equality(s) are correct:
1. $$\overline{AB} = \overline{A} + \overline{B}$$
2. $$\overline{A + B + C} = \overline{A} \cdot \overline{B} \cdot \overline{C}$$
3. $$\overline{XYZ} = \overline{X} + \overline{Y} + \overline{Z}$$
4. $$\text{All of the above}$$
Show me the answer
**Answer:** 4. $$\text{All of the above}$$
**Explanation:**
* De Morgan’s theorems state that:
* $$\overline{AB} = \overline{A} + \overline{B}$$
* $$\overline{A + B + C} = \overline{A} \cdot \overline{B} \cdot \overline{C}$$
* $$\overline{XYZ} = \overline{X} + \overline{Y} + \overline{Z}$$
* All the given equalities are correct.
#### 337. The Boolean expression $$X = AB + CD$$ represents:
1. $$\text{Two ORs ANDed together}$$
2. $$\text{Two ANDs ORed together}$$
3. $$\text{A 4-input AND gate}$$
4. $$\text{An exclusive-OR}$$
Show me the answer
**Answer:** 2. $$\text{Two ANDs ORed together}$$
**Explanation:**
* The expression $$X = AB + CD$$ represents two AND gates ($$AB$$ and $$CD$$) whose outputs are ORed together.
#### 338. An example of a sum-of-products expression is:
1. $$A + B(C + D)$$
2. $$AB + AC + ABC$$
3. $$(A + B + C)(A + B + C)$$
4. $$\text{Both answers A and B}$$
Show me the answer
**Answer:** 2. $$AB + AC + ABC$$
**Explanation:**
* A sum-of-products expression is a logical OR of multiple AND terms, such as $$AB + AC + ABC$$.
#### 339. An example of a sum-of-sums expression is:
1. $$A(B + C) + AG$$
2. $$A + B + BC$$
3. $$(A + B)(A + B + C)$$
4. $$\text{Both answers A and B}$$
Show me the answer
**Answer:** 3. $$(A + B)(A + B + C)$$
**Explanation:**
* A sum-of-sums expression is a logical AND of multiple OR terms, such as $$(A + B)(A + B + C)$$.
#### 340. An example of a standard SOP expression is:
1. $$AB + ABC + ABD$$
2. $$AB + AB + AB$$
3. $$ABC + ACD$$
4. $$ABCD + AB + A$$
Show me the answer
**Answer:** 3. $$ABC + ACD$$
**Explanation:**
* A standard SOP (Sum of Products) expression consists of AND terms combined with OR, such as $$ABC + ACD$$.
#### 341. A 3-variable Karnaugh map has:
1. $$\text{Eight cells}$$
2. $$\text{Sixteen cells}$$
3. $$\text{Three cells}$$
4. $$\text{Four cells}$$
Show me the answer
**Answer:** 1. $$\text{Eight cells}$$
**Explanation:**
* A 3-variable Karnaugh map has $$2^3 = 8$$ cells.
#### 342. In a 4-variable Karnaugh map, a 2-variable product term is produced by:
1. $$\text{A 2-cell group of 1s}$$
2. $$\text{A 4-cell group of 1s}$$
3. $$\text{An 8-cell group of 1s}$$
4. $$\text{A 4-cell group of 0s}$$
Show me the answer
**Answer:** 2. $$\text{A 4-cell group of 1s}$$
**Explanation:**
* A 2-variable product term is produced by a 4-cell group of 1s in a 4-variable Karnaugh map.
#### 343. On a Karnaugh map, grouping the 0s produces:
1. $$\text{A product-of-sums expression}$$
2. $$\text{A "don’t care" condition}$$
3. $$\text{A sum-of-products expression}$$
4. $$\text{AND-OR logic}$$
Show me the answer
**Answer:** 1. $$\text{A product-of-sums expression}$$
**Explanation:**
* Grouping 0s on a Karnaugh map produces a product-of-sums (POS) expression.
#### 344. A 5-variable Karnaugh map has:
1. $$\text{Sixteen cells}$$
2. $$\text{Sixty-four cells}$$
3. $$\text{Thirty-two cells}$$
4. $$\text{All of the above}$$
Show me the answer
**Answer:** 3. $$\text{Thirty-two cells}$$
**Explanation:**
* A 5-variable Karnaugh map has $$2^5 = 32$$ cells.
#### 345. The output expression for an AND-OR circuit having one AND gate with inputs $$A, B, C, D$$ and one AND gate with inputs $$E, F$$ is:
1. $$ABCDEF$$
2. $$(A + B + C + D)(E + F)$$
3. $$AFE + C + D + E + F$$
4. $$BCD + EF$$
Show me the answer
**Answer:** 4. $$BCD + EF$$
**Explanation:**
* The output expression for the AND-OR circuit is $$BCD + EF$$.
#### 346. A logic circuit with an output $$X = ABC + AC$$ consists of:
1. $$\text{Two AND gates and one OR gate}$$
2. $$\text{Two AND gates, one OR gate, and two inverters}$$
3. $$\text{Two OR gates, one AND gate, and two inverters}$$
4. $$\text{Two AND gates, one OR gate, and one inverter}$$
Show me the answer
**Answer:** 1. $$\text{Two AND gates and one OR gate}$$
**Explanation:**
* The expression $$X = ABC + AC$$ requires two AND gates (for $$ABC$$ and $$AC$$) and one OR gate.
#### 347. To implement the expression $$ABCD + ABCD + ABCD$$, it takes one OR gate and:
1. $$\text{One AND gate}$$
2. $$\text{Three AND gates and four inverters}$$
3. $$\text{Three AND gates}$$
4. $$\text{Three AND gates and three inverters}$$
Show me the answer
**Answer:** 3. $$\text{Three AND gates}$$
**Explanation:**
* The expression $$ABCD + ABCD + ABCD$$ requires three AND gates and one OR gate.
#### 348. The expression $$ABCD + ABCD + ABCD$$:
1. $$\text{Cannot be simplified}$$
2. $$\text{Can be simplified to } ABCD + ABC$$
3. $$\text{Can be simplified to } ABC + AB$$
4. $$\text{None of these answers is correct}$$
Show me the answer
**Answer:** 1. $$\text{Cannot be simplified}$$
**Explanation:**
* The expression $$ABCD + ABCD + ABCD$$ is already in its simplest form and cannot be further simplified.
#### 349. The input expression for an AND-OR-Invert circuit having one AND gate with inputs $$A, B, C, D$$ and one AND gate with inputs $$E, F$$ is:
1. $$ABCD + EF$$
2. $$A + B + C + D + E + F$$
3. $$(A + B + C + D)(E + F)$$
4. $$(A + B + C + D)(E + F)$$
Show me the answer
**Answer:** 1. $$ABCD + EF$$
**Explanation:**
* The input expression for the AND-OR-Invert circuit is $$ABCD + EF$$.